Multiphase Buck Converter with Minimum Time Control Strategy for RF Envelope Modulation

Power amplifier supplied with constant supply voltage has very low efficiency in the transmitter. A DC-DC converter in series with a linear regulator can be used to obtain voltage modulation. Since this converter should be able to change the output voltage very fast, a multiphase buck converter with a minimum time control strategy is proposed. To modulate supply voltage of the envelope amplifier, the multiphase converter works with some particular duty cycle (i/n, i=1, 2 ... n, n is the number of phase) to generate discrete output voltages, and in these duty cycles the output current ripple can be completely cancelled. The transition times for the minimum time are pre-calculated and inserted in a look-up table. The theoretical background, the system model that is necessary in order to calculate the transition times and the experimental results obtained with a 4-phase buck prototype are given

Optimum Design of an Envelope Tracking Buck Converter for RF PA using GaN HEMTs

In this paper, filter design methodology and application of GaN HEMTs for high efficiency Envelope Amplifier in RF transmitters are proposed. The main objectives of the filter design are generation of the envelope reference with the minimum possible distortion and high efficiency of the amplifier obtained by the optimum trade-off between conduction and switching losses. This optimum point was determined using power losses model for synchronous buck with sinusoidal output voltage and experimental results showed good correspondence with the model and verified the proposed methodology. On the other hand, comparing to Si MOSFETs, GaN HEMTs can provide higher efficiency of the envelope amplifier, due to superior conductivity and switching characteristics. Experimental results verified benefits of GaN devices comparing to the appliance of Si switching devices with very good Figure Of Merit, for this particular application

Sistema de adquisición de datos basado en FPAA

Las FPAA´s son dispositivos analógicos programables. Estos dispositivos se basan en el uso de condensadores conmutados junto con amplificadores operacionales. Este tipo de tecnología presenta una serie de ventajas, ya que combinan las ventajas de dispositivos digitales, como la reprogramación en función de las variables del entorno que los rodean, con la diferencia de ser dispositivos analógicos, permitiendo la realización de una amplia gama de diseños analógicos en un solo chip. En este proyecto se ha realizado un estudio sobre el funcionamiento de los condensadores conmutados y su uso en el dispositivo AN221E04 del fabricante Anadigm. Una vez descrita la arquitectura del AN221E04 y explicadas las bases del funcionamiento de los condensadores conmutados, utilizando como ejemplo los modelos facilitados por Anadigm, se desarrolla un modelo de amplificador de instrumentación teórico y se describe la metodología para su implementación en un AN221E04 con el software Anadigm Designer 2. Una vez implementado este modelo de amplificador de instrumentación se han efectuado una serie de pruebas con el objetivo de estudiar la capacidad de estos dispositivos. Dichas pruebas ponen de manifiesto que las FPAA´s tienen una serie de ventajas a tener en cuenta a la hora de realizar diseños analógicos. La precisión obtenida por el modelo de amplificador de instrumentación realizado es más que aceptable, llegando a obtener errores de ganancia inferiores al 1% con ganancias de 200V/V sin tener la necesidad de realizar grandes ajustes. En las conclusiones de este estudio se exponen tanto ventajas como inconvenientes de la utilización de FPAA´s en diseños analógicos. La principal ventaja de este uso es el ahorro de costes, ya que una vez desarrollada una plataforma de diseño, la capacidad de reconfiguración permite utilizar dicha plataforma para un amplio abanico de aplicaciones, reduciendo el número de componentes y simplificando las etapas de diseño. Como desventaja, las FPAA´s tienen una serie de limitaciones qué hay que tener en cuenta en ciertos casos pudiendo hacer irrealizable un diseño concreto; como puede ser el valor máximo o mínimo de ganancia. The FPAA's are programmable analog devices. These devices rely on the use of switched capacitors together with operational amplifiers. This type of technology has a number of advantages, because they combine the advantages of digital devices such as the reprogramming function of the variables of the surrounding environment, with the difference being analog devices, allowing the realization of a wide range of designs analog on a single chip. This project has conducted a study on the operation of the switched capacitor and its use in the device AN221E04 from Anadigm. Having described the architecture of AN221E04 and explained the basis for the operation of the switched capacitor, using the example models provided by Anadigm is developing an instrumentation amplifier theory model and describes the methodology for implementation in a AN221E04 with the Anadigm Designer 2 software. Once implemented this instrumentation amplifier model, have made a series of tests in order to study the ability of these devices. These tests show that the FPAA's have a number of advantages to take into account when making analog designs. The accuracy obtained by the instrumentation amplifier model is made more than acceptable, earning gain errors of less than 1% with gains of 200V / V without the need for major adjustments. The conclusions of this study are presented both advantages and disadvantages of using FPAA's in analog designs. The main advantage of this application is the cost savings, because once developed a platform for design, reconfiguration capability allows you to use this platform for a wide range of applications, reducing component count and simplifying design stages. As a disadvantage, the FPAA's have a number of limitations which must be taken into account in certain cases may make impossible a specific design, such as the maximum or minimum gain, or the magnitude of the possible settings.

Novel Inductor‐less Conversion Strategy Based on Multiphase Transformer‐Coupled Converters: Analysis, Design and Applications

There are many the requirements that modern power converters should fulfill. Most of the applications where these converters are used, demand smaller converters with high efficiency, improved power density and a fast dynamic response. For instance, loads like microprocessors demand aggressive current steps with very high slew rates (100A/mus and higher); besides, during these load steps, the supply voltage of the microprocessor should be kept within tight limits in order to ensure its correct performance. The accomplishment of these requirements is not an easy task; complex solutions like advanced topologies - such as multiphase converters- as well as advanced control strategies are often needed. Besides, it is also necessary to operate the converter at high switching frequencies and to use capacitors with high capacitance and low ESR. Improving the dynamic response of power converters does not rely only on the control strategy but also the power topology should be suited to enable a fast dynamic response. Moreover, in later years, a fast dynamic response does not only mean accomplishing fast load steps but output voltage steps are gaining importance as well. At least, two applications that require fast voltage changes can be named: Low power microprocessors. In these devices, the voltage supply is changed according to the workload and the operating frequency of the microprocessor is changed at the same time. An important reduction in voltage dependent losses can be achieved with such changes. This technique is known as Dynamic Voltage Scaling (DVS). Another application where important energy savings can be achieved by means of changing the supply voltage are Radio Frequency Power Amplifiers. For example, RF architectures based on ‘Envelope Tracking’ and ‘Envelope Elimination and Restoration’ techniques can take advantage of voltage supply modulation and accomplish important energy savings in the power amplifier. However, in order to achieve these efficiency improvements, a power converter with high efficiency and high enough bandwidth (hundreds of kHz or even tens of MHz) is necessary in order to ensure an adequate supply voltage. The main objective of this Thesis is to improve the dynamic response of DC-DC converters from the point of view of the power topology. And the term dynamic response refers both to the load steps and the voltage steps; it is also interesting to modulate the output voltage of the converter with a specific bandwidth. In order to accomplish this, the question of what is it that limits the dynamic response of power converters should be answered. Analyzing this question leads to the conclusion that the dynamic response is limited by the power topology and specifically, by the filter inductance of the converter which is found in series between the input and the output of the converter. The series inductance is the one that determines the gain of the converter and provides the regulation capability. Although the energy stored in the filter inductance enables the regulation and the capability of filtering the output voltage, it imposes a limitation which is the concern of this Thesis. The series inductance stores energy and prevents the current from changing in a fast way, limiting the slew rate of the current through this inductor. Different solutions are proposed in the literature in order to reduce the limit imposed by the filter inductor. Many publications proposing new topologies and improvements to known topologies can be found in the literature. Also, complex control strategies are proposed with the objective of improving the dynamic response in power converters. In the proposed topologies, the energy stored in the series inductor is reduced; examples of these topologies are Multiphase converters, Buck converter operating at very high frequency or adding a low impedance path in parallel with the series inductance. Control techniques proposed in the literature, focus on adjusting the output voltage as fast as allowed by the power stage; examples of these control techniques are: hysteresis control, V 2 control, and minimum time control. In some of the proposed topologies, a reduction in the value of the series inductance is achieved and with this, the energy stored in this magnetic element is reduced; less stored energy means a faster dynamic response. However, in some cases (as in the high frequency Buck converter), the dynamic response is improved at the cost of worsening the efficiency. In this Thesis, a drastic solution is proposed: to completely eliminate the series inductance of the converter. This is a more radical solution when compared to those proposed in the literature. If the series inductance is eliminated, the regulation capability of the converter is limited which can make it difficult to use the topology in one-converter solutions; however, this topology is suitable for power architectures where the energy conversion is done by more than one converter. When the series inductor is eliminated from the converter, the current slew rate is no longer limited and it can be said that the dynamic response of the converter is independent from the switching frequency. This is the main advantage of eliminating the series inductor. The main objective, is to propose an energy conversion strategy that is done without series inductance. Without series inductance, no energy is stored between the input and the output of the converter and the dynamic response would be instantaneous if all the devices were ideal. If the energy transfer from the input to the output of the converter is done instantaneously when a load step occurs, conceptually it would not be necessary to store energy at the output of the converter (no output capacitor COUT would be needed) and if the input source is ideal, the input capacitor CIN would not be necessary. This last feature (no CIN with ideal VIN) is common to all power converters. However, when the concept is actually implemented, parasitic inductances such as leakage inductance of the transformer and the parasitic inductance of the PCB, cannot be avoided because they are inherent to the implementation of the converter. These parasitic elements do not affect significantly to the proposed concept. In this Thesis, it is proposed to operate the converter without series inductance in order to improve the dynamic response of the converter; however, on the other side, the continuous regulation capability of the converter is lost. It is said continuous because, as it will be explained throughout the Thesis, it is indeed possible to achieve discrete regulation; a converter without filter inductance and without energy stored in the magnetic element, is capable to achieve a limited number of output voltages. The changes between these output voltage levels are achieved in a fast way. The proposed energy conversion strategy is implemented by means of a multiphase converter where the coupling of the phases is done by discrete two-winding transformers instead of coupledinductors since transformers are, ideally, no energy storing elements. This idea is the main contribution of this Thesis. The feasibility of this energy conversion strategy is first analyzed and then verified by simulation and by the implementation of experimental prototypes. Once the strategy is proved valid, different options to implement the magnetic structure are analyzed. Three different discrete transformer arrangements are studied and implemented. A converter based on this energy conversion strategy would be designed with a different approach than the one used to design classic converters since an additional design degree of freedom is available. The switching frequency can be chosen according to the design specifications without penalizing the dynamic response or the efficiency. Low operating frequencies can be chosen in order to favor the efficiency; on the other hand, high operating frequencies (MHz) can be chosen in order to favor the size of the converter. For this reason, a particular design procedure is proposed for the ‘inductorless’ conversion strategy. Finally, applications where the features of the proposed conversion strategy (high efficiency with fast dynamic response) are advantageus, are proposed. For example, in two-stage power architectures where a high efficiency converter is needed as the first stage and there is a second stage that provides the fine regulation. Another example are RF power amplifiers where the voltage is modulated following an envelope reference in order to save power; in this application, a high efficiency converter, capable of achieving fast voltage steps is required. The main contributions of this Thesis are the following: The proposal of a conversion strategy that is done, ideally, without storing energy in the magnetic element. The validation and the implementation of the proposed energy conversion strategy. The study of different magnetic structures based on discrete transformers for the implementation of the proposed energy conversion strategy. To elaborate and validate a design procedure. To identify and validate applications for the proposed energy conversion strategy. It is important to remark that this work is done in collaboration with Intel. The particular features of the proposed conversion strategy enable the possibility of solving the problems related to microprocessor powering in a different way. For example, the high efficiency achieved with the proposed conversion strategy enables it as a good candidate to be used for power conditioning, as a first stage in a two-stage power architecture for powering microprocessors.

Three-level cell topology for a multilevel power supply to achieve High

This paper presents an envelope amplifier solution for envelope elimination and restoration (EER), that consists of a series combination of a switch-mode power supply (SMPS), based on three-level voltage cells and a linear regulator. This cell topology offers several advantages over a previously presented envelope amplifier based on a different multilevel topology (two-level voltage cells). The topology of the multilevel converter affects to the whole design of the envelope amplifier and a comparison between both design alternatives regarding the size, complexity and the efficiency of the solution is done. Both envelope amplifier solutions have a bandwidth of 2 MHz with an instantaneous maximum power of 50 W. It is also analyzed the linearity of the three-level cell solution, with critical importance in the EER technique implementation. Additionally, considerations to optimize the design of the envelope amplifier and experimental comparison between both cell topologies are included.

Top-Hat HELLISH-VCSOA for optical amplification and wavelength conversion for 0.85 to 1.3ìm operation

The Top-Hat hot electron light emission and lasing in semiconductor heterostructure (HELLISH)-vertical cavity semiconductor optical amplifier (VCSOA) is a modified version of a HELLISH-VCSOA device. It has a shorter p-channel and longer n-channel. The device studied in this work consists of a simple GaAs p-i-n junction, containing 11 Ga0.35In0.65 N0.02As0.08/GaAs multiple quantum wells in its intrinsic region; the active region is enclosed between six pairs of GaAs/AlAs top distributed Bragg reflector (DBR) mirrors and 20.5 pairs of AlAs/GaAs bottom DBR mirrors. The operation of the device is based on longitudinal current transport parallel to the layers of the GaAs p-n junction. The device is characterised through I-V-L and by spectral photoluminescence, electroluminescence and electro-photoluminescence measurements. An amplification of about 25 dB is observed at applied voltages of around V = 88 V.

Amplificador de potencia Clase F en banda L basado en tecnología GaN

This paper reports a high efficiency class-F power amplifier based on a gallium nitride high electron mobility transistor (GaN-HEMT), which is designed at the L band of 1640 MHz. The design is based on source and load pull measurements. During the design process, the parasitics of the package of the device are also taken into account in order to achieve the optimal class-F load condition at the intrinsic drain of the transistor. The fabricated class-F power amplifier achieved a maximum drain efficiency (DE) of 77.8% and a output power of 39.6 W on a bandwidth of 280 MHz. Simulation and measurement results have shown good agreement.

Thermal and mechanical effects of different excitation modes based on low frequency laser modulation in optical hyperthermia

The low frequency modulation of the laser source (menor que30KHz) allows the generation of a pulsed signal that intermittently excites the gold nanorods. The temperature curves obtained for different frequencies and duty cycles of modulation but with equal average power and identical laser parameters, show that the thermal behavior in continuous wave and modulation modes is the same. However, the cell death experiments suggest that the percentage of death is higher in the cases of modulation. This observation allows us to conclude that there are other effects in addition to temperature that contribute to the cellular death. The mechanical effects like sound or pressure waves are expected to be generated from thermal expansion of gold nanorods. In order to study the behavior and magnitude of these processes we have developed a measure device based on ultrasound piezoelectric receivers (25KHz) and a lock-in amplifier that is able to detect the sound waves generated in samples of gold nanorods during laser irradiation providing us a voltage result proportional to the pressure signal. The first results show that the pressure measurements are directly proportional to the concentration of gold nanorods and the laser power, therefore, our present work is focused on determine the real influence of these effects in the cell death process.

Linewidth influence in photonics logic device

Photonics logic devices are currently finding applications in most of the fields where optical signals are employed. These areas range from optical communications to optical computing, covering as well as other applications in photonics sensing and metrology. Most of the proposed configurations with photonics logic devices are based on semiconductor laser structures with “on/off” behaviors, operating in an optical amplifier configuration. They are able to offer non-linear gain or bistable operation, being these properties the basis for their applications in these fields. Moreover, their large number of potential affecting parameters onto their behavior offers the possibility to choose the best solution for each case.

Modeling Reflective Bistability in Vertical-Cavity Semiconductor Optical Amplifiers

The characteristics of optical bistability in a vertical- cavity semiconductor optical amplifier (VCSOA) operated in reflection are reported. The dependences of the optical bistability in VCSOAs on the initial phase detuning and on the applied bias current are analyzed. The optical bistability is also studied for different numbers of superimposed periods in the top distributed bragg reflector (DBR) that conform the internal cavity of the device. The appearance of the X-bistable and the clockwise bistable loops is predicted theoretically in a VCSOA operated in reflection for the first time, to the best of our knowledge. Moreover, it is also predicted that the control of the VCSOA’s top reflectivity by the addition of new superimposed periods in its top DBR reduces by one order of magnitude the input power needed for the assessment of the X- and the clockwise bistable loop, compared to that required in in-plane semiconductor optical amplifiers. These results, added to the ease of fabricating two-dimensional arrays of this kind of device could be useful for the development of new optical logic or optical signal regeneration devices.

Sistema de adquisición de datos compacto para medidas de extensiometría y posición

En este proyecto se trata el diseño y construcción de un sistema de adquisición de datos compacto y de bajo coste para medidas de extensiometría y posición. Dicho sistema irá embarcado en una bicicleta de montaña con el fin de medir determinados parámetros. Estos parámetros son a) Elongación de las suspensiones, b) Deformación en el cuadro. Para la medida de elongación de las suspensiones se diseña y construye un sensor casero de bajo coste basado en una transparencia y un par de diodos fotoemisor y fotorreceptor infrarrojos. Se imprime un gradiente y se emplean dos tubos coaxiales de PVC. La medida de extensiometría se realiza con galgas extensiométricas, puentes de Wheatstone y amplificador de instrumentación. Las muestras se digitalizan con el ADC del microcontrolador C8051F020 de la casa Silabs, que se usa en una placa de desarrollo, y se almacenan en una memoria flash serie. Se desarrolla un software para PC con LabView para poder recibir, procesar y visualizar las muestras obtenidas de los distintos canales con el fin de analizarlas. Se obtienen conclusiones de los resultados de pruebas básicas. ABSTRACT On this project, the design and construction of a compact, low cost, data adquisition system for strain and position measurements is dealt with. Such system will be embedded on a bicycle in order to measure certain parameters. These are a) Suspension elongation, b) Frame deformation. For suspension elongation measurements, a homemade, low cost sensor based on a photoemitter-photoreceiver diode couple and a transparent sheet is designed and built. A gradient is printed in the transparent sheet, and two coaxial PVC pipes are used. Strain measurements are carried out by means of a strain gage, Wheatstone bridges and an instrumentation amplifier. Samples are digitized with Silabs’ C8051F020’s ADC, which is used in a development board, and are stored in a serial flash memory. Software for PC on LabView is developed in order to receive, process and visualize the obtained samples from each channel in order to analyze them. Results are obtained from basic tests.

Amplificadores lineales de potencia de alto rendimiento

En este proyecto se ha diseñado con éxito un amplificador de potencia cuya misión será trabajar como driver, teniendo así que excitar a un amplificador de mayor potencia. Como principales requisitos se puede destacar una potencia de salida de 4 W trabajando a una frecuencia central de 100 MHz con un ancho de banda relativo de entre el 20% y el 30% y un rendimiento tan grande como sea posible. El diseño se ha considerado exitoso ya que se ha llegado a conseguir un ancho de banda de trabajo por encima de los 4 W del 40% sacrificando el rendimiento ó del 30% con un rendimiento en torno al 90%. Los contenidos del presente proyecto incluyen los conocimientos teóricos sobre amplificadores de potencia necesarios para comprender lo explicado, así como una descripción detallada de todo el proceso de diseño, optimización, implementación y medidas que se han llevado a cabo. Por último se muestran unas conclusiones basadas en los resultados experimentales obtenidos así como una serie de mejoras propuestas. ABSTRACT In this project, a power amplifier has been successfully designed. The power amplifier designed will perform as a driver whose main target is to excite another power amplifier with a higher output power. As basic requirements can be highlighted an output power of 4 W, a working center frequency at 100 MHz with a relative bandwidth between 20% and 30% with an efficiency as high as possible. The design has been considered successful because a relative working bandwidth above 4 W of 40% has been reached with a drawback in the efficiency or a relative working bandwidth above 4 W of 30% with around 90% efficiency. The content of this project includes the theoretical knowledge about power amplifiers needed to follow most of the explanations as well as a detailed description of the whole process involving design, optimization, prototyping and measurement carried out during the project. Lastly, some conclusions are shown based on experimental results as well as some design improvements.

Diseño de los sistemas de comunicación en plantas de exploración y producción de hidrocarburos

Las plantas industriales de exploración y producción de petróleo y gas disponen de numerosos sistemas de comunicación que permiten el correcto funcionamiento de los procesos que tienen lugar en ella así como la seguridad de la propia planta. Para el presente Proyecto Fin de Carrera se ha llevado a cabo el diseño del sistema de megafonía PAGA (Public Address and General Alarm) y del circuito cerrado de televisión (CCTV) en la unidad de procesos Hydrocrcaker encargada del craqueo de hidrógeno. Partiendo de los requisitos definidos por las especificaciones corporativas de los grupos petroleros para ambos sistemas, PAGA y CCTV, se han expuesto los principios teóricos sobre los que se fundamenta cada uno de ellos y las pautas a seguir para el diseño y demostración del buen funcionamiento a partir de software específico. Se ha empleado las siguientes herramientas software: EASE para la simulación acústica, PSpice para la simulación eléctrica de las etapas de amplificación en la megafonía; y JVSG para el diseño de CCTV. La sonorización tanto de las unidades como del resto de instalaciones interiores ha de garantizar la inteligibilidad de los mensajes transmitidos. La realización de una simulación acústica permite conocer cómo va a ser el comportamiento de la megafonía sin necesidad de instalar el sistema, lo cual es muy útil para este tipo de proyectos cuya ingeniería se realiza previamente a la construcción de la planta. Además se comprueba el correcto diseño de las etapas de amplificación basadas en líneas de alta impedancia o de tensión constante (100 V). El circuito cerrado de televisión (CCTV) garantiza la transmisión de señales visuales de todos los accesos a las instalaciones y unidades de la planta así como la visión en tiempo real del correcto funcionamiento de los procesos químicos llevados a cabo en la refinería. El sistema dispone de puestos de control remoto para el manejo y gestión de las cámaras desplegadas; y de un sistema de almacenamiento de las grabaciones en discos duros (RAID-5) a través de una red SAN (Storage Area Network). Se especifican las diferentes fases de un proyecto de ingeniería en el sector de E&P de hidrocarburos entre las que se destaca: propuesta y adquisición, reunión de arranque (KOM, Kick Off Meeting), estudio in situ (Site Survey), plan de proyecto, diseño y documentación, procedimientos de pruebas, instalación, puesta en marcha y aceptaciones del sistema. Se opta por utilizar terminología inglesa dado al ámbito global del sector. En la última parte del proyecto se presenta un presupuesto aproximado de los materiales empleados en el diseño de PAGA y CCTV. ABSTRACT. Integrated communications for Oil and Gas allows reducing risks, improving productivity, reducing costs, and countering threats to safety and security. Both PAGA system (Public Address and General Alarm) and Closed Circuit Television have been designed for this project in order to ensure a reliable security of an oil refinery. Based on the requirements defined by corporate specifications for both systems (PAGA and CCTV), theoretical principles have been presented as well as the guidelines for the design and demonstration of a reliable design. The following software has been used: EASE for acoustic simulation; PSpice for simulation of the megaphony amplification loops; and JVSG tool for CCTV design. Acoustic for both the units and the other indoor facilities must ensure intelligibility of the transmitted messages. An acoustic simulation allows us to know how will be the performance of the PAGA system without installing loudspeakers, which is very useful for this type of project whose engineering is performed prior to the construction of the plant. Furthermore, it has been verified the correct design of the amplifier stages based on high impedance lines or constant voltage (100 V). Closed circuit television (CCTV) ensures the transmission of visual signals of all access to facilities as well as real-time view of the proper functioning of chemical processes carried out at the refinery. The system has remote control stations for the handling and management of deployed cameras. It is also included a storage system of the recordings on hard drives (RAID - 5) through a SAN (Storage Area Network). Phases of an engineering project in Oil and Gas are defined in the current project. It includes: proposal and acquisition, kick-off meeting (KOM), Site Survey, project plan, design and documentation, testing procedures (SAT and FAT), installation, commissioning and acceptance of the systems. Finally, it has been presented an estimate budget of the materials used in the design of PAGA and CCTV.

Bit noise from an optical logic gate with laser diodes

Output bits from an optical logic cell present noise due to the type of technique used to obtain the Boolean functions of two input data bits. We have simulated the behavior of an optically programmable logic cell working with Fabry Perot-laser diodes of the same type employed in optical communications (1550nm) but working here as amplifiers. We will report in this paper a study of the bit noise generated from the optical non-linearity process allowing the Boolean function operation of two optical input data signals. Two types of optical logic cells will be analyzed. Firstly, a classical "on-off" behavior, with transmission operation of LD amplifier and, secondly, a more complicated configuration with two LD amplifiers, one working on transmission and the other one in reflection mode. This last configuration has nonlinear behavior emulating SEED-like properties. In both cases, depending on the value of a "1" input data signals to be processed, a different logic function can be obtained. Also a CW signal, known as control signal, may be apply to fix the type of logic function. The signal to noise ratio will be analyzed for different parameters, as wavelength signals and the hysteresis cycles regions associated to the device, in relation with the signals power level applied. With this study we will try to obtain a better understanding of the possible effects present on an optical logic gate with Laser Diodes.

Optical regeneration based on noise generated in bistable devices: going from 2R to 3R

In this paper we propose to employ an instability that occurs in bistable devices as a control signal at the reception stage to generate the clock signal. One of the adopted configurations is composed of two semiconductor optical amplifiers arranged in a cascaded structure. This configuration has an output equivalent to that obtained from Self-Electrooptic Effect Devices (SEEDs), and it can implement the main Boolean functions of two binary inputs. These outputs, obtained from the addition of two binary signals, show a short spike in the transition from "1" to "2" in the internal processing. A similar result is obtained for a simple semiconductor amplifier with bistable behavior. The paper will show how these structures may help recover clock signals in any optical transmission system