Advantages of graded-channel SOI nMOSFETs for application as source-follower analog buffer
| Contribuinte(s) |
UNIVERSIDADE DE SÃO PAULO |
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| Data(s) |
18/10/2012
18/10/2012
2008
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| Resumo |
In this work the performance of graded-channel (CC) SOI MOSFETs operating as source-follower buffers is presented. The experimental analysis is performed by comparing the gain and linearity of buffers implemented with CC and standard SOI MOS devices considering the same mask dimensions. It is shown that by using CC devices, buffer gain very close to the theoretical limit can be achieved, with improved linearity, while for standard devices the gain departs from the theoretical value depending on the inversion level imposed by the bias current and input voltage. Two-dimensional numerical simulations were performed in order to confirm some hypotheses proposed to explain the gain behavior observed in the experimental data. By using numerical simulations the channel length has been varied, showing that the gain of buffers implemented with CC devices remains close to the theoretical limit even when short-channel devices are adopted. It has also been shown that the length of a source-follower buffer using CC devices can be reduced by a factor of 5, in comparison with a standard Sol MOSFET, without gain loss or linearity degradation. (C) 2008 Elsevier Ltd. All rights reserved. FAPESP CNPq |
| Identificador |
SOLID-STATE ELECTRONICS, v.52, n.12, p.1933-1938, 2008 0038-1101 http://producao.usp.br/handle/BDPI/18853 10.1016/j.sse.2008.06.047 |
| Idioma(s) |
eng |
| Publicador |
PERGAMON-ELSEVIER SCIENCE LTD |
| Relação |
Solid-state Electronics |
| Direitos |
restrictedAccess Copyright PERGAMON-ELSEVIER SCIENCE LTD |
| Palavras-Chave | #Graded-channel #Asymmetric channel #SOI #MOSFET #Source-rollower #Buffer #Analog circuits #MOS-TRANSISTOR MODEL #CIRCUIT-DESIGN #LOW-VOLTAGE #DISTORTION #MOSFETS #Engineering, Electrical & Electronic #Physics, Applied #Physics, Condensed Matter |
| Tipo |
article original article publishedVersion |