Application of auto-associative neural networks to transient fault detection in an IC engine

The tailpipe emissions from automotive engines have been subject to steadily reducing legislative limits. This reduction has been achieved through the addition of sub-systems to the basic four-stroke engine which thereby increases its complexity. To ensure the entire system functions correctly, each system and / or sub-systems needs to be continuously monitored for the presence of any faults or malfunctions. This is a requirement detailed within the On-Board Diagnostic (OBD) legislation. To date, a physical model approach has been adopted by me automotive industry for the monitoring requirement of OBD legislation. However, this approach has restrictions from the available knowledge base and computational load required. A neural network technique incorporating Multivariant Statistical Process Control (MSPC) has been proposed as an alternative method of building interrelationships between the measured variables and monitoring the correct operation of the engine. Building upon earlier work for steady state fault detection, this paper details the use of non-linear models based on an Auto-associate Neural Network (ANN) for fault detection under transient engine operation. The theory and use of the technique is shown in this paper with the application to the detection of air leaks within the inlet manifold system of a modern gasoline engine whilst operated on a pseudo-drive cycle. Copyright © 2007 by ASME.

Optimization of FRT Active Power Performance of a DFIG during Transient Grid Faults

Optimal fault ride-through (FRT) conditions for a doubly-fed induction generator (DFIG) during a transient grid fault are analyzed with special emphasis on improving the active power generation profile. The transition states due to crowbar activation during transient faults are investigated to exploit the maximum power during the fault and post-fault period. It has been identified that operating slip, severity of fault and crowbar resistance have a direct impact on the power capability of a DFIG, and crowbar resistance can be chosen to optimize the power capability. It has been further shown that an extended crowbar period can deliver enhanced inertial response following the transient fault. The converter protection and drive train dynamics have also been analyzed while choosing the optimum crowbar resistance and delivering enhanced inertial support for an extended crowbar period.

Power Efficient Redundant Execution for Chip Multiprocessor

This paper describes the design of a power efficient microarchitecture for transient fault detection in chip multiprocessors (CMPs) We introduce a new per-core dynamic voltage and frequency scaling (DVFS) algorithm for our architecture that significantly reduces power dissipation for redundant execution with a minimal performance overhead. Using cycle accurate simulation combined with a simple first order power model, we estimate that our architecture reduces dynamic power dissipation in the redundant core by an mean value of 79% and a maximum of 85% with an associated mean performance overhead of only 1:2%

基于编译器的瞬时故障容错技术研究与实现

随着计算机芯片的速度不断提升，器件的门限电压越来越低，因此单粒子翻转的瞬时故障越来越容易发生。特别是在太空环境中的计算机系统，在宇宙射线的影响下，瞬时故障更为频繁，系统可靠性面临更突出的考验。 为了提高计算机系统的可靠性，一般有硬件冗余容错和软件冗余容错两种方法。相对硬件容错而言，软件容错的优点是价格便宜，性价比高，配置灵活等，缺点是会带来额外的时间和空间开销，而且给程序员带来编写额外的容错代码的工作量。近来出现了一些基于编译的软件容错方法，可在编译的过程中自动加入冗余容错逻辑，但是这类编译容错方法仍然会带来显著的时间空间开销。如何在保持容错能力的同时尽量降低时空开销，是有待继续研究的问题。 本文在编译容错方向上进行了进一步研究和实现，提出利用源代码中的变量信息对冗余容错逻辑进行了剪裁，在保证容错能力的同时降低了时空开销，对内存和寄存器中的数据进行保护。具体内容有： 1. 提出了一个容错编译环境SCC的设计蓝图，构建了一个容错编译工具的远 景目标。 2. 提出了一种指令级的编译容错检测方法VarBIFT ，提供检测瞬时故障的能力。平均只利用0.0069倍的时间损耗和0.3620倍的空间损耗就将发生瞬时故障时，程序正确执行和检测到故障的概率总和平均从39.1%提升到76.9%， 3. 提出了一种指令级的编译容错恢复方法VarRIFT ，提供从瞬时故障中恢复正确数据的能力。平均只增加0.043倍的时间损耗和0.69倍的空间损耗就将发生瞬时故障时，程序仍然正确执行的概率平均从44.8%提升到了78.7%。 4. 基于开源编译器LCC，实现了上述两个编译容错方法VarBIFT 和VarRIFT 。在容错方法的实现中只修改了跟具体CPU指令相独立的中间逻辑，所以这两个实现能够方便得移植到SPARC、MIPS等其他CPU架构上。 5. 开发了一个故障注入工具，并用它测试了上述两个编译容错方法VarBIFT和VarRIFT 的容错能力。

VarBIFT:指令级的变量冗余容错检测技术

为了解决空间辐射对嵌入式计算机系统正确性的影响越来越明显的问题,基于典型的编译级容错技术,在编译器LCC上实现了基于有向无环图的编译级容错检测方法VarBIFT。该方法可以有效的保护由于粒子效应所引起的瞬时硬件故障,并可针对不同的目标机自动生成容错代码。实验结果表明,VarBIFT使源程序的平均段错误率从32.3%降到了13.9%,平均错误输出率从28.6%降到了9.2%;而其时间开销和空间开销仅为0.7%和36%。

Estudo comparativo da proteção da rede secundária de uma distribuidora de energia elétrica utilizando chave fusível e seccionalizador monofásico

The objective of this work is to conduct a comparative study between the fuse key and the single-phase seccionalizador, which are protective equipment used in an electricity distribution networks. This study has also the purpose to reduce the number of electrical power breakdown. Distribution networks are not free from faults, disturbances and failures, then the occurrence of adversities on the network, which may be transient or permanent faults, results in the interruption of electric power. Thus, there are protective systems of distribution networks, which aims to ensure that the electric system continues to function. The incidence of transient faults in the distribution network of this electricity company was used to generate immediate shutdown of customers due to the bad use of fuses as protective equipment by the reclosers. With the use of the fuse switch in the distribution network, there was the immediate shutdown of customers, however, using the single-phase seccionalizador as protective equipment by the reclosers, there are three attempts to restart the electricity power. As the attempts to restart the electricity power are able to eliminate a transient fault, not causing shutdown of any costumer, with the implementation of single-phase sectionalizers to replace the fuses, the number of company shutdowns due to transient faults was reduced by 47.6%

Estudo comparativo da proteção da rede secundária de uma distribuidora de energia elétrica utilizando chave fusível e seccionalizador monofásico

The objective of this work is to conduct a comparative study between the fuse key and the single-phase seccionalizador, which are protective equipment used in an electricity distribution networks. This study has also the purpose to reduce the number of electrical power breakdown. Distribution networks are not free from faults, disturbances and failures, then the occurrence of adversities on the network, which may be transient or permanent faults, results in the interruption of electric power. Thus, there are protective systems of distribution networks, which aims to ensure that the electric system continues to function. The incidence of transient faults in the distribution network of this electricity company was used to generate immediate shutdown of customers due to the bad use of fuses as protective equipment by the reclosers. With the use of the fuse switch in the distribution network, there was the immediate shutdown of customers, however, using the single-phase seccionalizador as protective equipment by the reclosers, there are three attempts to restart the electricity power. As the attempts to restart the electricity power are able to eliminate a transient fault, not causing shutdown of any costumer, with the implementation of single-phase sectionalizers to replace the fuses, the number of company shutdowns due to transient faults was reduced by 47.6%

Switching and fault transient analysis of 765 kV transmission systems

The analysis of electromagnetic transients arising in EHV/UHV power networks gives necessary information about the possible stresses on the different network components, which will determine their proper design, limits of operation as well as their pertinent protection strategies. This paper describes the transient analysis of 765 kV EHV transmission system which is a typical expansion in Indian power grid system. Considering various conditions, switching transient and fault transient studies are carried out. A FORTRAN version of EMTP is developed, to study a practical example, then a comparison with the results available in the literature is made.

TCSC control design for transient stability improvement of a multi-machine power system using trajectory sensitivity

This paper discusses the effects of thyristor controlled series compensator (TCSC), a series FACTS controller, on the transient stability of a power system. Trajectory sensitivity analysis (TSA) has been used to measure the transient stability condition of the system. The TCSC is modeled by a variable capacitor, the value of which changes with the firing angle. It is shown that TSA can be used in the design of the controller. The optimal locations of the TCSC-controller for different fault conditions can also be identified with the help of TSA. The paper depicts the advantage of the use of TCSC with a suitable controller over fixed capacitor operation.

Saturated core high-temperature superconducting fault current limiters as an alternative to conventional series reactors in a distribution grid

Series reactors are used in distribution grids to reduce the short-circuit fault level. Some of the disadvantages of the application of these devices are the voltage drop produced across the reactor and the steep front rise of the transient recovery voltage (TRV), which generally exceeds the rating of the associated circuit breaker. Simulations were performed to compare the characteristics of a saturated core High-Temperature Superconducting Fault Current Limiter (HTS FCL) and a series reactor. The design of the HTS FCL was optimized using the evolutionary algorithm. The resulting Pareto frontier curve of optimum solution is presented in this paper. The results show that the steady-state impedance of an HTS FCL is significantly lower than that of a series reactor for the same level of fault current limiting. Tests performed on a prototype 11 kV HTS FCL confirm the theoretical results. The respective transient recovery voltages (TRV) of the HTS FCL and an air core reactor of comparable fault current limiting capability are also determined. The results show that the saturated core HTS FCL has a significantly lower effect on the rate of rise of the circuit breaker TRV as compared to the air core reactor. The simulations results are validated with shortcircuit test results.

Development of a new signal processing diagnostic tool for vibration signals acquired in transient conditions

The diagnostics of mechanical components operating in transient conditions is still an open issue, in both research and industrial field. Indeed, the signal processing techniques developed to analyse stationary data are not applicable or are affected by a loss of effectiveness when applied to signal acquired in transient conditions. In this paper, a suitable and original signal processing tool (named EEMED), which can be used for mechanical component diagnostics in whatever operating condition and noise level, is developed exploiting some data-adaptive techniques such as Empirical Mode Decomposition (EMD), Minimum Entropy Deconvolution (MED) and the analytical approach of the Hilbert transform. The proposed tool is able to supply diagnostic information on the basis of experimental vibrations measured in transient conditions. The tool has been originally developed in order to detect localized faults on bearings installed in high speed train traction equipments and it is more effective to detect a fault in non-stationary conditions than signal processing tools based on spectral kurtosis or envelope analysis, which represent until now the landmark for bearings diagnostics.

A new approach for fault location identification in transmission system using stability analysis and SVMs

This paper presents a new approach to the location of fault in the high voltage power transmission system using Support Vector Machines (SVMs). A knowledge base is developed using transient stability studies for apparent impedance swing trajectory in the R-X plane. SVM technique is applied to identify the fault location in the system. Results are presented on sample 3-power station, a 9-bus system illustrate the implementation of the proposed method.

Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding

Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chip fault tolerance in future chip microprocessors (CMPs). In this paper we introduce a new energy-efficient fault-tolerant CMP architecture known as Redundant Execution using Critical Value Forwarding (RECVF). RECVF is based on two observations: (i) forwarding critical instruction results from the leading to the trailing core enables the latter to execute faster, and (ii) this speedup can be exploited to reduce energy consumption by operating the trailing core at a lower voltage-frequency level. Our evaluation shows that RECVF consumes 37% less energy than conventional dual modular redundant (DMR) execution of a program. It consumes only 1.26 times the energy of a non-fault-tolerant baseline and has a performance overhead of just 1.2%.