Energy recycling from multigigahertz clocks using fully integrated switching converters

Large digital chips use a significant amount of energy to broadcast a low-skew, multigigahertz clock to millions of latches located throughout the chip. Every clock cycle, the large aggregate capacitance of the clock network is charged from the supply and then discharged to ground. Instead of wasting this stored energy, it is possible to recycle the energy by controlling its delivery to another part of the chip using an on-chip dc-dc converter. The clock driver and switching converter circuits share many compatible characteristics that allow them to be merged into a single design and fully integrated on-chip. Our buck converter prototype, manufactured in 90-nm CMOS, provides a proof-of-concept that clock network energy can be recycled to other parts of the chip, thus lowering overall energy consumption. It also confirms that monolithic multigigahertz switching converters utilizing zero-voltage switching can be implemented in deep-submicrometer CMOS. With multigigahertz operation, fully integrated inductors and capacitors use a small amount of chip area with low losses. Combining the clock driver with the power converter can share the large MOSFET drivers necessary as well as being energy and space efficient. We present an analysis of the losses which we confirm by experimentally comparing the merged circuit with a conventional clock driver. © 2012 IEEE.

Bandwidth considerations for multilevel converters

Multilevel converters can achieve an overall effective switch frequency multiplication and consequent ripple reduction through the cancellation of the lowest order switch frequency terms. This paper investigates the harmonic content and the frequency response of these multimodulator converters. It is shown that the transfer function of uniformly sampled modulators is a bessel function associated with the inherent sampling process. Naturally sampled modulators have a flat transfer function, but multiple switchings per switch cycle will occur unless the input is slew-rate limited. Lower sideband harmonics of the effective carrier frequency and, in uniform converters, harmonics of the input signal also limit the useful bandwidth. Observations about the effect of the number of converters, their type (naturally or uniformly sampled), and the ratio of modulating frequency and switch frequency are made

Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications

This thesis proposes a novel gate drive circuit to improve the switching performance of MOSFET power switches in power electronic converters. The proposed topology exploits the cascode configuration, allowing the minimisation of switching losses in the presence of practical circuit constraints, which enables efficiency and power density improvements. Switching characteristics of the new topology are investigated and key mechanisms that control the switching process are identified. Unique analysis tools and techniques are also developed to demonstrate the application of the cascode gate drive circuit for switching performance optimisation.

A New Family of Soft Transition Converters: Design Example and Dynamic Model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless.When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

A new family of soft transition converters: Design and dynamic model

The soft switching converters evolved through the resonant load, resonant switch, resonant transition and active clamp converters to eliminate switching losses in power converters. This paper briefly presents the operating principle of the new family of soft transition converters; the methodology of design of these converters is presented through an example. In the proposed family of converters, the switching transitions of both the main switch and auxiliary switch are lossless. When these converters are analysed in terms of the pole current and throw voltage, the defining equations of all converters belonging to this family become identical.Such a description allows one to define simple circuit oriented model for these converters. These circuit models help in evaluating the steady state and dynamic model of these converters. The standard dynamic performance functions of the converters are readily obtainable from this model. This paper presents these dynamic models and verifies the same through measurements on a prototype converter.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

High Efficiency Envelope Amplifier Using The Slow-Envelope Technique

High efficiency envelope amplifiers are demanded in EER technique for RF transmitters, which benefits low maintaining cost or long battery time. The conventional solution is a dc-dc switching converters. This dc-dc converter should operate at very high frequency to track an envelope in the MHz range to supply the power amplifier. One of the alternative circuits suitable for this application is a hybrid topology composed of a switched converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. This topology can take advantage of the reduced slew-rate technique (also called slow-envelope technique) where switching dc-dc converter provides the RF envelope with limited slew rate in order to avoid high switching frequency and high power losses, while the linear regulator performs fine adjustment in order to obtain the exact replica of the RF envelope. The combination of this control technique with this topology is proposed in this paper. Envelopes with different bandwidth will be considered to optimize the efficiency of the dc-dc converter.

Envelope Amplifier Based on a Hybrid Series Converter With The Slow-envelope Technique

High frequency dc-dc switching converters are used as envelope amplifiers in RF transmitters. The dc-dc converter should operate at very high frequency to track an envelope in the MHz range to supply the power amplifier. One of the circuits suitable for this application is a hybrid topology composed of a switched converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. This topology can take advantage of the reduced slew-rate technique where switching dc-dc converter provides the RF envelope with limited slew rate in order to avoid high switching frequency and high power losses, while the linear regulator performs fine adjustment in order to obtain the exact replica of the RF envelope. The combination of this control technique with this topology is proposed in this paper. Envelopes with different bandwidth will be considered to optimize the efficiency of the dc-dc converter. The calculations and experiments have been done to track a 2MHz envelope in the range 0-12V for an EER RF transmitter.

Estudo comparativo de dois conversores Boost quadrático com comutação suave monochaveados para aplicação de rastreamento de máxima potência em sistemas fotovoltaicos

This paper makes a comparative study of two Soft Single Switched Quadratic Boost Converters (SSS1 and SSS2) focused on Maximum Power Point Tracking (MPPT) of a PV array using Perturb and Observe (P&O) algorithm. The proposed converters maintain the static gain characteristics and dynamics of the original converter with the advantage of considerably reducing the switching losses and Electromagnetic Interference (EMI). It is displayed the input voltage Quadratic Boost converter modeling; qualitative and quantitative analysis of soft switching converters, defining the operation principles, main waveforms, time intervals and the state variables in each operation steps, phase planes of resonant elements, static voltage gain expressions, analysis of voltage and current efforts in semiconductors and the operational curves at 200 W to 800 W. There are presented project of PI, PID and PID + Notch compensators for MPPT closed-loop system and resonant elements design. In order to analyze the operation of a complete photovoltaic system connected to the grid, it was chosen to simulate a three-phase inverter using the P-Q control theory of three-phase instantaneous power. Finally, the simulation results and experimental with the necessary comparative analysis of the proposed converters will be presented.

A switching control strategy for single and dual inductor push-pull converters

A switching control strategy is proposed for single and dual inductor current-fed push-pull converters. The proposed switching control strategy can be used with both current-fed push-pull converters with an active voltage doubler rectifier, or active rectifier, in the secondary side of the isolation transformer. The proposed switching control strategy makes turn-on and turn-off processes of the primary side power switches zero-voltage-switching and zero-current-switching respectively. The soft-switching operation of the single and dual inductor push-pull converters, with both types of active rectifier, is explained. Simulation and experimental results are provided to validate soft switching operation of the current-fed push-pull converters with the proposed switching control strategy.

IGBT converters conducted EMI analysis by controlled multiple-slope switching waveform approximation

IGBTs realise high-performance power converters. Unfortunately, with fast switching of the IGBT-free wheel diode chopper cell, such circuits are intrinsic sources of high-level EMI. Therefore, costly EMI filters or shielding are normally needed on the load and supply side. In order to design these EMI suppression components, designers need to predict the EMI level with reasonable accuracy for a given structure and operating mode. Simplifying the transient IGBT switching current and voltage into a multiple slope switching waveform approximation offers a feasible way to estimate conducted EMI with some accuracy. This method is dependent on the availability of high-fidelity measurements. Also, that multiple slope approximation needs careful and time-costly IGBT parameters optimisation process to approach the real switching waveform. In this paper, Active Voltage Control Gate Drive(AVC GD) is employed to shape IGBT switching into several defined slopes. As a result, Conducted EMI prediction by multiple slope switching approximation could be more accurate, less costly but more friendly for implementation. © 2013 IEEE.

Analytical calculation of resonant inductance for zero voltage switching in phase-shifted full-bridge converters

The phase shift full bridge (PSFB) converter allows high efficiency power conversion at high frequencies through zero voltage switching (ZVS); the parasitic drain-to-source capacitance of the MOSFET is discharged by a resonant inductance before the switch is gated resulting in near zero turn-on switching losses. Typically, an extra inductance is added to the leakage inductance of a transformer to form the resonant inductance necessary to charge and discharge the parasitic capacitances of the PSFB converter. However, many PSFB models do not consider the effects of the magnetizing inductance or dead-time in selecting the resonant inductance required to achieve ZVS. The choice of resonant inductance is crucial to the ZVS operation of the PSFB converter. Incorrectly sized resonant inductance will not achieve ZVS or will limit the load regulation ability of the converter. This paper presents a unique and accurate equation for calculating the resonant inductance required to achieve ZVS over a wide load range incorporating the effects of the magnetizing inductance and dead-time. The derived equations are validated against PSPICE simulations of a PSFB converter and extensive hardware experimentations.