981 resultados para silicon-on-insulator wafers


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摘要: In order to improve the total-dose radiation hardness of the buried oxide of separation by implanted oxygen silicon-on-insulator wafers, nitrogen ions were implanted into the buried oxide with a dose of 10(16)cm(-2), and subsequent annealing was performed at 1100 degrees C. The effect of annealing time on the radiation hardness of the nitrogen implanted wafers has been studied by the high frequency capacitance-voltage technique. The results suggest that the improvement of the radiation hardness of the wafers can be achieved through a shorter time annealing after nitrogen implantation. The nitrogen-implanted sample with the shortest annealing time 0.5 h shows the highest tolerance to total-dose radiation. In particular, for the 1.0 and 1.5 h annealing samples, both total dose responses were unusual. After 300-krad(Si) irradiation, both the shifts of capacitance-voltage curve reached a maximum, respectively, and then decreased with increasing total dose. In addition, the wafers were analysed by the Fourier transform infrared spectroscopy technique, and some useful results have been obtained.

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This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.

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In our work, nitrogen ions were implanted into separation-by-implantation-of-oxygen (SIMOX) wafers to improve the radiation hardness of the SIMOX material. The experiments of secondary ion mass spectroscopy (SIMS) analysis showed that some nitrogen ions were distributed in the buried oxide layers and some others were collected at the Si/SiO2 interface after annealing. The results of electron paramagnetic resonance (EPR) suggested the density of the defects in the nitrided samples changed with different nitrogen ion implantation energies. Semiconductor-insulator-semiconductor (SIS) capacitors were made on the materials, and capacitance-voltage (C-V) measurements were carried out to confirm the results. The super total dose radiation tolerance of the materials was verified by the small increase of the drain leakage current of the metal-oxide-semiconductor field effect transistor with n-channel (NMOSFETs) fabricated on the materials before and after total dose irradiation. The optimum implantation energy was also determined.

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Seeded zone-melt recrystallization using a dual electron beam system has been performed on silicon-on-insulator material, which was prepared with single-crystal silicon filling of the seed windows by selective epitaxial growth. The crystal quality has been assessed by a variety of microscopic techniques, and it is shown that single-crystal films 0.5-1.0 μm thick over 1.0 μm of isolating oxide may be prepared by this method. These films have considerably less lateral variation in thickness than standard material, in which the windows are not so filled. The filling method is suitable for both single- and multiple-layer silicon-on-insulator, and gives the advantages of excellent layer uniformity after recrystallization and improved planarity of the whole chip structure. Experiments using various amounts of seed window filling have shown that the lateral variations of silicon film thickness seen in unplanarized material are due to stress relief in the cap oxide when the silicon film is molten, rather than the effect previously postulated in which they were assumed to be due to the contraction of silicon on melting.