A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

Realisation of ternary sigma-delta modulated arithmetic processing modules

Sigma-delta modulated systems have a number of very appealing properties and are, therefore, heavily used in analog to digital converters, amplifiers, and modulators. This paper presents new results which indicate that they may also have significant potential for general purpose arithmetic processing.

Continous Time Sigma-Delta Modulator Employing a Novel Comparator Architecture

A novel comparator architecture is proposed for speed operation in low voltage environment. Performance comparison with a conventional regenerative comparator shows a speed-up of 41%. The proposed comparator is embedded in a continuous time sigma-delta ADC so as to reduce the quantizer delay and hence minimizes the excess loop delay problem. A performance enhancement of 1dB in the dynamic range of the ADC is achieved with this new comparator. We have implemented this ADC in a standard single-poly 8-Metal 0.13 mum UMC process. The entire system operates at 1.2 V supply providing a dynamic range of 32 dB consuming 720 muW of power and occupies an area of 0.1 mm2.

Sigma-Delta模数转换器的设计研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

高性能开关电流存储单元及其Sigma-Delta 调制器的研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

Methods for the transfer function design of multiple narrow-band bandpass sigma-delta modulators

This paper presents the design analysis of novel tunable narrow-band bandpass sigma-delta modulators, which can achieve concurrent multiple noise-shaping for multi-tone input signals. Four different design methodologies based on the noise transfer functions of comb filters, slink filters, multi-notch filters and fractional delay comb filters are applied for the design of these multiple-band sigma-delta modulators. The latter approach utilises conventional comb filters in conjunction with FIR, or allpass IIR fractional delay filters, to deliver the desired nulls for the quantisation noise transfer function. Detailed simulation results show that FIR fractional delay comb filter-based sigma-delta modulators tune accurately to most centre frequencies, but suffer from degraded resolution at frequencies close to Nyquist. However, superior accuracies are obtained from their allpass IIR fractional delay counterpart at the expense of a slight shift in noise-shaping bands at very high frequencies. The merits and drawbacks of each technique for the various sigma-delta topologies are assessed in terms of in-band signal-to-noise ratios, accuracy of tunability and coefficient complexity for ease of implementation.

Narrow-band variable center frequency single-loop and multistage sigma-delta modulators for bandpass signals

Oversampled narrow-band single-loop and multistage resonator-based bandpass sigma-delta (Σ-Δ) modulators that can accommodate different passband center to sampling frequency ratios are reported. These tunable bandpass configurations are designed by analytically determining and subsequently verifying through detailed empirical simulations the required compensation hardware to deliver enhanced noise-shaping. It is demonstrated that comparatively superior in-band signal-to-noise ratios and dynamic ranges are attributed to the inclusion of appropriate digital feedforward and feedback compensators within these structures.

Application of fractional delay filters to tune the centre frequency location of single-band sigma-delta modulators

This paper presents a novel technique for the design of narrow-band sigma-delta modulators with an embedded tunable centre frequency mechanism. This method demonstrates that the use of sum filters combined with a fractional delayer provide the flexibility of tuning the noise shaping band for any desired variable centre frequency input signal.