970 resultados para operational amplifier
Resumo:
Negative impedance converters (NIC's) may be used to realize negative driving-point impedances. The effect of the nonideal characteristics of the operational amplifier such as finite frequencydependent gain and output impedance on the performance of the negative impedances is analyzed. Detailed equivalent circuits showing the additional positive or negative inductive impedances due to the nonideal characteristics are given for negative resistance and negative capacitance realizations, and their relative performances are compared. The experimental results confirm the validity of the equivalent circuits. The effect of the slew rate of the operational amplifier on the maximum signal-handling capability (SHC) of the negative impedances at high frequencies is studied. Practical design considerations for achieving wider bandwidth as well as improved SHC are discussed.
Resumo:
Electrical circuit designers seldom create really new topologies or use old ones in a novel way. Most designs are known combinations of common configurations tailored for the particular problem at hand. In this thesis I show that much of the behavior of a designer engaged in such ordinary design can be modelled by a clearly defined computational mechanism executing a set of stylized rules. Each of my rules embodies a particular piece of the designer's knowledge. A circuit is represented as a hierarchy of abstract objects, each of which is composed of other objects. The leaves of this tree represent the physical devices from which physical circuits are fabricated. By analogy with context-free languages, a class of circuits is generated by a phrase-structure grammar of which each rule describes how one type of abstract object can be expanded into a combination of more concrete parts. Circuits are designed by first postulating an abstract object which meets the particular design requirements. This object is then expanded into a concrete circuit by successive refinement using rules of my grammar. There are in general many rules which can be used to expand a given abstract component. Analysis must be done at each level of the expansion to constrain the search to a reasonable set. Thus the rule of my circuit grammar provide constraints which allow the approximate qualitative analysis of partially instantiated circuits. Later, more careful analysis in terms of more concrete components may lead to the rejection of a line of expansion which at first looked promising. I provide special failure rules to direct the repair in this case.
Resumo:
Comparator based switched capacitor circuits provide an excellent opportunity to design sampled data systems where the virtual ground condition is detected rather than being continuously forced with negative feedback in Opamp based circuits. This work is an application of this concept to design a 1 st order 330 KHz cutoff frequency Lowpass filter operating at 10 MHz sampling frequency in 0.13μm technology and 1.2 V supply voltage. The Comparator Based Switched Capacitor (CBSC) filter is compared with conventional Two stage Miller compensated Operational amplifier based switched capacitor filter. It is shown that CBSC filter relaxes the constraints like speed ,linearity, gain, stability which would otherwise be hard to satisfy in scaled technologies in Opamp based circuits. The designed CBSC based lowpass filter provides significant power savings compared to traditional Opamp based switched capacitor filter.
Resumo:
The experimental portion of this thesis tries to estimate the density of the power spectrum of very low frequency semiconductor noise, from 10-6.3 cps to 1. cps with a greater accuracy than that achieved in previous similar attempts: it is concluded that the spectrum is 1/fα with α approximately 1.3 over most of the frequency range, but appearing to have a value of about 1 in the lowest decade. The noise sources are, among others, the first stage circuits of a grounded input silicon epitaxial operational amplifier. This thesis also investigates a peculiar form of stationarity which seems to distinguish flicker noise from other semiconductor noise.
In order to decrease by an order of magnitude the pernicious effects of temperature drifts, semiconductor "aging", and possible mechanical failures associated with prolonged periods of data taking, 10 independent noise sources were time-multiplexed and their spectral estimates were subsequently averaged. If the sources have similar spectra, it is demonstrated that this reduces the necessary data-taking time by a factor of 10 for a given accuracy.
In view of the measured high temperature sensitivity of the noise sources, it was necessary to combine the passive attenuation of a special-material container with active control. The noise sources were placed in a copper-epoxy container of high heat capacity and medium heat conductivity, and that container was immersed in a temperature controlled circulating ethylene-glycol bath.
Other spectra of interest, estimated from data taken concurrently with the semiconductor noise data were the spectra of the bath's controlled temperature, the semiconductor surface temperature, and the power supply voltage amplitude fluctuations. A brief description of the equipment constructed to obtain the aforementioned data is included.
The analytical portion of this work is concerned with the following questions: what is the best final spectral density estimate given 10 statistically independent ones of varying quality and magnitude? How can the Blackman and Tukey algorithm which is used for spectral estimation in this work be improved upon? How can non-equidistant sampling reduce data processing cost? Should one try to remove common trands shared by supposedly statistically independent noise sources and, if so, what are the mathematical difficulties involved? What is a physically plausible mathematical model that can account for flicker noise and what are the mathematical implications on its statistical properties? Finally, the variance of the spectral estimate obtained through the Blackman/Tukey algorithm is analyzed in greater detail; the variance is shown to diverge for α ≥ 1 in an assumed power spectrum of k/|f|α, unless the assumed spectrum is "truncated".
Resumo:
This paper presents an improvement of an IGBT gate drive implementing Active Voltage Control (AVC), and investigates the impact of various parameters affecting its performance. The effects of the bandwidths of various elements and the gains of AVC are shown in simulation and experimentally. Also, the paper proposes connecting a small Active Snubber between the IGBT collector and its gate integrated within the AVC. The effect of this snubber on enhancing the stability of the gate drive is demonstrated. It will be shown that using a wide bandwidth operational amplifier and integrating the Active Snubber within the gate drive reduces the minimum gate resistor required to achieve stability of the controller. Consequently, the response time of the IGBT to control signals is significantly reduced, the switching losses then can be minimised and, hence, the performance of gate drive as whole is improved. This reflects positively on turn-off and turn-on transitions achieving voltage sharing between the IGBTs connected in series to construct a higher voltage switch, making series IGBTs a feasible practice. ©2008 IEEE.
Resumo:
This work proposes a new methodology to verify those analog circuits, providing an automated tools to help the verifiers to have a more truthful result. This work presents the development of new methodology for analog circuits verification. The main goal is to provide a more automated verification process to certify analog circuits functional behavior. The proposed methodology is based on the golden model technique. A verification environment based on this methodology was built and results of a study case based on the validation of an operational amplifier design are offered as a confirmation of its effectiveness. The results had shown that the verification process was more truthful because of the automation provided by the tool developed
Resumo:
Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
Resumo:
Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
Resumo:
Pós-graduação em Engenharia Elétrica - FEIS
Resumo:
A caracterização dielétrica de um material pode ser usada como uma técnica não destrutiva para avaliar e monitorar sua qualidade, bem como no entendimento da relação estrutura-propriedade de um material, através de suas propriedades dielétricas em função da frequência, temperatura, composição química do material, dentre outros. Na literatura há escassez de trabalhos e dados de caracterização dielétrica de filmes a base de biopolímeros. Diante desse contexto, o objetivo deste trabalho foi o desenvolvimento e a construção de uma instrumentação alternativa a equipamentos disponíveis no mercado, como analisadores de rede e de impedância, que pudesse ser utilizada para a caracterização dielétrica de filmes biodegradáveis a base de gelatina. Foi utilizado o método de placas paralelas na determinação da parte real da permissividade conhecida como permissividade relativa ou constante dielétrica (ε\'). O circuito utilizado para a instrumentação foi um oscilador astável com funcionamento baseado no amplificador operacional (741) chaveado pela carga de um capacitor de placas paralelas cujo dielétrico foi uma amostra de filme biodegradável. A partir dos valores da frequência de oscilação e geometria do capacitor, foi possível calcular a capacitância de cada amostra e, consequentemente obter os valores da permissividade relativa do filme, usando relações básicas bem estabelecidas. Os filmes de gelatina foram produzidos pela técnica de casting sendo utilizados como plastificantes o glicerol (G), o sorbitol (S) e suas misturas, na proporção (G:S) de 30:70, 50:50 e 70:30. Os filmes foram caracterizados quanto à umidade e cristalinidade. A permissividade relativa (ε\') dos filmes, determinada a temperatura ambiente, foi avaliada em função da frequência (5 a 50 kHz), tempo de armazenamento, do teor de umidade e tipo de plastificante. A instrumentação projetada e construída foi capaz de medir com precisão a permissividade relativa das amostras, sendo que essa propriedade diminuiu com o aumento da frequência para todos os filmes. Mantendo-se a frequência constante, não houve variação de ε\' para os filmes de gelatina, independente do plastificante, ao longo de um mês de armazenamento a 24 ± 3 °C. O efeito da umidade foi observado em frequências menores que 25 kHz, sendo que quanto maior o teor de umidade maior a permissividade relativa. O efeito do tipo de plastificante na permissividade relativa dos filmes foi observado a baixas frequências (5 kHz) e filmes plastificados com sorbitol apresentaram maiores valores de ε\'. Os filmes plastificados com maior teor de umidade apresentaram menor cristalinidade, portanto maior mobilidade molecular e consequentemente maior a permissividade relativa.
Resumo:
In this work, we report on the significance of gate-source/drain extension region (also known as underlap design) optimization in double gate (DG) FETs to improve the performance of an operational transconductance amplifier (OTA). It is demonstrated that high values of intrinsic voltage gain (A(VO_OTA)) > 55 dB and unity gain frequency (f(T_OTA)) similar to 57 GHz in a folded cascode OTA can be achieved with gate-underlap channel design in 60 nm DG MOSFETs. These values correspond to 15 dB improvement in A(VO_OTA) and three fold enhancement in f(T_OTA) over a conventional non-underlap design. OTA performance based on underlap single gate SOI MOSFETs realized in ultra-thin body (UTB) and ultra-thin body BOX (UTBB) technologies is also evaluated. A(VO_OTA) values exhibited by a DG MOSFET-based OTA are 1.3-1.6 times higher as compared to a conventional UTB/UTBB single gate OTA. f(T_OTA) values for DG OTA are 10 GHz higher for UTB OTAs whereas a twofold improvement is observed with respect to UTBB OTAs. The simultaneous improvement in A(VO_OTA) and f(T_OTA) highlights the usefulness of underlap channel architecture in improving gain-bandwidth trade-off in analog circuit design. Underlap channel OTAs demonstrate high degree of tolerance to misalignment/oversize between front and back gates without compromising the performance, thus relaxing crucial process/technology-dependent parameters to achieve 'idealized' DG MOSFETs. Results show that underlap OTAs designed with a spacer-to-straggle (s/sigma) ratio of 3.2 and operated below a bias current (IBIAS) of 80 mu A demonstrate optimum performance. The present work provides new opportunities for realizing future ultra-wide band OTA design with underlap DG MOSFETs.
Resumo:
The deviation in the performance of active networks due to practical operational amplifiers (OA) is mainly because of the finite gain bandwidth productBand nonzero output resistanceR_0. The effect ofBandR_0on two OA impedances and single and multi-OA filters are discussed. In filters, the effect ofR_0is to add zeros to the transfer function often making it nonminimum phase. A simple method of analysis has been suggested for 3-OA biquad and coupled biquad circuits. A general method of noise minimization of the generalized impedance converter (GIC), while operating OA's within the prescribed voltage and current limits, is also discussed. The 3-OA biquadratic sections analyzed also exhibit noise behavior and signal handling capacity similar to the GIC. The GIC based structures are found to be better than other configurations both in biquadratic sections and direct realizations of higher order transfer functions.