A 1.2 V low noise amplifier with double feedback for high gain and low noise figure

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e de Computadores

Noise Figure Measurement of Differential Amplifiers Using non-Ideal Baluns

This paper analyzes the noise and gain measurement of microwave differential amplifiers using two passive baluns. A general model of the baluns is considered, including potential losses and phase/amplitude unbalances. This analysis allows de-embedding the actual gain and noise performance of the isolated amplifier by using single-ended measurements of the cascaded system and baluns. Finally, measured results from two amplifier prototypes are used to validate the theoretical principles.

Organizational, DS, GS, and depot maintenance manual : Hewlett-Packard noise figure meter model 342A and noise source model 349A.

"September 1967."

A 5GHz1.8V Low Power CMOS Low-Noise Amplifier

Wireless local-area networks (WLANs) have been deployed as office and home communications infrastructures worldwide. The diversification of the standards, such as IEEE 802.11 series demands the design of RF front-ends. Low power consumption is one of the most important design concerns in the application of those technologies. To maintain competitive hardware costs, CMOS has been used since it is the best solution for low cost and high integration processing, allowing analog circuits to be mixed with digital ones. In the receiver chain, the low noise amplifier (LNA) is one of the most critical blocks in a transceiver design. The sensitivity is mainly determined by the LNA noise figure and gain. It interfaces with the pre-select filter and the mixer. Furthermore, since it is the first gain stage, care must be taken to provide accurate input match, low-noise figure, good linearity and a sufficient gain over a wide band of operation. Several CMOS LNAs have been reported during the last decade, showing that the most research has been done at 802.11/b and GSM standards (900-2400MHz spectrum) and more recently at 802.11/a (5GHz band). One of the more significant disadvantages of 802.11/b is that the frequency band is crowded and subject to interference from other technologies, as is 2.4GHz cordless phones and Bluetooth. As the demand for radio-frequency integrated circuits, operating at higher frequency bands, increases, the IEEE 802.11/a standard becomes a very attractive option to wireless communication system developers. This paper presents the design and implementation of a low power, low noise amplifier aimed at IEEE 802.11a for WLAN applications. It was designed to be integrated with an active balun and mixer, representing the first step toward a fully integrated monolithic WLAN receiver. All the required circuits are integrated at the same die and are powered by 1.8V supply source. Preliminary experimental results (S-parameters) are shown and promise excellent results. The LNA circuit design details are illustrated in Section 2. Spectre simulation results focused at gain, noise figure (NF) and input/output matching are presented in Section 3. Finally, conclusions and comparison with other recently reported LNAs are made in Section 4, followed by future work.

Wideband CMOS low noise amplifiers

Modern fully integrated receiver architectures, require inductorless circuits to achieve their potential low area, low cost, and low power. The low noise amplifier (LNA), which is a key block in such receivers, is investigated in this thesis. LNAs can be either narrowband or wideband. Narrowband LNAs use inductors and have very low noise figure, but they occupy a large area and require a technology with RF options to obtain inductors with high Q. Recently, wideband LNAs with noise and distortion cancelling, with passive loads have been proposed, which can have low NF, but have high power consumption. In this thesis the main goal is to obtain a very low area, low power, and low-cost wideband LNA. First, it is investigated a balun LNA with noise and distortion cancelling with active loads to boost the gain and reduce the noise figure (NF). The circuit is based on a conventional balun LNA with noise and distortion cancellation, using the combination of a common-gate (CG) stage and common-source (CS) stage. Simulation and measurements results, with a 130 nm CMOS technology, show that the gain is enhanced by about 3 dB and the NF is reduced by at least 0.5 dB, with a negligible impact on the circuit linearity (IIP3 is about 0 dBm). The total power dissipation is only 4.8 mW, and the active area is less than 50 x 50 m2 . It is also investigated a balun LNA in which the gain is boosted by using a double feedback structure.We propose to replace the load resistors by active loads, which can be used to implement local feedback loops (in the CG and CS stages). This will boost the gain and reduce the noise figure (NF). Simulation results, with the same 130 nm CMOS technology as above, show that the gain is 24 dB and NF is less than 2.7 dB. The total power dissipation is only 5.4 mW (since no extra blocks are required), leading to a figure-of-merit (FoM) of 3.8 mW

Thermodynamical Phase Noise in Oscillators Based on L-C Resonators

Using a new Admittance-based model for electrical noise able to handle Fluctuations and Dissipations of electrical energy, we explain the phase noise of oscillators that use feedback around L-C resonators. We show that Fluctuations produce the Line Broadening of their output spectrum around its mean frequency f0 and that the Pedestal of phase noise far from f0 comes from Dissipations modified by the feedback electronics. The charge noise power 4FkT/R C2/s that disturbs the otherwise periodic fluctuation of charge these oscillators aim to sustain in their L-C-R resonator, is what creates their phase noise proportional to Leeson’s noise figure F and to the charge noise power 4kT/R C2/s of their capacitance C that today’s modelling would consider as the current noise density in A2/Hz of their resistance R. Linked with this (A2/Hz?C2/s) equivalence, R becomes a random series in time of discrete chances to Dissipate energy in Thermal Equilibrium (TE) giving a similar series of discrete Conversions of electrical energy into heat when the resonator is out of TE due to the Signal power it handles. Therefore, phase noise reflects the way oscillators sense thermal exchanges of energy with their environment.

Thermodynamical Phase Noise in Oscillators Based on L-C Resonators (Foundations)

Using a new Admittance-based model for electrical noise able to handle Fluctuations and Dissipations of electrical energy, we explain the phase noise of oscillators that use feedback around L-C resonators. We show that Fluctuations produce the Line Broadening of their output spectrum around its mean frequency f0 and that the Pedestal of phase noise far from f0 comes from Dissipations modified by the feedback electronics. The charge noise power 4FkT/R C2/s that disturbs the otherwise periodic fluctuation of charge these oscillators aim to sustain in their L-C-R resonator, is what creates their phase noise proportional to Leeson’s noise figure F and to the charge noise power 4kT/R C2/s of their capacitance C that today’s modelling would consider as the current noise density in A2/Hz of their resistance R. Linked with this (A2/Hz?C2/s) equivalence, R becomes a random series in time of discrete chances to Dissipate energy in Thermal Equilibrium (TE) giving a similar series of discrete Conversions of electrical energy into heat when the resonator is out of TE due to the Signal power it handles. Therefore, phase noise reflects the way oscillators sense thermal exchanges of energy with their environment

A Decade-Bandwidth Low-Noise Mixer RFIC with a Distortion-Canceling Output Amplifier

This paper presents a 1-10 GHz low-noise downconvert mixer RFIC suitable for wideband receivers. A switched transconductor mixing core is adopted to reduce noise at high frequencies. By adding a series inductor to the RF transconductor, a flat 4-5 dB noise figure (NF) and a high gain of 26.5 dB can be achieved over a broad bandwidth out to 10 GHz. A CMOS output amplifier is also integrated on-chip, employing derivative superposition (DS) for high linearity and an OIP3 of 16.5 dBm. The circuit consumes less than 20 mW of dc power and occupies an active chip area of less than 0.2 mm2.

RF Receiver Front End for 28.5 GHz Applications on a 70 GHz F-T SiGe BiCMOS Process

This article presents the design and test of a receiver front end aimed at LMDS applications at 28.5 GHz. It presents a system-level design after which the receiver was designed. The receiver comprises an LNA, quadrature mixer and quadrature local oscillator. Experimental results at 24 GHz center frequency show a conversion voltage gain of 15 dB and conversion noise figure of 14 5 dB. The receiver operates from a 2 5 V power supply with a total current consumption of 31 mA.

A 5GHz/1.8V CMOS Active Balun Integrated with LNA

The development of high performance monolithic RF front-ends requires innovative RF circuit design to make the best of a good technology. A fully differential approach is usually preferred, due to its well-known properties. Although the differential approach must be preserved inside the chip, there are cases where the input signal is single-ended such as RF image filters and IF filters in a RF receiver. In these situations, a stage able to convert single-ended into differential signals (balun) is needed. The most cited topology, which is capable of providing high gain, consists on a differential stage with one of the two inputs grounded. Unfortunately, this solution has some drawbacks when implemented monolithically. This work presents the design and simulated results of an innovative high-performance monolithic single to differential converter, which overcomes the limitations of the circuits.The integration of the monolithic active balun circuit with an LNA on a 0.18μm CMOS process is also reported. The circuits presented here are aimed at 802.11a. Section 2 describes the balun circuit and section 3 presents its performance when it is connected to a conventional single-ended LNA. Section 4 shows the simulated performance results focused at phase/amplitude balance and noise figure. Finally, the last section draws conclusions and future work.

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Low cost BIST techniques for linear and non-linear analog circuits

With the ever increasing demands for high complexity consumer electronic products, market pressures demand faster product development and lower cost. SoCbased design can provide the required design flexibility and speed by allowing the use of IP cores. However, testing costs in the SoC environment can reach a substantial percent of the total production cost. Analog testing costs may dominate the total test cost, as testing of analog circuits usually require functional verification of the circuit and special testing procedures. For RF analog circuits commonly used in wireless applications, testing is further complicated because of the high frequencies involved. In summary, reducing analog test cost is of major importance in the electronic industry today. BIST techniques for analog circuits, though potentially able to solve the analog test cost problem, have some limitations. Some techniques are circuit dependent, requiring reconfiguration of the circuit being tested, and are generally not usable in RF circuits. In the SoC environment, as processing and memory resources are available, they could be used in the test. However, the overhead for adding additional AD and DA converters may be too costly for most systems, and analog routing of signals may not be feasible and may introduce signal distortion. In this work a simple and low cost digitizer is used instead of an ADC in order to enable analog testing strategies to be implemented in a SoC environment. Thanks to the low analog area overhead of the converter, multiple analog test points can be observed and specific analog test strategies can be enabled. As the digitizer is always connected to the analog test point, it is not necessary to include muxes and switches that would degrade the signal path. For RF analog circuits, this is specially useful, as the circuit impedance is fixed and the influence of the digitizer can be accounted for in the design phase. Thanks to the simplicity of the converter, it is able to reach higher frequencies, and enables the implementation of low cost RF test strategies. The digitizer has been applied successfully in the testing of both low frequency and RF analog circuits. Also, as testing is based on frequency-domain characteristics, nonlinear characteristics like intermodulation products can also be evaluated. Specifically, practical results were obtained for prototyped base band filters and a 100MHz mixer. The application of the converter for noise figure evaluation was also addressed, and experimental results for low frequency amplifiers using conventional opamps were obtained. The proposed method is able to enhance the testability of current mixed-signal designs, being suitable for the SoC environment used in many industrial products nowadays.

Design of a LNA and a Gilbert Cell Mixer MMICs with a GaAsPHEMT technology

The design of a Gilbert Cell Mixer and a low noise amplifier (LNA), using GaAs PHEMT technology is presented. The compatibility is shown for co-integration of both block on the same chip, to form a high performance 1.9 GHz receiver front end. The designed LNA shows 9.23 dB gain and 2.01 dB noise figure (NF). The mixer is designed to operate at RF=1.9 GHz, LO=2.0 GHz and IF=100 MHz with a gain of 14.3 dB and single sideband noise figure (SSB NF) of 9.6 dB. The mixer presents a bandwith of 8 GHz.

Design of a LNA and a Gilbert Cell Mixer MMICs with a GaAs PHEMT technology

The design of a Gilbert Cell Mixer and a low noise amplifier (LNA), using GaAs PHEMT technology is presented. The compatibility is shown for co-integration of both block on the same chip, to form a high performance 1.9 GHz receiver front-end. The designed LNA shows 9.23 dB gain and 2.01 dB noise figure (NF). The mixer is designed to operate at RF=1.9 GHz, LO=2.0 GHz and IF=100 MHz with a gain of 14.3 dB and single sideband noise figure (SSB NF) of 9.6 dB. The mixer presents a bandwith of 8 GHz.

Contribución a los arrays de antenas activos en microondas = Contribution to active array antennas at microwave bands

Esta tesis que tiene por título "Contribución a los arrays de antenas activos en banda X", ha sido desarrollada por el estudiante de doctorado Gonzalo Expósito Domínguez, ingeniero de telecomunicación en el Grupo de Radiación del Departamento de Señales, Sistemas y Radiocomunicaciones de la ETSI de Telecomunicación de la Universidad Politécnica de Madrid bajo la dirección de los doctores Manuel Sierra Castañer y José Manuel Fernández González. Esta tesis contiene un profundo estudio del arte en materia de antenas activas en el campo de apuntamiento electrónico. Este estudio comprende desde los fundamentos de este tipo de antenas, problemas de operación y limitaciones hasta los sistemas actuales más avanzados. En ella se identifican las partes críticas en el diseño y posteriormente se llevan a la práctica con el diseño, simulación y construcción de un subarray de una antena integrada en el fuselaje de un avión para comunicaciones multimedia por satélite que funciona en banda X. El prototipo consta de una red de distribución multihaz de banda ancha y una antena planar. El objetivo de esta tesis es el de aplicar nuevas técnicas al diseño de antenas de apuntamiento electrónico. Es por eso que las contribuciones originales son la aplicación de barreras electromagnéticas entre elementos radiantes para reducir los acoplamientos mutuos en arrays de exploración electrónica y el diseño de redes desfasadoras sencillas en las que no son necesarios complejos desfasadores para antenas multihaz. Hasta la fecha, las barreras electromagnéticas, Electronic Band Gap (EBG), se construyen en sustratos de permitividad alta con el fin de aumentar el espacio disponible entre elementos radiantes y reducir el tamaño de estas estructuras. Sin embargo, la utilización de sustratos de alta permitividad aumenta la propagación por ondas de superficie y con ellas el acoplo mutuo. Utilizando sustratos multicapa y colocando la vía de las estructuras en su borde, en vez de en su centro, se consigue reducir el tamaño sin necesidad de usar sustratos de alta permitividad, reducir la eficiencia de radiación de la antena o aumentar la propagación por ondas de superficie. La última parte de la tesis se dedica a las redes conmutadoras y desfasadoras para antenas multihaz. El diseño de las redes de distribución para antenas son una parte crítica ya que se comportan como un atenuador a la entrada de la cadena receptora, modificando en gran medida la figura de ruido del sistema. Las pérdidas de un desfasador digital varían con el desfase introducido, por ese motivo es necesario caracterizar y calibrar los dispositivos correctamente. Los trabajos presentados en este manuscrito constan de un desfasador reflectivo con un conmutador doble serie paralelo para igualar las pérdidas de inserción en los dos estados y también un conmutador de una entrada y dos salidas cuyos puertos están adaptados en todo momento independientemente del camino del conmutador para evitar las reflexiones y fugas entre redes o elementos radiantes. El tomo finaliza con un resumen de las publicaciones en revistas científicas y ponencias en congresos, nacionales e internacionales, el marco de trabajo en el que se ha desarrollado, las colaboraciones que se han realizado y las líneas de investigación futuras. ABSTRACT This thesis was carried out in the Radiation Group of the Signals, Systems and Radiocomunications department of ETSI de Telecomunicación from Technical University of Madrid. Its title is "Contribution to active array antennas at X band" and it is developed by Gonzalo Expósito Domínguez, Electrical Engineer MsC. under the supervision of Prof. Dr. Manuel Sierra Castañer and Dr. José Manuel Fernández González. This thesis is focused on active antennas, specifically multibeam and electronic steering antenas. In the first part of the thesis a thorough description of the state of the art is presented. This study compiles the fundamentals of this antennas, operation problems and limits, up to the breakthrough applications. The critical design problems are described to use them eventually in the design, simulation and prototyping of an airborne steering array antenna for satellite communication at X band. The main objective of this thesis is to apply new techniques to the design of electronically steering antennas. Therefore the new original contributions are the application of Electromagnetic Band Gap materials (EBG) between radiating elements to reduce the mutual coupling when phase shift between elements exist and phase shifting networks where special characteristics are required. So far, the EBG structures have been constructed with high permitivity substrates in order to increase the available space between radiating elements and reduce the size of the structures. However, the surface wave propagation modes are enhanced and therefore the mutual coupling increases when high permitivity substrates are used. By using multilayered substrates and edge location via, the size is reduced meanwhile low permitivity substrates are used without reducing the radiation efficiency or enhancing the surface propagation modes. The last part of the thesis is focused on the phase shifting distribution networks for multibeam antennas. This is a critical part in the antenna design because the insertion loss in the distribution network behaves as an attenuator located in the first place in a receiver chain. The insertion loss will affect directly to the receiver noise figure and the insertion loss in a phase shifter vary with the phase shift. Therefore the devices must be well characterized and calibrated in order to obtain a properly operation. The work developed in this thesis are a reflective phase shifter with a series-shunt switch in order to make symmetrical the insertion loss for the two states and a complex Single Pole Double Through (SPDT) with matched ports in order to reduce the reflections and leakage between feeding networks and radiating elements. The end of this Ph D. dissertation concludes with a summary of the publications in national and international conferences and scientific journals, the collaborations carried out along the thesis and the future research lines.