Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

Optical properties of silver nanowires grown electrochemically in nanoporous alumina

We report fabrication and optical properties of electrochemically deposited silver nanowires into nanoporous alumina template. A finite element method is used to study plasmonic coupling of dipole emitters with the silver nanowires.

Optical read-out scheme based on Grated Waveguide Cantilever cavity resonance for interrogation of cantilever sensor arrays

The design and analysis of an optical read-out scheme based on a grated waveguide (GWG) resonator for interrogating microcantilever sensor arrays is presented. The optical system consisting of a micro cantilever monolithically integrated in proximity to a grated waveguide (GWG), is realized in silicon optical bench platform. The mathematical analysis of the optical system is performed using a Fabry-Perot interferometer model with a lossy cavity formed between the cantilever and the GWG and an analytical expression is derived for the optical power transmission as a function of the cantilever deflection which corresponds to cavity width variation. The intensity transmission of the optical system for different cantilever deflections estimated using the analytical expression captures the essential features exhibited by a FDTD numerical model.

Effect of FIB milling on MEMS SOI cantilevers

Stress induced by Focused Ion Beam (FIB) milling of cantilevers fabricated on silicon-on-insulator (SOI) wafer has been studied. Milling induces stress gradients ranging from -10MPa/μm to -120MPa/μm, depending on the location of cantilevers from the point of milling. Simulations were done to estimate the stress in the milled cantilevers.

Structural and optical characterization of vertical GaAs/GaP core-shell nanowires grown on Si substrates

GaAs nanowires were grown on Si (111) substrates. By coating a thin GaAs buffer layer on Si surface and using a two-temperature growth, the morphology and crystal structure of GaAs nanowires were dramatically improved. The strained GaAs/GaP core-shell nanowires, based on the improved GaAs nanowires with a shell thickness of 25 nm, showed a significant shift in emission energy of 260 meV from the unstrained GaAs nanowires. © 2010 IEEE.

Characterisation of nanostructures via terahertz spectroscopy

We have used terahertz spectroscopy to measure the conductivity and time-resolved photoconductivity of a range of semiconducting nanostructures. This article focuses on our recent terahertz conductivity studies on semiconductor nanowires and single walled carbon nanotubes. © 2010 IEEE.

A comparative study of transistors based on wurtzite and zincblende InAs nanowires

We report a comparative study of the electronic properties of nominally identical nanowire field-effect transistor (NW-FET) devices produced using 50 nm diameter InAs nanowires that differ only in phase: ZB on the one hand, and WZ on the other. We find much higher current densities in the ZB NW-FETs, and on/off ratios of up to 100. © 2010 IEEE.

Au-catalyzed InP nanowires: The influence of growth temperature and V/III ratio

Growth of Au-catalyzed InP nanowires (NWs) by metalorganic chemical vapor deposition (MOCVD) has been studied in the temperature range of 400-510 °C and V/III ratio of 44-700. We demonstrate that minimal tapering of InP NWs can be achieved at 400 °C and V/III ratio of 350. Zinc-blende (ZB) or wurtzite (WZ) NWs is obtained depending on the growth conditions. 4K microphotoluminescence (μ-PL) studies show that emission energy is blue-shifted as growth temperature increases. By changing these growth parameters, one can tune the emission wavelength of InP NWs which is attractive for applications in developing novel optoelectronic devices. © 2010 IEEE.

Effect of high temperature post-annealing on sidewalls of GaAs NWs grown by MOCVD

The sidewall facets of GaAs nanowires (NWs) were studied. It has been found that the sidewalls of GaAs NWs grown at 450 °C are {112} facets. However, the sidewalls of GaAs NWs start to become {110} during the postannealing at 650 °C for 30 min. © 2010 IEEE.

Growth behavior of epitaxial semiconductor axial nanowire heterostructures

In this paper, we demonstrate the key issues of axial nanowire heterostructures, such as, the fundamental criteria for formation and failure of axial nanowire heterostructures via vapor-liquid-solid mechanism and lateral misfit strain relaxation in these structures. We show the failure of axial nanowire heterostructures by growing InAs axially on GaAs nanowires, and the lateral misfit strain relaxation by axial growth of GaSb on GaAs nanowires. © 2008 IEEE.

Optimised two-temperature growth of GaAs nanowire s by metalorganic chemical vapour deposition

We report a two-temperature procedure for the growth of GaAs nanowires by metalorganic chemical vapour deposition. An initial high temperature step affords effective nucleation and promotes epitaxial growth of straight (111)B-oriented nanowires. Lower temperatures are employed subsequently, to minimise nanowire tapering during growth. © 2006 IEEE.

Studies on RF Magnetron Sputtered HfO2 Thin Films for Microelectronic Applications

We investigated the effect of oxygen flow rate during the reactive magnetron sputtering on the compositional, structural, optical and electrical properties of HfO2 films. We also studied the influence of annealing temperature on the structural and electrical properties of optimized HfO2 films of 25 to 30 nm thick. X-ray photoelectron study reveals that the films deposited at 15 SCCM of oxygen flow rate are stoichiometric and have an optical band gap of 5.86 eV. X-ray diffraction indicates that films without oxygen flow are amorphous, and beyond an oxygen flow rate of 5 SCCM exhibit polycrystalline monoclinic structure. At an annealing temperature of 600 degrees C, tetragonal phase was observed besides the monoclinic phase. The dielectric constant of 11 and low leakage currents of 1 x 10(-7) A/cm(2) were achieved for the stoichiometric films. As-deposited films show significant frequency dispersion due to the presence of defect states at the HfO2/Si interface, and it reduces after annealing.

Investigating carbon materials for use as the electron emission source in a parallel electron-beam lithography system

A microelectronic parallel electron-beam lithography system using an array of field emitting microguns is currently being developed. This paper investigates the suitability of various carbon based materials for the electron source in this device, namely tetrahedrally bonded amorphous carbon (ta-C), nanoclustered carbon and carbon nanotubes. Ta-C was most easily integrated into a gated field emitter structure and various methods, such as plasma and heavy ion irradiation, were used to induce emission sites in the ta-C. However, the creation of such emission sites at desired locations appeared to be difficult/random in nature and thus the material was unsuitable for this application. In contrast, nanoclustered carbon material readily field emits with a high site density but the by-products from the deposition process create integration issues when using the material in a microelectronic gated structure. Carbon nanotubes are currently the most promising candidate for use as the emission source. We have developed a high yield and clean (amorphous carbon by-product free) PECVD process to deposit single free standing nanotubes at desired locations with exceptional uniformity in terms of nanotube height and diameter. Field emission from an array of nanotubes was also obtained. © 2001 Elsevier Science B.V.

Materials and devices toward three-dimensional integration

It has been shown that the apparent benefits of a two-layer stacked SOI system, i.e. packing density and speed improvements, are less than could be expected in the context of a VLSI requirement [1]. In this project the stacked SOI system has been identified as having major application in the realization of integrated, mixed technology systems. Zone-melting-recrystallization (ZMR) with lasers and electron beams have been used to produce device quality SOI material and a small test-bed circuit has been designed as a demonstration of the feasibility of this approach. © 1988.