The image coding scheme based on neural network and SVM

This paper applies data coding thought, which based on the virtual information source modeling put forward by the author, to propose the image coding (compression) scheme based on neural network and SVM. This scheme is composed by "the image coding (compression) scheme based oil SVM" embedded "the lossless data compression scheme based oil neural network". The experiments show that the scheme has high compression ratio under the slightly damages condition, partly solve the contradiction which 'high fidelity' and 'high compression ratio' cannot unify in image coding system.

SPECK-Based Lossless Multispectral Image Coding

This letter proposes an efficient extension of the set partitioning embedded block (SPECK) algorithm to lossless multispectral image coding. Such a wavelet-based coder is widely referred to in the literature, especially for lossless image coding, and is considered to be one of the most efficient techniques exhibiting very low computational complexity when compared with other state-of-the-art coders. The modification proposed in this letter is simple and provides significant improvement over the conventional SPECK. The key idea is to join each group of two consecutive wavelet-transformed spectral bands during the SPECK coding since they show high similarities with respect to insignificant sets at the same locations. Simulation results, carried out on a number of test images, demonstrate that this grouping procedure considerably saves on the bit budget for encoding the multispectral images.

VLSI architectures for digital image coding

A number of high-performance VLSI architectures for real-time image coding applications are described. In particular, attention is focused on circuits for computing the 2-D DCT (discrete cosine transform) and for 2-D vector quantization. The former circuits are based on Winograd algorithms and comprise a number of bit-level systolic arrays with a bit-serial, word-parallel input. The latter circuits exhibit a similar data organization and consist of a number of inner product array circuits. Both circuits are highly regular and allow extremely high data rates to be achieved through extensive use of parallelism.