933 resultados para high temperature annealing


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We have studied the effects of rapid thermal annealing at 1300¿°C on GaN epilayers grown on AlN buffered Si(111) and on sapphire substrates. After annealing, the epilayers grown on Si display visible alterations with craterlike morphology scattered over the surface. The annealed GaN/Si layers were characterized by a range of experimental techniques: scanning electron microscopy, optical confocal imaging, energy dispersive x-ray microanalysis, Raman scattering, and cathodoluminescence. A substantial Si migration to the GaN epilayer was observed in the crater regions, where decomposition of GaN and formation of Si3N4 crystallites as well as metallic Ga droplets and Si nanocrystals have occurred. The average diameter of the Si nanocrystals was estimated from Raman scattering to be around 3¿nm. Such annealing effects, which are not observed in GaN grown on sapphire, are a significant issue for applications of GaN grown on Si(111) substrates when subsequent high-temperature processing is required.

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Natural silicate mineral of zoisite, Ca(2)Al(3)(SiO(4))(Si(2)O(7))O(OH), has been investigated concerning gamma-radiation, UV-radiation and high temperature annealing effects on thermoluminescence (TL). X-ray diffraction (XRD) measurement confirmed zoisite structure and X-ray fluorescence (XRF) analysis revealed besides Si, Al and Ca that are the main crystal components, other oxides of Fe, Mg, Cr, Na, K, Sr, Ti, Ba and Mn which are present in more than 0.05 wt%. The TL glow curve of natural sample contains (130-150), (340-370) and (435-475)degrees C peaks. Their shapes indicated a possibility that they are result of composition of two or more peaks strongly superposed, a fact confirmed by deconvolution method. Once pre-annealed at 600 degrees C for 1 h, the shape of the glow curves change and the zoisite acquires high sensitivity. Several peaks between 100 and 400 degrees C appear superposed, and the high temperature peak around 435 degrees C cannot be seen. The ultraviolet radiation, on the other hand, produces one TL peak around 130 degrees C and the second one around 200 degrees C and no more. (C) 2010 Elsevier B.V. All rights reserved.

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Long period gratings have been inscribed in standard single mode fibre using a fs laser system, a fusion arc and a UV laser and a comparative study carried out of their thermal behaviour. The fs laser induced gratings can survive temperatures in excess of 800°C, however the inscription process can induce considerable birefringence within the device. Annealing studies have been carried out showing that below 600°C, all three grating types show a blue shift in their room temperature resonance wavelengths following cyclic heating, while above 600°C, the UV and arc induced LPGs exhibit a red shift, with the fs LPG showing an even stronger blue shift. High temperature annealing is also shown to considerably reduce the birefringence induced by the fs inscription process.

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Long period gratings have been inscribed in standard single mode fibre using a fs laser system, a fusion arc and a UV laser and a comparative study carried out of their thermal behaviour. The fs laser induced gratings can survive temperatures in excess of 800°C, however the inscription process can induce considerable birefringence within the device. Annealing studies have been carried out showing that below 600°C, all three grating types show a blue shift in their room temperature resonance wavelengths following cyclic heating, while above 600°C, the UV and arc induced LPGs exhibit a red shift, with the fs LPG showing an even stronger blue shift. High temperature annealing is also shown to considerably reduce the birefringence induced by the fs inscription process.

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This work describes the influence of a high annealing temperature of about 700C on the Si(substrate)/Si3N4/TiOx/Pt/LiCoO2 multilayer system for the fabrication of all-solid-state lithium ion thin film microbatteries. Such microbatteries typically utilize lithium cobalt oxide (LiCoO2) as cathode material with a platinum (Pt) current collector. Silicon nitride (Si3N4) is used to act as a barrier against Li diffusion into the substrate. For a good adherence between Si3N4 and Pt, commonly titanium (Ti) is used as intermediate layer. However, to achieve crystalline LiCoO2 the multilayer system has to be annealed at high temperature. This post-treatment initiates Ti diffusion into the Pt-collector and an oxidation to TiOx, leading to volume expansion and adhesion failures. To solve this adhesion problem, we introduce titanium oxide (TiOx) as an adhesion layer, avoiding the diffusion during the annealing process. LiCoO2, Pt and Si3N4 layers were deposited by magnetron sputtering and the TiOx layer by thermal oxidation of Ti layers deposited by e-beam technique. Asdeposited and annealed multilayer systems using various TiOx layer thicknesses were studied by scanning electron microscopy (SEM) and time-of-flight secondary ion mass spectrometry (ToF-SIMS) and x-ray photoelectron spectroscopy (XPS). The results revealed that an annealing process at temperature of 700C leads to different interactions of Ti atoms between the layers, for various TiOx layer thicknesses (25–45 nm).

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The scope of this work is the systematic study of the silicidation process affecting tungsten filaments at high temperature (1900ºC) used for silane decomposition in the hot-wire chemical vapour deposition technique (HWCVD). The correlation between the electrical resistance evolution of the filaments, Rfil(t), and the different stages of the their silicidation process is exposed. Said stages correspond to: the rapid formation of two WSi2 fronts at the cold ends of the filaments and their further propagation towards the middle of the filaments; and, regarding the hot central portion of the filaments: a initial stage of silicon dissolution into the tungsten bulk, with a random duration for as-manufactured filaments, followed by the inhomogeneous nucleation of W5Si3 (which is later replaced by WSi2) and its further growth towards the filaments core. An electrical model is used to obtain real-time information about the current status of the filaments silicidation process by simply monitoring their Rfil(t) evolution during the HWCVD process. It is shown that implementing an annealing pre-treatment to the filaments leads to a clearly repetitive trend in the monitored Rfil(t) signatures. The influence of hydrogen dilution of silane on the filaments silicidation process is also discussed.

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Enhancement-mode (E-mode) high electron mobility transistors (HEMTs) based on a standard AlGaN/GaN heterostructure have been fabricated using two different methods: 19F implantation and fluorine-based plasma treatment. The need of a thermal annealing after both treatments has been proven in order to restore the ID and gm levels. DC characterization at high temperature has demonstrated that ID and gm decrease reversibly due to the reduction of the electron mobility and the drift velocity. Pulsed measurements (state period and variable pulse width) have been performed to study the self-heating effects.

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Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

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In order to evaluate the effect of environmental temperature on ruminal fermentation and on mineral levels of growing ruminants, it was used 12 male calves (initial average weight 82.9 ± 7.7 kg, 100 days of age), were employed in a randomized block design (by weight) experiment, with repeated weight measurement and two environmental temperatures: thermoneutral (24ºC) and heat-stressed (33ºC), during 38 days. The animals exposed to 33ºC presented lower dry matter ingestion, lower T3 (triiodothyronine) serum level, higher ammoniacal nitrogen (NH3-N) level in the rumen liquid, and higher rectal and body temperatures during all the experimental period when compared to the animals kept in thermoneutral environment (24ºC). The animals kept under heat stress environment (33ºC) presented higher calcium serum level, which was the highest on 31st day and the lowest on the 38th day of the experiment; phosphorus level was the lowest during all the experimental period; sodium level was lower on the 17th, 31st and 38th experimental days. Potassium and zinc levels were lower after 24 days; copper level was lower until the 24th day; magnesium level was higher until the 17th day, if compared to the ones from the animals kept in thermoneutral environment (24ºC). The heat-stressed animals presented higher levels of ammoniacal nitrogen in the ruminal liquid and a decrease in the phosphorus, sodium, potassium and zinc serum levels. These results show the necessity of changes on feed management to ruminants in temperatures over the thermal comfort limits so that performance loss is decreased.

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Crystal structure of compositionally homogeneous, nanocrystalline ZrO2-CeO2 solutions was investigated by X-ray powder diffraction as a function of temperature for compositions between 50 and 65 mol % CeO2 center dot ZrO2-50 and 60 mol % CeO2 solid solutions, which exhibit the t'-form of the tetragonal phase at room temperature, transform into the cubic phase in two steps: t'-to-t '' followed by t ''-to-cubic. But the ZrO2-65 mol % CeO2, which exhibits the t ''-form, transforms directly to the cubic phase. The results suggest that t'-to-t '' transition is of first order, but t ''-to-cubic seems to be of second order. (C) 2008 International Centre for Diffraction Data.

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In this paper we study the one-and two-loop contribution to the free energy in QED with Lorentz symmetry breaking introduced via constant CPT-even Lorentz-breaking parameters at the high temperature limit. We find the impact of the Lorentz-violating term for the free energy and carry out a numerical estimation for the Lorentz-breaking parameter.

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The thermal expansion anisotropy of the V(5)Si(3) and T(2)-phase of the V-Si-B system were determined by high-temperature X-ray diffraction from 298 to 1273 K. Alloys with nominal compositions V(62.5)Si(37.5) (V5Si3 phase) and V(63)Si(12)B(25) (T(2)-phase) were prepared from high-purity materials through arc-melting followed by heat-treatment at 1873 K by 24 h, under argon atmosphere. The V(5)Si(3) phase exhibits thermal expansion anisotropy equals to 1.3, with thermal expansion coefficients along the a and c-axis equal to 9.3 x 10(-6) K(-1) and 11.7 x 10(-6) K(-1), respectively. Similarly, the thermal expansion anisotropy value of the T(2)-phase is 0.9 with thermal expansion coefficients equal to 8.8 x 10(-6) K(-1) and 8.3 x 10(-6) K(-1) along the, a and c-axis respectively. Compared to other isostructural silicides of the 5:3 type and the Ti(5)Si(3) phase, the V(5)Si(3) phase presents lower thermal expansion anisotropy. The T(2)-phase present in the V-Si-B system exhibits low thermal expansion anisotropy, as the T(2)-phase of the Mo-Si-B, Nb-Si-B and W-Si-B systems. (C) 2009 Elsevier Ltd. All rights reserved.

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In order to reduce energy costs, high-temperature insulation porous refractory ceramics have been subjected to increasing demands. Among the techniques used to produce these materials (such as the addition of foaming agents and organic compounds), the pore generation via phase transformation presents key aspects, such as easy processing and the absence of toxic volatiles. In this study, this technique was applied to produce porous ceramics by decomposing an aluminum magnesium hydro-carbonate known as hydrotalcite (Mg(6)Al(2)(CO(3))(OH)(16)center dot 4H(2)O). It was found out that by using this complex compound, a large fraction of pores can be generated and kept at high temperatures (above 1300 degrees C) due to the in situ formation of spinel-like phases (MgAl(2)O(4)). (C) 2011 Elsevier Ltd and Techna Group S.r.l. All rights reserved.

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The effects of temperature on the fast fracture behavior of aluminum nitride with 5 wt% Y(2)O(3) ceramic were investigated. Four-point flexural strength and fracture toughness were measured in air at several temperatures (30-1,300 A degrees C). The flexural strength gradually decreased with the increase of temperature up to 1,000 A degrees C due to the change in the fracture mode from transgranular to intergranular, and then became almost constant up to 1,300 A degrees C. Two main flaw types as fracture origin were identified: small surface flaw and large pores. The volume fraction of the large pores was only 0.01%; however, they limited the strength on about 50% of the specimens. The fracture toughness decreased slightly up to 800 A degrees C controlled by the elastic modulus change, and then decreased significantly at 1,000 A degrees C due to the decrease in the grain-boundary toughness. Above 1,000 A degrees C, the fracture toughness increased significantly, and at 1,300 A degrees C, its value was close to that measured at room temperature.

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The objective of this study was to evaluate the sensory stability of ultra-high temperature (UHT) milk subjected to different heat treatments and stored at room temperature in white high density polyethylene bottles (HDPE) pigmented with titanium dioxide. Two lots of 300 units each were processed, respectively, at 135 and 141 degrees C/10 s using indirect heating and subsequently aseptically filled in an ISO class 7 clean room. These experimental lots were evaluated for appearance, aroma, flavor, and overall appreciation and compared to samples of commercial UHT milk purchased from local commercial stores. The time-temperature combinations investigated did not affect either the acceptability or the shelf life of the milk. Despite the limited light barrier properties of HDPE bottles, the product contained in the package tested exhibited good stability, with a shelf life ranging from 4 to 11 wk. Within this time period, the acceptability of the experimental lots was similar to that of the commercial products. The results achieved in this study contribute to turn the low-cost UHT system investigated into a technically viable option for small-size dairy processing plants.