An algorithmic of analog-to-digital converter using current-mode and digital CMOS process

In this paper a new algorithmic of Analog-to-Digital Converter is presented. This new topology use the current-mode technique that allows a large dynamic range and can be implemented in digital CMOS process. The ADC proposed is very small and can handle high sampling rates. Simulation results using a 1.2um CMOS process show that an 8-b ADC can support a sampling rate of 50MHz.

A non-linear analogue-to-digital converter for linearization of transducer input-output relationships

Analogue and digital techniques for linearization of non-linear input-output relationship of transducers are briefly reviewed. The condition required for linearizing a non-linear function y = f(x) using a non-linear analogue-to-digital converter, is explained. A simple technique to construct a non-linear digital-to-analogue converter, based on ' segments of equal digital interval ' is described. The technique was used to build an N-DAC which can be employed in a successive approximation or counter-ramp type ADC to linearize the non-linear transfer function of a thermistor-resistor combination. The possibility of achieving an order of magnitude higher accuracy in the measurement of temperature is shown.

A dual-slope analogue-to-digital converter for generating polynomials

A new digital polynomial generator using the principle of dual-slope analogue-to-digital conversion is proposed. Techniques for realizing a wide range of integer as well as fractional coefficients to obtain the desired polynomial have been discussed. The suitability of realizing the proposed polynomial generator in integrated circuit form is also indicated.

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

Voltage Sensing Using an Asynchronous Charge-to-Digital Converter for Energy-Autonomous Environments

In future systems with relatively unreliable and unpredictable energy sources such as harvesters, the system power supply may become non-deterministic. For energy effective operations, Vdd is an important parameter in any meaningful system control mechanism. Reliable and accurate on-chip voltage sensors are therefore indispensible for the power and computation management of such systems. Existing voltage sensing methods are not suitable because they usually require a stable and known reference (voltage, current, time, frequency, etc.), which is difficult to obtain in this environment. This paper describes an autonomous reference-free voltage sensor designed using an asynchronous counter powered by the charge on a capacitor and a small controller. Unlike existing methods, the voltage information is directly generated as a digital code. The sensor, fabricated in the 180 nm technology node, was tested successfully through performing measurements over the voltage range from 1.8 V down to 0.8 V.

Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors

The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent single transistors. Basic analog cells were also designed as well in full-custom and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a fully differential 2nd order Sigma-Delta Analog-to-Digital (A/D) modulator, fabricated in both full-custom and SOT array methodologies in 0.5mm CMOS technology from MOSIS foundry. Three test-chips were designed and fabricated in 0.5mm. Two of them are IC chips containing the full-custom and SOT array versions of a 2nd-Order Sigma-Delta A/D modulator. The third IC contains a transistors-structure (TAT and single) and analog cells placed side-by-side, block components (Comparator and Folded-cascode OTA) of the Sigma-Delta modulator.

Frequency synthesizer using a hybrid analog/digital loop filter: A low complexity approach

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Time to digital converter

In questa tesi è analizzato il caso di sensori con uscita in frequenza e periodo, si traduce in ultima analisi nella capacità di misurare con precisione un intervallo temporale. La rivelazione del tempo risulta essere lo stadio fondamentale da cui deriva la risoluzione dell'intero sistema di misura. Nella realtà, la questione della simultaneità cioè individuare con assoluta precisione due eventi che si verificano contemporaneamente, in un determinato istante t, è un problema piuttosto complesso: le difficoltà sono correlate soprattutto alle limitazioni fisiche intrinseche degli strumenti di misura. E' utile allora fornire un'analisi sui principi e le tecniche alla base della misura di intervalli temporali, detta Time Interval Measurement (TIM). Lo scopo della tesi è studiare i vari metodi per realizzare TDC lineari digitali, facendo un'analisi critica e ed evidenziando pro e contro che i vari approcci presentano, attingendo e analizzando criticamente informazioni dalle varie fonti riportate in bibliografia.

Ach, analog, digital - Quanten! Blitzkurs für alle Feinde des Digitalen und Technologieverächter

Die Natur integriert digitale und analoge Systeme umstandslos, man muss nur auf die Welt der Quantenmechanik schauen. Warum also diese Dauerproduktion gesellschaftlicher und kultureller Endzeitszenarien? Warum die Dauerbeschwörung der digitalen Bedrohung? Warum lassen wir uns nicht einfach auf das ein, was unsere physikalische Existenz grundlegend determiniert — die Koexistenz.

Graphical processing using hybrid analog-digital circuitry,

Bibliography: p. 74.

Notes on analog-digital conversion techniques,

Mode of access: Internet.

Monitoring and all-optical signal processing techniques for transparent networks

Optical networks are under constant evolution. The growing demand for dynamism require devices that can accommodate different types of traffic. Thus the study of transparent optical networks arises. This approach makes optical networks more "elegant" , due to a more efficient use of network resources. In this thesis, the author proposes devices that intend to form alternative approaches both in the state of art of these same technologies both in the fitting of this technologies in transparent optical networks. Given that full transparency is difficult to achieve with current technology (perhaps with more developed optical computing this is possible), the author proposes techniques with different levels of transparency. On the topic of performance of optical networks, the author proposes two techniques for monitoring chromatic dispersion with different levels of transparency. In Chapter 3 the proposed technique seems to make more sense for long-haul optical transmission links and high transmission rates, not only due to its moderate complexity but also to its potential moderate/high cost. However it is proposed to several modulation formats, particularly those that have a protruding clock component. In Chapter 4 the transparency level was not tested for various modulation formats, however some transparency is achieved by not adding any electrical device after the receiver (other than an analog-digital converter). This allows that this technique can operate at high transmission rates in excess of 100 Gbit / s, if electro-optical asynchronous sampling is used before the optical receiver. Thus a low cost and low bandwidth photo-detector can be used. In chapter 5 is demonstrated a technique for simultaneously monitoring multiple impairments of the optical network by generating novel performance analysis diagrams and by use of artificial neural networks. In chapter 6 the author demonstrates an all-optical technique for controlling the optical state of polarization and an example of how all-optical signal processing can fully cooperate with optical performance monitoring.

In-process thermal damage detection in grinding with monitoring via Internet

This work aims the development of a dedicated system for detection of burning in surface grinding process, where the process will constantly be monitored through the acoustic emission and electric power of the induction motor drive. Acquired by an analog-digital converter, algorithms process the signals and a control signal is generated to inform the operator or interrupt the process in case of burning occurrence. Moreover, the system makes possible the process monitoring via Internet. Additionally, a comparative study between parameters DPO and FKS is carried through. In the experimental work one type of. steel (ABNT-1020 annealed) and one type of grinding wheel referred to as TARGA, model ART 3TG80.3 NVHB, were employed.

Electromyographic validation of the double pulley equipment during movements of the lower limbs

The double pulley equipment was tested on ten male volunteers during contraction of the semitendinosus and biceps femoris (caput longum) muscles in the following movements of the lower limbs: 1) hip extension with extended knee and erect trunk, 2) hip extension with flexed knee and erect trunk, 3) hip extension with flexed knee and erect trunk, 3) hip extension with extended knee and inclined trunk, 5) hip abduction along the midline, 7) hip abduction with extension beyond the midline, 8) adduction with hip flexion beyond the midline, 8) adduction with hip flexion beyond the midline, and 9) adduction with hip extension beyond the midline. The myoelectric signals were taken up by Lec Tec surface electrodes connected to a 6-channel Lynx electromyographic signal amplifier coupled with a computer equipped with a model CAD 10/26 analogue digital conversion board and with a specific software for signal recording and analysis. The semitendinosus and biceps femoris muscles presented the highest potentials in movements 1; 2; 7, 8 and 9, whereas the potentials in the remaining movements were negligible. The pattern of activity of the semitendinosus and the biceps femoris was similar in exercises 1, 2, 3, 4 and 8. The potentials of the semitendinosus prevailed in movements 5, 6 and 7, and the strongest potentials observed in movement 9 were those of the biceps femoris.