Fabrication and characterization of active and sequential circuits utilizing Schottky-wrap-gate-controlled GaAs hexagonal nanowire network structures

For realization of hexagonal BDD-based digital systems, active and sequential circuits including inverters, flip flops and ring oscillators are designed and fabricated on GaAs-based hexagonal nanowire networks controlled by Schottky wrap gates (WPGs), and their operations are characterized. Fabricated inverters show comparatively high transfer gain of more than 10. Clear and correct operation of hexagonal set-reset flip flops (SR-FFs) is obtained at room temperature. Fabricated hexagonal D-type flip flop (D-FF) circuits integrating twelve WPG field effect transistors (FETs) show capturing input signal by triggering although the output swing is small. Oscillatory output is successfully obtained in a fabricated 7-stage hexagonal ring oscillator. Obtained results confirm that a good possibility to realize practical digital systems can be implemented by the present circuit approach.

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

Detection of Terahertz Photon by GaAs-Based Single Electron Transistor at Low Temperatures

A reproducible terahertz (THz) photocurrent was observed at low temperatures in a Schottky wrap gate single electron transistor with a normal-incident of a CH_3OH gas laser with the frequency 2. 54THz.The change of source-drain current induced by THz photons shows that a satellite peak is generated beside the resonance peak. THz photon energy can be characterized by the difference of gate voltage positions between the resonance peak and satellite peak. This indicates that the satellite peak exactly results from the THz photon-assisted tunneling. Both experimental results and theoretical analysis show that a narrow spacing of double barriers is more effective for the enhancement of THz response.

Experimental Study on the Subthreshold Swing of Silicon Nanowire Transistors

SOI based wrap-gate silicon nanowire FETs are fabricated through electron beam lithography and wet etching. Dry thermal oxidation is used to further reduce the patterned fins cross section and transfer them into nanowires. Silicon nanowire FETs with different nanowire widths varying from 60 nm to 200 nm are fabricated and the number of the nanowires contained in a channel is also varied. The on-current (I-ON) and off-current (I-OFF) of the fabricated silicon nanowire FET are 0.59 mu A and 0.19 nA respectively. The subthreshold swing (SS) and the drain induced barrier lowering are 580 mV/dec and 149 mVN respectively due to the 30 nm thick gate oxide and 1015 cm(-3) lightly doped silicon nanowire channel. The nanowire width dependence of SS is shown and attributed to the fact that the side-gate parts of a wrap gate play a more effectual role as the nanowires in a channel get narrower. It seems the nanowire number in a channel has no effect on SS because the side-gate parts fill in the space between two adjacent nanowires.

Efficient Voltage/Current Spike Reduction by Active Gate Signaling

This paper presents an Active Gate Signaling scheme to reduce voltage/current spikes across insulated gate power switches in hard switching power electronic circuits. Voltage and/or current spikes may cause EMI noise. In addition, they increase voltage/current stress on the switch. Traditionally, a higher gate resistance is chosen to reduce voltage/current spikes. Since the switching loss will increase remarkably, an active gate voltage control scheme is developed to improve efficiency of hard switching circuits while the undesirable voltage and/or current spikes are minimized.

Gate 38

Airports are a place of transition, empty halls of fleeting comings, goings and waitings. 'Gate 38' follows the experience of four groups of young people trapped at this point of departure. As contact with the outside world is cut off, the focus is placed squarely on what they’re doing, and where they’re going. A non-traditional musical set at the end of the world. Commissioned by MacGregor State High School's Centre of Artistic Development, script development included workshops with the CAD class of 2007. No musical score required.

Gate 38

Airports are a place of transition, empty halls of fleeting comings, goings and waitings. 'Gate 38' follows the experience of four groups of young people trapped at this point of departure. As contact with the outside world is cut off, the focus is placed squarely on what they’re doing, and where they’re going. A non-traditional musical set at the end of the world. Commissioned by MacGregor State High School's Centre of Artistic Development, script development included workshops with the CAD class of 2007. No musical score required.

A Fair Go Beyond the School Gate? Systemic factors affecting participation and attainment in tertiary education by Queensland students from LSES backgrounds

The purpose of this project was to conduct an empirical study that would result in findings that inform systemic policy development aimed at improving tertiary participation and attainment by students from low socioeconomic status (LSES) backgrounds in Queensland. The project focuses on systemic policy, initiatives and programs that encourage tertiary education participation and attainment by individuals from LSES backgrounds, rather than on institution-specific initiatives or programs. While the broad remit was to consider tertiary education participation, the study particularly highlights issues pertaining to LSES student participation and attainment in the higher education sector, given the notable under representation of this demographic subgroup in Australian universities. This study supports the strategic priority of addressing professional skills shortages and innovations aiming to improve human and social capital in the state of Queensland. The ultimate goal is to contribute to the enhancement of Queensland’s education and training system by maximising participation and attainment by people from LSES backgrounds in higher education, thereby improving their quality of life and future life choices and opportunities. The study addressed the following five research questions: 1. What are the major factors that promote or inhibit participation and attainment in tertiary education by LSES students in Queensland? 2. To what extent do systemic policies or practices(systemic factors) of Queensland’s tertiary education system promote or inhibit participation and attainment by LSES students? That is, what features of Queensland’s tertiary education system have a significant effect on participation and attainment by LSES students? 3. What system policies or practices are found to boost participation and attainment by LSES students in other jurisdictions? 4. What evidence is there to suggest that policies or practices that have boosted participation and attainment by LSES students in other jurisdictions would be successful if implemented in Queensland? 5. What are the implications of the research findings for Queensland’s tertiary education system to improve participation and attainment by LSES students? The project adopted a mixed methods approach to data collection. A comprehensive review of the literature was conducted to identify relevant state, national and international literature. Both qualitative and quantitative methodologies were used to collect data from a range of key stakeholders.

Experiences with implementing common mathematical operations using field programmable gate arrays

Many computationally intensive scientific applications involve repetitive floating point operations other than addition and multiplication which may present a significant performance bottleneck due to the relatively large latency or low throughput involved in executing such arithmetic primitives on commod- ity processors. A promising alternative is to execute such primitives on Field Programmable Gate Array (FPGA) hardware acting as an application-specific custom co-processor in a high performance reconfig- urable computing platform. The use of FPGAs can provide advantages such as fine-grain parallelism but issues relating to code development in a hardware description language and efficient data transfer to and from the FPGA chip can present significant application development challenges. In this paper, we discuss our practical experiences in developing a selection of floating point hardware designs to be implemented using FPGAs. Our designs include some basic mathemati cal library functions which can be implemented for user defined precisions suitable for novel applications requiring non-standard floating point represen- tation. We discuss the details of our designs along with results from performance and accuracy analysis tests.

Solving tri-diagonal linear systems using field programmable gate arrays

In this paper, we present the outcomes of a project on the exploration of the use of Field Programmable Gate Arrays(FPGAs) as co-processors for scientific computation. We designed a custom circuit for the pipelined solving of multiple tri-diagonal linear systems. The design is well suited for applications that require many independent tri diagonal system solves, such as finite difference methods for solving PDEs or applications utilising cubic spline interpolation. The selected solver algorithm was the Tri Diagonal Matrix Algorithm (TDMA or Thomas Algorithm). Our solver supports user specified precision thought the use of a custom floating point VHDL library supporting addition, subtraction, multiplication and division. The variable precision TDMA solver was tested for correctness in simulation mode. The TDMA pipeline was tested successfully in hardware using a simplified solver model. The details of implementation, the limitations, and future work are also discussed.

Solving tri-diagonal linear systems using field programmable gate arrays

In this paper, we present the outcomes of a project on the exploration of the use of Field Programmable Gate Arrays (FPGAs) as co-processors for scientific computation. We designed a custom circuit for the pipelined solving of multiple tri-diagonal linear systems. The design is well suited for applications that require many independent tri-diagonal system solves, such as finite difference methods for solving PDEs or applications utilising cubic spline interpolation. The selected solver algorithm was the Tri-Diagonal Matrix Algorithm (TDMA or Thomas Algorithm). Our solver supports user specified precision thought the use of a custom floating point VHDL library supporting addition, subtraction, multiplication and division. The variable precision TDMA solver was tested for correctness in simulation mode. The TDMA pipeline was tested successfully in hardware using a simplified solver model. The details of implementation, the limitations, and future work are also discussed.

Assessing eco-environmental performance of agricultural production in OECD countries : combination of soil surface, soil system and farm gate methods of nutrient auditing

Nitrogen balance is increasingly used as an indicator of the environmental performance of agricultural sector in national, international, and global contexts. There are three main methods of accounting the national nitrogen balance: farm gate, soil surface, and soil system. OECD (2008) recently reported the nitrogen and phosphorus balances for member countries for the 1985 - 2004 period using the soil surface method. The farm gate and soil system methods were also used in some international projects. Some studies have provided the comparison among these methods and the conclusion is mixed. The motivation of this present paper was to combine these three methods to provide a more detailed auditing of the nitrogen balance and flows for national agricultural production. In addition, the present paper also provided a new strategy of using reliable international and national data sources to calculate nitrogen balance using the farm gate method. The empirical study focused on the nitrogen balance of OECD countries for the period from 1985 to 2003. The N surplus sent to the total environment of OECD surged dramatically in early 1980s, gradually decreased during 1990s but exhibited an increasing trends in early 2000s. The overall N efficiency however fluctuated without a clear increasing trend. The eco-environmental ranking shows that Australia and Ireland were the worst while Korea and Greece were the best.

Regulating bereavement : inquests, family pressure and the gate keeping of suicide statistics

This study of English Coronial practice raises a number of questions, not only regarding state investigations of suicide, but also of the role of the Coroner itself. Following observations at over 20 inquests into possible suicides, and in-depth interviews with six Coroners, three main issue emerged: first, there exists considerable slippage between different Coroners over which deaths are likely to be classified as suicide; second, the high standard of proof required, and immense pressure faced by Coroners from family members at inquest to reach any verdict other than suicide, can significantly depress likely suicide rates; and finally, Coroners feel no professional obligation, either individually or collectively, to contribute to the production of consistent and useful social data regarding suicide—arguably rendering comparative suicide statistics relatively worthless. These issues lead, ultimately, to a more important question about the role we expect Coroners to play within social governance, and within an effective, contemporary democracy.

An isolated MOSFET gate driver

Traditional methods of isolated MOSFET/IGBT gate drive are presented, and their pros and cons assessed. The best options are chosen to meet our objective— a small, high speed, low cost, low power isolated gate drive module. Two small ferrite bead transformers are used for isolation, one transmits power at 2.5MHz, the other sends narrow set reset pulses. On the secondary these pulses drive a transistor totem pole to ensure high current drive, and the value is held by CMOS buffers with positive feedback. An alternative design for driving logic level devices uses only an HC buffer on the secondary. Double sided SMDconstruction (primary one side, secondary on the other) yields an upright module 40x18x5mm. Propagation delaywas 20ns, and rise/fall time 15ns with a 1nF load. The design places no limits on frequency of operation or duty cycle. Power supply requirementswere 5V@20mA for operation below 100kHz, dominated by magnetising current.