A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

Improved Fault Location on Distribution Feeders Based on Matching During-Fault Voltage Sags

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Location of single line-to-ground faults on distribution feeders using voltage measurements

This paper proposes a dedicated algorithm for lation of single line-to-ground faults in distribution systems. The proposed algorithm uses voltage and current phasors measured at the substation level, voltage magnitudes measured at some buses of the feeder, a database containing electrical, operational and topological parameters of the distribution networks, and fault simulation. Voltage measurements can be obtained using power quality devices already installed on the feeders or using voltage measurement devices dedicated for fault location. Using the proposed algorithm, likely faulted points that are located on feeder laterals geographically far from the actual faulted point are excluded from the results. Assessment of the algorithm efficiency was carried out using a 238 buses real-life distribution feeder. The results show that the proposed algorithm is robust for performing fast and efficient fault location for sustained single line-to-ground faults requiring less than 5% of the feeder buses to be covered by voltage measurement devices. © 2006 IEEE.

Design of a CMOS voltage reference using current-model approach

A voltage reference with low sensibility to temperature and power-supply that can generate flexible reference values (from milivolts to several volts) is proposed. Designed for AMS 0.35μm CMOS process, the circuit provides a stable output voltage working in the temperature range of -40-150°C. The proposed reference provides a nominal output voltage of 1.358V with a power-supply of 3.3V. © 2011 IEEE.

Bandgap voltage reference with low susceptibility to electromagnetic interference (EMI)

In this paper, the susceptibility of a current-mode bandgap voltage reference to electromagnetic interference (EMI) superimposed to the power supply is investigated by simulation. Designed for AMS 0.35 CMOS process, the circuit provides a stable voltage reference in the temperature range of -40-150°C. When EMI disturbances are present, the circuit exhibits only 6.7 mV of offset for interfering signals in the frequency range of 150 kHz-1 GHz. © 2011 ACM.

Reference generator for voltage controlled power conditioners

Voltage reference generation is an important issue on electronic power conditioners or voltage compensators connected to the electric grid. Several equipments, such as Dynamic Voltage Restorers (DVR), Uninterruptable Power Supplies (UPS) and Unified Power Quality Conditioners (UPQC) need a proper voltage reference to be able to compensate electric network disturbances. This work presents a new reference generator's algorithm, based on vector algebra and digital filtering techniques. It is particularly suited for the development of voltage compensators with energy storage, which would be able to mitigate steady state disturbances, such as waveform distortions and unbalances, and also transient disturbances, like voltage sags and swells. Simulation and experimental results are presented for the validation of the proposed algorithm. © 2011 IEEE.

p-type doping of ZnO by means of high-density inductively coupled plasmas

A custom-designed inductively coupled plasma assisted radio-frequency magnetron sputtering deposition system has been used to fabricate N-doped p-type ZnO (ZnO:N) thin films on glass substrates from a sintered ZnO target in a reactive Ar + N2 gas mixture. X-ray diffraction and scanning electron microscopy analyses show that the ZnO:N films feature a hexagonal crystal structure with a preferential (002) crystallographic orientation and grow as vertical columnar structures. Hall effect and X-ray photoelectron spectroscopy analyses show that N-doped ZnO thin films are p-type with a hole concentration of 3.32 × 1018 cm- 3 and mobility of 1.31 cm2 V- 1 s- 1. The current-voltage measurement of the two-layer structured ZnO p-n homojunction clearly reveals the rectifying ability of the p-n junction. The achievement of p-type ZnO:N thin films is attributed to the high dissociation ability of the high-density inductively coupled plasma source and effective plasma-surface interactions during the growth process.

Correlation based method for phase identification in a three phase LV distribution network

Low voltage distribution networks feature a high degree of load unbalance and the addition of rooftop photovoltaic is driving further unbalances in the network. Single phase consumers are distributed across the phases but even if the consumer distribution was well balanced when the network was constructed changes will occur over time. Distribution transformer losses are increased by unbalanced loadings. The estimation of transformer losses is a necessary part of the routine upgrading and replacement of transformers and the identification of the phase connections of households allows a precise estimation of the phase loadings and total transformer loss. This paper presents a new technique and preliminary test results for a method of automatically identifying the phase of each customer by correlating voltage information from the utility's transformer system with voltage information from customer smart meters. The techniques are novel as they are purely based upon a time series of electrical voltage measurements taken at the household and at the distribution transformer. Experimental results using a combination of electrical power and current of the real smart meter datasets demonstrate the performance of our techniques.

Consumer phase identification in a three phase unbalanced LV distribution network

A new technique is presented for automatically identifying the phase connection of domestic customers. Voltage information from a reference three phase house is correlated with voltage information from other customer electricity meters on the same network to determine the highest probability phase connection. The techniques are purely based upon a time series of electrical voltage measurements taken by the household smart meters and no additional equipment is required. The method is demonstrated using real smart meter datasets to correctly identify the phase connections of 75 consumers on a low voltage distribution feeder.

Real-time wide-area loading margin sensitivity (WALMS) in power systems

Loading margin sensitivity (LMS) has been widely used in applications in the realm of voltage stability assessment and control. Typically, LMS is derived based on system equilibrium equations near bifurcation and therefore requires full detailed system model and significant computation effort. Availability of phasor measurement units (PMUs) due to the recent development of wide-area monitoring system (WAMS) provides an alternative computation-friendly approach for calculating LMS. With such motivation, this work proposes measurement-based wide-area loading margin sensitivity (WALMS) in bulk power systems. The proposed sensitivity, with its simplicity, has great potential to be embedded in real-time applications. Moreover, the calculation of the WALMS is not limited to low voltage near bifurcation point. A case study on IEEE 39-bus system verifies the proposed sensitivity. Finally, a voltage control scenario demonstrates the potential application of the WALMS.

MFIS and MFS structures using SrBi2Ta2O9 thin films for the FRAM applications

Recently there is an increasing demand and extensive research on high density memories, in particular to the ferroelectric random access memory composed of 1T/1C (1 transistor/1 capacitor) or 2T/2C. FRAM's exhibit fast random acess in read/write mode, non - volatility and low power for good performance. An integration of the ferroelectric on Si is the key importance and in this regard, there had been various models proposed like MFS, MFIS, MFMIS structure etc., Choosing the proper insulator is very essential for the better performance of the device and to exhibit excellent electrical characteristics. ZrTiO4 is a potential candidate because of its excellent thermal stability and lattice match on the Si substrate. SrBi2Ta2O9 and ZrTiO4 thin films were prepared on p - type Si substrate by pulsed excimer laser ablation technique. Optimization of both ZT and SBT thin films in MFS and MFIS structure had been done based on the annealing, oxygen partial pressures and substrate temperatures to have proper texture of the thin films. The dc leakage current, P - E hysteresis, capacitance - voltage and conductance - voltage measurement were carried out. The effect of the frequency dependence on MFIS structure was observed in the C – V curve. It displays a transition of C - V curve from high frequency to low frequency curve on subjection to varied frequencies. Density of interface states has been calculated using Terman and high - low frequency C - V curve. The effect of memory window in the C - V hysteresis were analysed in terms of film thickness and annealing temperatures. DC conduction mechanism were analysed in terms of poole - frenkel, Schottky and space charge limited conduction separately on MFS, MIS structure.

MFIS and MFS structures using SrBi2Ta2O9 thin films for the FRAM applications

Recently there is an increasing demand and extensive research on high density memories, in particular to the ferroelectric random access memory composed of 1T/1C (1 transistor/1 capacitor) or 2T/2C. FRAM's exhibit fast random acess in read/write mode, non - volatility and low power for good performance. An integration of the ferroelectric on Si is the key importance and in this regard, there had been various models proposed like MFS, MFIS, MFMIS structure etc., Choosing the proper insulator is very essential for the better performance of the device and to exhibit excellent electrical characteristics. ZrTiO4 is a potential candidate because of its excellent thermal stability and lattice match on the Si substrate. SrBi2Ta2O9 and ZrTiO4 thin films were prepared on p - type Si substrate by pulsed excimer laser ablation technique. Optimization of both ZT and SBT thin films in MFS and MFIS structure had been done based on the annealing, oxygen partial pressures and substrate temperatures to have proper texture of the thin films. The dc leakage current, P - E hysteresis, capacitance - voltage and conductance - voltage measurement were carried out. The effect of the frequency dependence on MFIS structure was observed in the C – V curve. It displays a transition of C - V curve from high frequency to low frequency curve on subjection to varied frequencies. Density of interface states has been calculated using Terman and high - low frequency C - V curve. The effect of memory window in the C - V hysteresis were analysed in terms of film thickness and annealing temperatures. DC conduction mechanism were analysed in terms of poole - frenkel, Schottky and space charge limited conduction separately on MFS, MIS structure.

DX-like centers in n-type Al-doped ZnS1-xTex grown by molecular-beam epitaxy

Al-related DX-like centers were observed in n-type Al-doped ZnS1-xTex epilayers grown by molecular-beam epitaxy on GaAs substrates. The capacitance-voltage measurement, deep-level transient spectroscopy, and photoconductivity spectroscopy revealed that the behaviors of Al donors in ZnS1-xTex were similar to the so-called DX centers in AlxGa1-xAs. The optical ionization energies (E-i) and emission barriers (E-e) for the observed two Al-related DX-like centers were determined as E-i similar to 1.0 and 2.0cV and E-e similar to 0.21 and 0.39 eV, respectively. It was also shown that the formation of Al-related DX-like centers resulted in a significantly large lattice relaxation in ZnS1-xTex. (C) 2000 Elsevier Science B.V. All rights reserved.

A Low Power Dissipation Wide-Band CMOS Frequency Synthesizer for a Dual-Band GPS Receiver

This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well.