953 resultados para Voltage loops


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This paper proposes a new methodology to control the power flow between a distributed generator (DG) and the electrical power distribution grid. It is used the droop voltage control to manage the active and reactive power. Through this control a sinusoidal voltage reference is generated to be tracked by voltage loop and this loop generates the current reference for the current loop. The proposed control introduces feed-forward states improving the control performance in order to obtain high quality for the current injected to the grid. The controllers were obtained through the linear matrix inequalities (LMI) using the D-stability analysis to allocate the closed-loop controller poles. Therefore, the results show quick transient response with low oscillations. Thus, this paper presents the proposed control technique, the main simulation results and a prototype with 1000VA was developed in the laboratory in order to demonstrate the feasibility of the proposed control. © 2012 IEEE.

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Rms voltage regulation may be an attractive possibility for controlling power inverters. Combined with a Hall Effect sensor for current control, it keeps its parallel operation capability while increasing its noise immunity, which may lead to a reduction of the Total Harmonic Distortion (THD). Besides, as voltage regulation is designed in DC, a simple PI regulator can provide accurate voltage tracking. Nevertheless, this approach does not lack drawbacks. Its narrow voltage bandwidth makes transients last longer and it increases the voltage THD when feeding non-linear loads, such as rectifying stages. On the other hand, the implementation can fall into offset voltage error. Furthermore, the information of the output voltage phase is hidden for the control as well, making the synchronization of a 3-phase setup not trivial. This paper explains the concept, design and implementation of the whole control scheme, in an on board inverter able to run in parallel and within a 3-phase setup. Special attention is paid to solve the problems foreseen at implementation level: a third analog loop accounts for the offset level is added and a digital algorithm guarantees 3-phase voltage synchronization.

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This chapter focuses on the implementation of the TS (Tagaki-Sugino) fuzzy controller for the Doubly Fed Induction Generator (DFIG) based wind generator. The conventional PI control loops for mantaining desired active power and DC capacitor voltage is compared with the TS fuzzy controllers. DFIG system is represented by a third-order model where electromagnetic transients of the stator are neglected. The effectiveness of the TS-fuzzy controller on the rotor speed oscillations and the DC capacitor voltage variations of the DFIG damping controller on converter ratings is also investigated. The results from the time domain simulations are presented to elucidate the effectiveness of the TS-fuzzy controller over the conventional PI controller in the DFIG system. The proposed TS-fuzzy con-troller can improve the fault ride through capability of DFIG compared to the conventional PI controller.

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The aim of this research study has been to design a gain scheduling (GS) digital controller in order to control the voltage of an islanded microgrid in the presence of fast varying loads (FVLs), and to compare it to a robust controller. The inverter which feeds the microgrid is connected to it through an inductance-capacitor-inductance (LCL) filter. The oscillatory and nonlinear behaviour of the plant is analyzed in the whole operating zone. Afterwards, the design of the controllers which contain two loops in cascade are described. The first loop concerns the current control, while the second is linked to the voltage regulation. Two controllers, one defined as Robust and another one as GS controller, are designed for the two loops, emphasizing in their robustness and their ability to damp the oscillatory plant behaviour. To finish, some simulations are carried out to study and compare the two kinds of controllers in different operating points. The results show that both controllers damp the oscillatory behaviour of the plant in closed loop (CL), and that the GS controller ensures a better rejection of current disturbances from FVLs.

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DC line faults on high-voltage direct current (HVDC) systems utilising voltage source converters (VSCs) are a major issue for multi-terminal HVDC systems in which complete isolation of the faulted system is not a viable option. Of these faults, single line-to-earth faults are the most common fault scenario. To better understand the system under such faults, this study analyses the behaviour of HVDC systems based on both conventional two-level converter and multilevel modular converter technology, experiencing a permanent line-to-earth fault. Operation of the proposed system under two different earthing configurations of converter side AC transformer earthed with converter unearthed, and both converter and AC transformer unearthed, was analysed and simulated, with particular attention paid to the converter operation. It was observed that the development of potential earth loops within the system as a result of DC line-to-earth faults leads to substantial overcurrent and results in oscillations depending on the earthing configuration.

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A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

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High switching frequencies (several MHz) allow the integration of low power DC/DC converters. Although, in theory, a high switching frequency would make possible to implement a conventional Voltage Mode control (VMC) or Peak Current Mode control (PCMC) with very high bandwidth, in practice, parasitic effects and robustness limits the applicability of these control techniques. This paper compares VMC and CMC techniques with the V2IC control. This control is based on two loops. The fast internal loop has information of the output capacitor current and the error voltage, providing fast dynamic response under load and voltage reference steps, while the slow external voltage loop provides accurate steady state regulation. This paper shows the fast dynamic response of the V2IC control under load and output voltage reference steps and its robustness operating with additional output capacitors added by the customer.

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Mutation studies have identified a region of the S5-S6 loop of voltage-gated K+ channels (P region) responsible for teraethylammonium (TEA) block and permeation/selectivity properties. We previously modeled a similar region of the Na+ channel as four beta-hairpins with the C strands from each of the domains forming the external vestibule and with charged residues at the beta-turns forming the selectivity filter. However, the K+ channel P region amino acid composition is much more hydrophobic in this area. Here we propose a structural motif for the K+ channel pore based on the following postulates (Kv2.1 numbering). (i) The external TEA binding site is formed by four Tyr-380 residues; P loop residues participating in the internal TEA binding site are four Met-371 and Thr-372 residues. (ii) P regions form extended hairpins with beta-turns in sequence ITMT. (iii) only C ends of hairpins form the inner walls of the pore. (iv) They are extended nonregular strands with backbone carbonyl oxygens of segment VGYGD facing the pore with the conformation BRLRL. (v) Juxtaposition of P loops of the four subunits forms the pore. Fitting the external and internal TEA sites to TEA molecules predicts an hourglass-like pore with the narrowest point (GYG) as wide as 5.5 A, suggesting that selectivity may be achieved by interactions of carbonyls with partially hydrated K+. Other potential cation binding sites also exist in the pore.

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The influence of low vacuum on quasistatic current-voltage (I–V) dependences and the impact of wet air pulse on dynamic bipolar I-V-loops and unipolar I-V-curves of fungal melanin thin layers have been studied for the first time. The threshold hysteresis voltages of I–V dependences are near to the standard electrode potentials of anodic water decomposition. Short wet air pulse impact leads to sharp increase of the current and appearance of “hump”-like and “knee”-like features of I-V-loops and I-V-curves, respectively. By treatment of I-V-loop allowing for I-V-curve shape the maxima of displacement current are revealed. The peculiarities of I-V-characteristics were modelled by series-parallel RC-circuit with Zener diodes as nonlinear elements. As a reason of appearance of temporal polar media with reversible ferroelectric-like polarization and ionic space charge transfer is considered the water-assisted dissociation of some ionic groups of melanin monomers that significantly influences electrophysical parameters of melanin nanostructures.