On an asymptotic formula for the maximum voltage drop in a on-chip power distribution network

We present a new asymptotic formula for the maximum static voltage in a simplified model for on-chip power distribution networks of array bonded integrated circuits. In this model the voltage is the solution of a Poisson equation in an infinite planar domain whose boundary is an array of circular pads of radius ", and we deal with the singular limit Ɛ → 0 case. In comparison with approximations that appear in the electronic engineering literature, our formula is more complete since we have obtained terms up to order Ɛ15. A procedure will be presented to compute all the successive terms, which can be interpreted as using multipole solutions of equations involving spatial derivatives of functions. To deduce the formula we use the method of matched asymptotic expansions. Our results are completely analytical and we make an extensive use of special functions and of the Gauss constant G

The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements

A mathematical model of the voltage drop which arises in on-chip power distribution networks is used to compare the maximum voltage drop in the case of different geometric arrangements of the pads supplying power to the chip. These include the square or Manhattan power pad arrangement, which currently predominates, as well as equilateral triangular and hexagonal arrangements. In agreement with the findings in the literature and with physical and SPICE models, the equilateral triangular power pad arrangement is found to minimize the maximum voltage drop. This headline finding is a consequence of relatively simple formulas for the voltage drop, with explicit error bounds, which are established using complex analysis techniques, and elliptic functions in particular.

The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements

A mathematical model of the voltage drop which arises in on-chip power distribution networks is used to compare the maximum voltage drop in the case of different geometric arrangements of the pads supplying power to the chip. These include the square or Manhattan power pad arrangement, which currently predominates, as well as equilateral triangular and hexagonal arrangements. In agreement with the findings in the literature and with physical and SPICE models, the equilateral triangular power pad arrangement is found to minimize the maximum voltage drop. This headline finding is a consequence of relatively simple formulas for the voltage drop, with explicit error bounds, which are established using complex analysis techniques, and elliptic functions in particular.

Optimization of the power cable for low voltage direct current system

The demand for electricity is constantly growing in contemporary world and, in the same time, quality and reliability requirements are becoming more rigid. In addition, renewable sources of energy have been widely introduced for power generation, and they create specific challenges for the network. Consequently, new solution for distribution system is required, and Low Voltage Direct Current (LVDC) system is the proposed one. This thesis focuses on the investigation of specific cable features for low voltage direct current (LVDC) distribution system. The LVDC system is public ±750 VDC distribution system, which is currently being developed at Lappeen-ranta University of Technology. The aspects, considered in the thesis, are reliable and economic power transmission in distribution networks and possible power line communication in the LVDC cable.

Projecto de um regulador linear de tensão: LDO

Os reguladores de tensão LDO são utilizados intensivamente na actual indústria de electrónica, são uma parte essencial de um bloco de gestão de potência para um SoC. O aumento de produtos portáteis alimentados por baterias levou ao crescimento de soluções totalmente integradas, o que degrada o rendimento dos blocos analógicos que o constituem face às perturbações introduzidas na alimentação. Desta forma, surge a necessidade de procurar soluções cada vez mais optimizadas, impondo assim novas soluções, e/ou melhoramentos dos circuitos de gestão de potência, tendo como objectivo final o aumento do desempenho e da autonomia dos dispositivos electrónicos. Normalmente este tipo de reguladores tem a corrente de saída limitada, devido a problemas de estabilidade associados. Numa tentativa de evitar a instabilidade para as correntes de carga definidas e aumentar o PSRR do mesmo, é apresentado um método de implementação que tem como objectivo melhorar estas características, em que se pretende aumentar o rendimento e melhorar a resposta à variação da carga. No entanto, a técnica apresentada utiliza polarização adaptativa do estágio de potência, o que implica um aumento da corrente de consumo. O regulador LDO foi implementado na tecnologia CMOS UMC 0.18μm e ocupa uma área inferior a 0,2mm2. Os resultados da simulação mostram que o mesmo suporta uma transição de corrente 10μA para 100mA, com uma queda de tensão entre a tensão de alimentação e a tensão de saída inferior a 200mV. A estabilidade é assegurada para todas as correntes de carga. O tempo de estabelecimento é inferior a 6μs e as variações da tensão de saída relativamente a seu valor nominal são inferiores a 5mV. A corrente de consumo varia entre os 140μA até 200μA, o que permite atingir as especificações proposta para um PSRR de 40dB@10kHz.

A MOSFET-only wideband LNA exploiting thermal noise canceling and gain optimization

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Design of future distribution grids

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

Pienvesivoimalanmallinnus ja jakeluverkkovaikutusten tarkastelu

Tässä työssä simuloitiin Valkealassa sijaitsevaa Tirvan pienvesivoimalaitosta ja sen vaikutusta sähkönjakeluverkkoon. Pienvesivoimalaitos mallinnettiin PSCAD-ympäristöön verkko- ja voimalaitostietojen perusteella. Sähköverkko kuvattiin malliin koko 110 kV:n siirtävän verkon ja Tirvan pienjänniteverkon väliltä. Mallin avulla tehtiin sarja hajautettua sähköntuotantoa koskevia tarkasteluita. Tarkasteluissa huomattiin voimalaitoksen verkkoonliitynnän aiheuttavan standardien ylärajoilla olevan transienttisen muutoksen voimalaitoksen jännitteisiin. Työssä tehtiin yksityiskohtaisempi jännitehäviöiden mittaus voimalaitoksen pullonkaulana toimivalle pienitehoiselle jakelumuuntajalle. Tuotannon lisäämisen yhteydessä näkyvän yllättävän jännitteen laskun syyt paikannettiin muuntajalla tapahtuviin loistehon siirrosta johtuviin ylimääräisiin jännitehäviöihin. Voimalaitoksella ei ole merkittävää vaikutusta vikatilanteiden virtoihin.

Tuulivoimakäytön verkkoliitynnät ja mittaukset

Tässä työssä tutkitaan muuttuvanopeuksisen tuulivoimakäytön verkkoliityntöjä, verkkomääräyksiä ja mittausmenetelmiä Euroopassa. Yleiset tuulivoimalaitoksen verkkomääräyksiin liittyvät asiat on selitetty standardisarjassa IEC 61000 ja mittauksiin liittyvät säännökset standardissa IEC 61400-21. Työssä selvitetään Euroopan yleiset verkkomääräykset ja vertaillaan niitä keskenään, sekä määritetään tärkeimmät mittaukset. Lisäksi esitellään eräs standardimittauksiin soveltuva mittalaite ja analysoidaan täystehomuokkaimen suorituskykyä tuulivoimapuistossa. Työssä havaittiin, että standardin mukaisten mittausten toteuttaminen ja analysointi on hyvin haastava prosessi. Verkkomääräysten eroavaisuudet aiheuttavat hankaluuksia tuulivoimalan valmistajan ja verkko-operaattorien välillä. Täten myös konvertterivalmistajan täytyy olla selvillä käytössä olevista verkkomääräyksistä ja standardeista.

Utilization of a Time Domain Simulator in the Technical and Economic Analysis of a Wind Turbine Electric Drive Train

The amount of installed wind power has been growing exponentially during the past ten years. As wind turbines have become a significant source of electrical energy, the interactions between the turbines and the electric power network need to be studied more thoroughly than before. Especially, the behavior of the turbines in fault situations is of prime importance; simply disconnecting all wind turbines from the network during a voltage drop is no longer acceptable, since this would contribute to a total network collapse. These requirements have been a contributor to the increased role of simulations in the study and design of the electric drive train of a wind turbine. When planning a wind power investment, the selection of the site and the turbine are crucial for the economic feasibility of the installation. Economic feasibility, on the other hand, is the factor that determines whether or not investment in wind power will continue, contributing to green electricity production and reduction of emissions. In the selection of the installation site and the turbine (siting and site matching), the properties of the electric drive train of the planned turbine have so far been generally not been taken into account. Additionally, although the loss minimization of some of the individual components of the drive train has been studied, the drive train as a whole has received less attention. Furthermore, as a wind turbine will typically operate at a power level lower than the nominal most of the time, efficiency analysis in the nominal operating point is not sufficient. This doctoral dissertation attempts to combine the two aforementioned areas of interest by studying the applicability of time domain simulations in the analysis of the economicfeasibility of a wind turbine. The utilization of a general-purpose time domain simulator, otherwise applied to the study of network interactions and control systems, in the economic analysis of the wind energy conversion system is studied. The main benefits of the simulation-based method over traditional methods based on analytic calculation of losses include the ability to reuse and recombine existing models, the ability to analyze interactions between the components and subsystems in the electric drive train (something which is impossible when considering different subsystems as independent blocks, as is commonly done in theanalytical calculation of efficiencies), the ability to analyze in a rather straightforward manner the effect of selections other than physical components, for example control algorithms, and the ability to verify assumptions of the effects of a particular design change on the efficiency of the whole system. Based on the work, it can be concluded that differences between two configurations can be seen in the economic performance with only minor modifications to the simulation models used in the network interaction and control method study. This eliminates the need ofdeveloping analytic expressions for losses and enables the study of the system as a whole instead of modeling it as series connection of independent blocks with no lossinterdependencies. Three example cases (site matching, component selection, control principle selection) are provided to illustrate the usage of the approach and analyze its performance.

Study of Control Methods of a High-Frequency Cycloconverter for Domestic Induction Heating Appliances

A high-frequency cyclonverter acts as a direct ac-to-ac power converter circuit that does not require a diode bidge rectifier. Bridgeless topology makes it possible to remove forward voltage drop losses that are present in a diode bridge. In addition, the on-state losses can be reduced to 1.5 times the on-state resistance of switches in half-bridge operation of the cycloconverter. A high-frequency cycloconverter is reviewed and the charging effect of the dc-capacitors in ``back-to-back'' or synchronous mode operation operation is analyzed. In addition, a control method is introduced for regulating dc-voltage of the ac-side capacitors in synchronous operation mode. The controller regulates the dc-capacitors and prevents switches from reaching overvoltage level. This can be accomplished by variating phase-shift between the upper and the lower gate signals. By adding phase-shift between the gate signal pairs, the charge stored in the energy storage capacitors can be discharged through the resonant load and substantially, the output resonant current amplitude can be improved. The above goals are analyzed and illustrated with simulation. Theory is supported with practical measurements where the proposed control method is implemented in an FPGA device and tested with a high-frequency cycloconverter using super-junction power MOSFETs as switching devices.

Noise Reduction Using Low Weight and Constant Weight Coding Techniques

Signalling off-chip requires significant current. As a result, a chip's power-supply current changes drastically during certain output-bus transitions. These current fluctuations cause a voltage drop between the chip and circuit board due to the parasitic inductance of the power-supply package leads. Digital designers often go to great lengths to reduce this "transmitted" noise. Cray, for instance, carefully balances output signals using a technique called differential signalling to guarantee a chip has constant output current. Transmitted-noise reduction costs Cray a factor of two in output pins and wires. Coding achieves similar results at smaller costs.

The modelling of electrical current NDT methods and its application to weld testing

Control by voltage drop DC. Contrôle par chute de potentiel de courant alternatif. Control by voltage drop AC.

Estimativa do comportamento de máquinas assíncronas sujeitas a afundamentos de tensão

Os afundamentos de tensão são reduções de curta duração entre o 10% a 90% da magnitude de tensão eficaz. Usualmente, estes afundamentos são associados com falhas no sistema de energia elétrica, mas podem ser causados pela elevada corrente de partida de motores de indução ou energização de transformadores. Apesar de sua curta duração, tais eventos podem causar sérios problemas para alguns equipamentos. As conseqüências dos afundamentos de tensão sobre a máquina assíncrona são: perda de velocidade durante o afundamento e picos de corrente e de conjugado que aparecem na queda de tensão e no instante de restabelecimento. Este estudo visa analisar o comportamento da máquina assíncrona diante de afundamentos de tensão e as características destes, devido à influência do motor assíncrono como carga. Enfocando-se neste ponto, é que foram considerados diferentes tipos de afundamentos devido a diferentes falhas, que produziram quedas de tensão nos terminais da máquina assíncrona com variações na magnitude e no argumento de tensão. As simulações foram realizadas aplicando um método numérico tradicional e um método simplificado, o método simplificado lineariza as equações diferenciais elétricas da máquina assíncrona considerando a velocidade mecânica constante, para o cálculo dos transitórios elétricos no início da queda de tensão e no restabelecimento da mesma. Os transitórios obtidos pelo método numérico tradicional (Runge Kutta quarta ordem) e o método simplificado foram comparados, para verificar a precisão deste método com respeito ao numérico tradicional, concluindo-se, que o método simplificado poderá aplicar-se em máquinas de baixo escorregamento e elevada constante de inércia. Além disso, foram realizados experimentos, submetendo o sistema a diferentes quedas de tensão, considerando diferentes magnitudes e durações no afundamento.

Electroluminescence and electric current response spectroscopy applied to the characterization of polymer light-emitting electrochemical cells

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)