739 resultados para VOLTAGES


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Employing multilevel inverters is a proper solution to reduce harmonic content of output voltage and electromagnetic interference in high power electronic applications. In this paper, a new pulse width modulation method for multilevel inverters is proposed in which power devices’ on-off switching times have been considered. This method can be surveyed in order to analyse the effect of switching time on harmonic contents of output voltage in high frequency applications when a switching time is not negligible compared to a switching cycle. Fast Fourier transform calculation and analysis of output voltage waveforms and harmonic contents with regard to switching time variation are presented in this paper for a single phase (3, 5)-level inverters used in high voltage and high frequency converters. Mathematical analysis and MATLAB simulation results have been carried out to validate the proposed method.

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When the supply voltages are balanced and sinusoidal, load compensation can give both unity power factor (UPF) and perfect harmonic cancellation (PHC) source currents. But under distorted supply voltages, achieving both UPF and PHC currents are not possible and contradictory to each other. Hence there should be an optimal performance between these two important compensation goals. This paper presents an optimal control algorithm for load compensation under unbalanced and distorted supply voltages. In this algorithm source currents are compensated for reactive, imbalance components and harmonic distortions set by the limits. By satisfying the harmonic distortion limits and power balance, this algorithm gives the source currents which will provide the maximum achievable power factor. The detailed simulation results using MATLAB are presented to support the performance of the proposed optimal control algorithm.

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Voltage imbalance in capacitors is a well-known problem in compensator topologies which use two or more capacitors. This imbalance may exist even if the load does not contain any DC component, due to practical factors. However, when the load contains a DC part, the voltage imbalance problem becomes critical. In this paper, a two-quadrant chopper has been used to regulate the capacitor voltages in a two-capacitor compensator structure. Two different control strategies for the two-quadrant chopper to equalize the voltage of the capacitors have been proposed. The strategies are validated through detailed simulation studies. Experiments have also been carried out to validate the hysteresis control of chopper.

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AC motors are largely used in a wide range of modern systems, from household appliances to automated industry applications such as: ventilations systems, fans, pumps, conveyors and machine tool drives. Inverters are widely used in industrial and commercial applications due to the growing need for speed control in ASD systems. Fast switching transients and the common mode voltage, in interaction with parasitic capacitive couplings, may cause many unwanted problems in the ASD applications. These include shaft voltage and leakage currents. One of the inherent characteristics of Pulse Width Modulation (PWM) techniques is the generation of the common mode voltage, which is defined as the voltage between the electrical neutral of the inverter output and the ground. Shaft voltage can cause bearing currents when it exceeds the amount of breakdown voltage level of the thin lubricant film between the inner and outer rings of the bearing. This phenomenon is the main reason for early bearing failures. A rapid development in power switches technology has lead to a drastic decrement of switching rise and fall times. Because there is considerable capacitance between the stator windings and the frame, there can be a significant capacitive current (ground current escaping to earth through stray capacitors inside a motor) if the common mode voltage has high frequency components. This current leads to noises and Electromagnetic Interferences (EMI) issues in motor drive systems. These problems have been dealt with using a variety of methods which have been reported in the literature. However, cost and maintenance issues have prevented these methods from being widely accepted. Extra cost or rating of the inverter switches is usually the price to pay for such approaches. Thus, the determination of cost-effective techniques for shaft and common mode voltage reduction in ASD systems, with the focus on the first step of the design process, is the targeted scope of this thesis. An introduction to this research – including a description of the research problem, the literature review and an account of the research progress linking the research papers – is presented in Chapter 1. Electrical power generation from renewable energy sources, such as wind energy systems, has become a crucial issue because of environmental problems and a predicted future shortage of traditional energy sources. Thus, Chapter 2 focuses on the shaft voltage analysis of stator-fed induction generators (IG) and Doubly Fed Induction Generators DFIGs in wind turbine applications. This shaft voltage analysis includes: topologies, high frequency modelling, calculation and mitigation techniques. A back-to-back AC-DC-AC converter is investigated in terms of shaft voltage generation in a DFIG. Different topologies of LC filter placement are analysed in an effort to eliminate the shaft voltage. Different capacitive couplings exist in the motor/generator structure and any change in design parameters affects the capacitive couplings. Thus, an appropriate design for AC motors should lead to the smallest possible shaft voltage. Calculation of the shaft voltage based on different capacitive couplings, and an investigation of the effects of different design parameters are discussed in Chapter 3. This is achieved through 2-D and 3-D finite element simulation and experimental analysis. End-winding parameters of the motor are also effective factors in the calculation of the shaft voltage and have not been taken into account in previous reported studies. Calculation of the end-winding capacitances is rather complex because of the diversity of end winding shapes and the complexity of their geometry. A comprehensive analysis of these capacitances has been carried out with 3-D finite element simulations and experimental studies to determine their effective design parameters. These are documented in Chapter 4. Results of this analysis show that, by choosing appropriate design parameters, it is possible to decrease the shaft voltage and resultant bearing current in the primary stage of generator/motor design without using any additional active and passive filter-based techniques. The common mode voltage is defined by a switching pattern and, by using the appropriate pattern; the common mode voltage level can be controlled. Therefore, any PWM pattern which eliminates or minimizes the common mode voltage will be an effective shaft voltage reduction technique. Thus, common mode voltage reduction of a three-phase AC motor supplied with a single-phase diode rectifier is the focus of Chapter 5. The proposed strategy is mainly based on proper utilization of the zero vectors. Multilevel inverters are also used in ASD systems which have more voltage levels and switching states, and can provide more possibilities to reduce common mode voltage. A description of common mode voltage of multilevel inverters is investigated in Chapter 6. Chapter 7 investigates the elimination techniques of the shaft voltage in a DFIG based on the methods presented in the literature by the use of simulation results. However, it could be shown that every solution to reduce the shaft voltage in DFIG systems has its own characteristics, and these have to be taken into account in determining the most effective strategy. Calculation of the capacitive coupling and electric fields between the outer and inner races and the balls at different motor speeds in symmetrical and asymmetrical shaft and balls positions is discussed in Chapter 8. The analysis is carried out using finite element simulations to determine the conditions which will increase the probability of high rates of bearing failure due to current discharges through the balls and races.

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The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted (PS) carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrierbased scheme, the conventional approaches require (n-1) x (n-1) trapezoidal carrier signals for an n-level inverter, which is (n-1) x (n-2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FMI under PD scheme, which use the same (n-1) carrier signals as used in the standard PD scheme. In the first scheme, on-line detection is performed of the band in which the modulation signal is located, corresponding period number of the carrier, and rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes.

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The dc capacitors voltage unbalancing is the main technical drawback of a diode-clamped multilevel inverter (DCMLI), with more than three levels. A voltage-balancing circuit based on buck–boost chopper connected to the dc link of DCMLI is a reliable and robust solution to this problem. This study presents four different schemes for controlling the chopper circuit to achieve the capacitor voltages equalisation. These can be broadly categorised as single-pulse, multi-pulse and hysteresis band current control schemes. The single-pulse scheme does not involve faster switching actions but need the chopper devices to be rated for higher current. The chopper devices current rating can be kept limited by using the multi-pulse scheme but it involves faster switching actions and slower response. The hysteresis band current control scheme offers faster dynamics, lower current rating of the chopper devices and can nullify the initial voltage imbalance as well. However, it involves much faster switching actions which may not be feasible for some of its applications. Therefore depending on the system requirements and ratings, one of these schemes may be used. The performance and validity of the proposed schemes are confirmed through both simulation and experimental investigations on a prototype five-level diode-clamped inverter.

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This paper presents preliminary results of an investigation into the detection of partial discharges on the rise of impulse voltages from a point-to-plane gap in SF6. A parallel RC detection impedance is placed in the earth path of a point. Computer simulations are done to determine the values of R and C that will result in the smallest impulse voltage signal and the largest discharge signal across the detection impedance. These simulations and the experimental work show that the impulse voltage signal can not be sufficiently attenuated during the rise time of the applied voltage impulse using the RC detection impedance alone. An alternative discharge detection method is proposed in which a resonant partial discharge coupler is used. Elimination of noise and the impulse voltage signal can be achieved by shorting the coupler plate to the ground plane in the middle of the disk. However, due to the bandwidth of the measuring equipment and noise from the impulse generator it was not possible to detect discharges on the rising edge of a 1.5s voltage impulse using a coupler shorted in the middle. It was found that for this particular coupler, with no shorting points, and if the rising edge of the voltage impulse is longer than 5us, (10us) PD activity can be detected on the rising edge.

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A new method of sensing the abnormal output voltage conditions of a single phase UPS system is presented, which provides the information almost instantaneously, so that a fast load transfer can be initiated. A continuous monitoring of the UPS output instantaneous voltage is used so that any under/over voltage, transients, or waveform distortion present can be detected.

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In this paper we report the analysis of dc breakdown tests on mixtures of CC12F2, SF6, C-C4F8, 2-C4F8, N2, C02, CF4, CHF3, and 1,1,1-CH3CF3 gases on the basis of the NKH formula Vmix=k(pd)aNbUC developed by us earlier for the binary mixtures of SF6 with air, N2, N20, and CO2. It is shown that while a and c have the values 0.915 and 0.850 respectively as earlier, k and b depend on the component gases. There is a good agreement between the calculated values on the basis of the formula and measured values reported in the literature.

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In this paper we report the analysis of dc breakdown tests on mixtures of CC12F2, SF6, C-C4F8, 2-C4F8, N2, C02, CF4, CHF3, and 1,1,1-CH3CF3 gases on the basis of the NKH formula Vmix=k(pd)aNbUC developed by us earlier for the binary mixtures of SF6 with air, N2, N20, and CO2. It is shown that while a and c have the values 0.915 and 0.850 respectively as earlier, k and b depend on the component gases. There is a good agreement between the calculated values on the basis of the formula and measured values reported in the literature.

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A simple equation to predict the breakdown voltages for binary mixtures (Vmix) of electronegative gases (SF6, CCl2F2) and buffer gases (N2, N2O, CO2, air) under uniform electric field has been proposed. Values of Vmix evaluated using this equation for mixtures of SF6-N2, SF6-air, SF6-N2O, SF6-CO2 and CCl2F2-N2 over a wide range of pd show an excellent agreement with the experimentally measured data available in the literature.

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A reliable protection against direct lightning hit is very essential for satellite launch pads. In view of this, suitable protection systems are generally employed. The evaluation of efficacy of the lightning protection schemes among others requires an accurate knowledge of the consequential potential rise at the struck point and the current injected into soil at the earth termination. The present work has made a detailed effort to deduce these quantities for the lightning protection scheme of the Indian satellite launch pad-I. A reduced scale model of the system with a frequency domain approach is employed for the experimental study. For further validation of the experimental approach, numerical simulations using numerical electromagnetic code-2 are also carried out on schemes involving single tower. The study results on the protection system show that the present design is quite safe with regard to top potential rise. It is shown that by connecting ground wires to the tower, its base current and, hence, the soil potential rise can be reduced. An evaluation of an alternate design philosophy involving insulated mast scheme is also made. The potential rise in that design is quantified and the possibility of a flashover to supporting tower is briefly looked into. The supporting tower is shown to have significant induced currents.