Implementation and comparison of different switching techniques for shunt active power filters

This paper presents a comparison between three switching techniques that can be used in three-phase four-wire Shunt Active Power Filters (SAPFs). The implemented switching techniques are: Periodic-Sampling (PS), Triangular Carrier Pulse-Width Modulation (TC-PWM) and Space Vector PWM (SVPWM). The comparison between them is made in terms of the compensated currents THD%, implementation complexity, necessary CPU time and SAPF efficiency. To perform this comparison are presented and analyzed several experimental results, obtained with a 20 kVA Shunt Active Power Filter prototype, specially developed for this purpose. The control system of the developed SAPF is based in the p-q Theory with a grid synchronization algorithm p-PLL.

Pulse width modulation (PWM) method for power components estimation in power meters

The scope of this paper is to present the Pulse Width Modulation (PWM) based method for Active Power (AP) and Reactive Power (RP) measurements as can be applied in Power Meters. Necessarily, the main aim of the material presented is a twofold, first to present a realization methodology of the proposed algorithm, and second to verify the algorithm’s robustness and validity. The method takes advantage of the fact that frequencies present in a power line are of a specific fundamental frequency range (a range centred on the 50 Hz or 60 Hz) and that in case of the presence of harmonics the frequencies of those dominating in the power line spectrum can be specified on the basis of the fundamental. In contrast to a number of existing methods a time delay or shifting of the input signal is not required by the method presented and the time delay by n/2 of the Current signal with respect to the Voltage signal required by many of the existing measurement techniques, does not apply in the case of the PWM method as well.

Solution of the pulse width modulation problem using orthogonal polynomials and Korteweg-de Vries equations

The mathematical underpinning of the pulse width modulation (PWM) technique lies in the attempt to represent “accurately” harmonic waveforms using only square forms of a fixed height. The accuracy can be measured using many norms, but the quality of the approximation of the analog signal (a harmonic form) by a digital one (simple pulses of a fixed high voltage level) requires the elimination of high order harmonics in the error term. The most important practical problem is in “accurate” reproduction of sine-wave using the same number of pulses as the number of high harmonics eliminated. We describe in this paper a complete solution of the PWM problem using Padé approximations, orthogonal polynomials, and solitons. The main result of the paper is the characterization of discrete pulses answering the general PWM problem in terms of the manifold of all rational solutions to Korteweg-de Vries equations.

Optimised phase disposition pulse-width modulation strategy for hybrid-clamped multilevel inverters using switching state sequences

This study describes an optimised modulation strategy based on switching state sequences for the hybrid-clamped multilevel converter. Two key control variables defined as 'phase shift angle' and 'switching state change' for a five-level hybrid-clamped inverter are proposed to improve all switches' operation, and by changing their values, different control methods can be obtained for modulation optimisation purposes. Two example methods can solve the voltage imbalance problem of the dc-link capacitors and furthermore avoid two switches' simultaneous switching transitions and improve the inverter's performance as compared with the traditional phase disposition pulse-width modulation strategy. A 6 kW prototype inverter is developed and a range of simulation and experiments are carried out for validation. It is found that simulation and experimental results are in a good agreement and the proposed modulation strategy is verified in terms of low-order harmonic reduction.

Caratterizzazione e generazione di segnali PWM per amplificatori in classe D ad alta efficienza

The convergence of information technology and consumer electronics towards battery powered portable devices has increased the interest in high efficiency, low dissipation amplifiers. Class D amplifiers are the state of the art in low power consumption and high performance amplification. In this thesis we explore the possibility of exploiting nonlinearities introduced by the PWM modulation, by designing an optimized modulation law which scales its carrier frequency adaptively with the input signal's average power while preserving the SNR, thus reducing power consumption. This is achieved by means of a novel analytical model of the PWM output spectrum, which shows how interfering harmonics and their bandwidth affect the spectrum. This allows for frequency scaling with negligible aliasing between the baseband spectrum and its harmonics. We performed low noise power spectrum measurements on PWM modulations generated by comparing variable bandwidth, random test signals with a variable frequency triangular wave carrier. The experimental results show that power-optimized frequency scaling is both feasible and effective. The new analytical model also suggests a new PWM architecture that can be applied to digitally encoded input signals which are predistorted and compared with a cosine carrier, which is accurately synthesized by a digital oscillator. This approach has been simulated in a realistic noisy model and tested in our measurement setup. A zero crossing search on the obtained PWM modulation law proves that this approach yields an equivalent signal quality with respect to traditional PWM schemes, while entailing the use of signals whose bandwidth is remarkably smaller due to the use of a cosine instead of a triangular carrier.

Digitally-implemented naturally sampled PWM suitable for multilevel converter control

For dynamic closed loop control of a multilevel converter with a low pulse number (ratio of switching frequency to synthesized fundamental), natural sampled pulse-width modulation (PWM) is the best form of modulation. Natural sampling does not introduce distortion or a delayed response to the modulating signal. However previous natural sampled PWM implementations have generally been analog. For a modular multilevel converter, a digital implementation has advantages of accuracy and flexibility. Re-sampled uniform PWM is a novel digital modulation technique which approaches the performance of natural PWM. Both hardware and software implementations for a five level multilevel converter phase are presented, demonstrating the improvement over uniform PWM.

Comando de ondulador de tensão trifásico por PWM e técnica U/F com implementação por microcontrolador

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Construção de um variador de frequência

A dificuldade de controlo de um motor de indução, bem como o armazenamento de energia CC e posterior utilização como energia alternada promoveram o desenvolvimento de variadores de frequência e inversores. Assim, como projeto de tese de mestrado em Automação e Sistemas surge o desenvolvimento de um variador de frequência. Para elaboração do variador de frequência efetuou-se um estudo sobre as técnicas de modulação utilizadas nos inversores. A técnica escolhida e utilizada é a Sinusoidal Pulse Width Modulation (SPWM). Esta técnica baseia-se na modelação por largura de impulso (PWM), o qual é formado por comparação de um sinal de referência com um sinal de portadora de elevada frequência. Por sua vez, a topologia escolhida para o inversor corresponde a um Voltage Source Inverter (VSI) de ponte trifásica completa a três terminais. O desenvolvimento da técnica de modulação SPWM levou ao desenvolvimento de um modelo de simulação em SIMULINK, o qual permitiu retirar conclusões sobre os resultados obtidos. Na fase de implementação, foram desenvolvidas placas para o funcionamento do variador de frequência. Assim, numa fase inicial foi desenvolvida a placa de controlo, a qual contém a unidade de processamento e que é responsável pela atuação de Insulated Gate Bipolar Transistors (IGBTs). Para além disso, foi desenvolvida uma placa para proteção dos IGBTs (evitando condução simultânea no mesmo terminal) e uma placa de fontes isoladas para alimentação dos circuitos e para atuação dos IGBTs. Ainda, foi desenvolvida a técnica de SPWM em software para a unidade de controlo e finalmente foi desenvolvida uma interface gráfica para interação com o utilizador. A validação do projeto foi conseguida através da variação da velocidade do motor de indução trifásico. Para isso, este foi colocado a funcionar a diversas frequências de funcionamento e a diferentes amplitudes. Para além disso, o seu funcionamento foi também validado utilizando uma carga trifásica equilibrada de 3 lâmpadas de forma a ser visualizada a variação de frequência e variação de amplitude.

Multilevel converter modulation: implementation and analysis

Multilevel converters provide an attractive solution to bring the benefits of speed-controlled rotational movement to high-power applications. Therefore, multilevel inverters have attracted wide interest in both the academic community and in the industry for the past two decades. In this doctoral thesis, modulation methods suitable especially for series connected H-bridge multilevel inverters are discussed. A concept of duty cycle modulation is presented and its modification is proposed. These methods are compared with other well-known modulation schemes, such as space-vector pulse width modulation and carrier-based modulation schemes. The advantage of the modified duty-cycle modulation is its algorithmic simplicity. A similar mathematical formulation for the original duty cycle modulation is proposed. The modified duty cycle modulation is shown to produce well-formed phase-to-neutral voltages that have lower total harmonic distortion than the space-vector pulse width modulation and the duty cycle modulation. The space-vector-based solution and the duty cycle modulation, on the other hand, result in a better-quality line-to-line voltage and current waveform. The voltage of the DC links in the modules of the series-connected H-bridge inverter are shown to fluctuate while they are under load. The fluctuation causes inaccuracies in the voltage production, which may result in a failure of the flux estimator in the controller. An extension for upper-level modulation schemes, which changes the switching instants of the inverter so that the output voltage meets the reference voltage accurately regardless of the DC link voltages, is proposed. The method is shown to reduce the error to a very low level when a sufficient switching frequency is used. An appropriate way to organize the switching instants of the multilevel inverter is to make only one-level steps at a time. This causes restrictions on the dynamical features of the modulation schemes. The produced voltage vector cannot be rotated several tens of degrees in a single switching period without violating the above-mentioned one-level-step rule. The dynamical capabilities of multilevel inverters are analyzed in this doctoral thesis, and it is shown that the multilevel inverters are capable of operating even in dynamically demanding metal industry applications. In addition to the discussion on modulation schemes, an overvoltage in multilevel converter drives caused by cable reflection is addressed. The voltage reflection phenomenon in drives with long feeder cables causes premature insulation deterioration and also affects the commonmode voltage, which is one of the main reasons for bearing currents. Bearing currents, on the other hand, cause fluting in the bearings, which results in premature bearing failure. The reflection phenomenon is traditionally prevented by filtering, but in this thesis, a modulationbased filterless method to mitigate the overvoltage in multilevel drives is proposed. Moreover, the mitigation method can be implemented as an extension for upper-level modulation schemes. The method exploits the oscillations caused by two consecutive voltage edges so that the sum of the oscillations results in a mitigated peak of the overvoltage. The applicability of the method is verified by simulations together with experiments with a full-scale prototype.

A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications

A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.

The ZVS-PWM commutation cell applied to the DC-AC converter

This paper presents the analysis of a dc-ac converter using a zero-voltage-switching (ZVS) commutation cell. First, we show the cell applied to the buck converter. The stages of operation are presented along with the main current and voltage equations. Next, we adapt the converter to the regenerative-operation mode. Hence, the full-bridge converter at low-frequency operation is connected in the dc-dc output stage (at high frequency). The main switches commute at zero voltage. The converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented. © 1997 IEEE.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

Novos conversores retificadores Sepic ZCS-PWM, operando como abaixadores de tensao, com elevados rendimento e fator de potencia - um estudo comparativo

A comparative evaluation regarding a new zero-current-switching (ZCS) pulse width modulated (PWM) Sepic rectifier, operating in voltage step-down mode, employing two different techniques, in order to obtain high power factor and reduced total harmonic distortion (THD) at the input current, is presented. The methods are those in continuous-current mode operation, known as peak current mode control with slope compensation, and average-current mode control. The principle of operation, the theoretical analysis, a design example and the main experimental results are presented for both proposed control techniques.