Non-invasive RF built-in testing using on-chip temperature sensors

This poster shows how to efficiently observe high-frequency figures of merit in RF circuits by measuring DC temperature with CMOS-compatible built-in sensors.

On-Chip Thermal Monitoring: Design, Placement and Interconnection of Temperature Sensors

La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

Development of high temperature sensors : July 1, 1959-April 30, 1961 /

"Contract AT(11-1)-229."

Characteristics of Brillouin gain based distributed temperature sensors

A Brillouin-gain based distributed temperature sensor has been investigated experimentally and theoretically. The relation between Brillouin gain, input probe power and sensing length have been studied. The study shows that there is an optimum probe power providing a maximum Brillouin gain signal for a given sensing length.

Temperature non-uniformity in distributed temperature sensors

A study is presented of the effects of temperature non-uniformity in a distributed temperature sensor based on the temperature dependence of Brillouin gain in an optical fibre. The form of the Brillouin gain profile for a given temperature distribution is measured and successfully modelled.

Temperature non-uniformity in distributed temperature sensors

A study is presented of the effects of temperature non-uniformity in a distributed temperature sensor based on the temperature dependence of Brillouin gain in an optical fibre. The form of the Brillouin gain profile for a given temperature distribution is measured and successfully modelled.

Characteristics of Brillouin gain based distributed temperature sensors

A Brillouin-gain based distributed temperature sensor has been investigated experimentally and theoretically. The relation between Brillouin gain, input probe power and sensing length have been studied. The study shows that there is an optimum probe power providing a maximum Brillouin gain signal for a given sensing length.

Enhancing the sensitivity of poly(methyl methacrylate) based optical fiber Bragg grating temperature sensors

In poly(methyl methacrylate) (PMMA)-based optical fiber gratings (POFBGs), the temperature response is determined by thermal expansion and the thermo-optic effect of the fiber. Because thermal expansion introduces a positive change and the thermo-optic effect introduces a negative change in the Bragg wavelength of the POFBG, they cancel out each other to some extent, leading to reduced and varying temperature sensitivity. By pre-straining a POFBG, the contribution of thermal expansion can be removed, and, consequently, the temperature sensitivity of POFBG can be greatly enhanced. Theoretical analysis also indicates a reduced thermo-optic coefficient of POFBG due to restrained linear expansion that matches experimental results.

Elaboració d'un protocol basat en XML per a una xarxa de sensors

La progressiva reducció de dimensió i cost en els dispositius electrònics, la dràstica retallada de consum elèctric i la independència de què això els dota han fet créixer en els últims temps l'interès de les comunitats científiques i tecnològiques per les xarxes sense fils de petits dispositius. Per altra banda, l'XML (eXtensible Markup Language) és un metallenguatge extensible que ha esdevingut un estàndard per a l'intercanvi d'informació estructurada entre diferents plataformes. L'objectiu d'aquest treball és explorar les possibilitats que pot oferir la introducció de l'XML en les xarxes de sensors amb l'elaboració d'un protocol de comunicació basat en aquest llenguatge i demostrar la transparència en el canvi de plataforma. Per fer-ho, es disposa de dos dispositius amb capacitat de comunicació sense fils equipats amb detectors de temperatura, lluminositat, efecte Hall i nivell de càrrega de la bateria. El projecte constarà de dues parts: una, més extensa, dedicada al desenvolupament del programari per a aquests dispositius, encarregat de obtenir les lectures dels diferents sensors i emetre-les per la xarxa utilitzant el llenguatge XML, i una altra, per recollir aquesta informació present a la xarxa, interpretar-la, salvar-la en una base de dades i exposar-la al món en una plana web. El programari dels dispositius sensors s'escriurà en llenguatge nesC dins el sistema tinyOS que és el sistema operatiu que equipen. La part d'explotació de les dades es desenvoluparà sota la plataforma .NET de Microsoft.

Determination of piglets’ rectal temperature and respiratory rate through skin surface temperature under climatic chamber conditions

ABSTRACT In animal farming, an automatic and precise control of environmental conditions needs information from variables derived from the animals themselves, i.e. they act as biosensors. Rectal temperature (RT) and respiratory rate (RR) are good indicators of thermoregulation in pigs. Since there is a growing concern on animal welfare, the search for alternatives to measure RT has become even more necessary. This research aimed to identify the most adequate body surface areas, on nursery-phase pigs, to take temperature measurements that best represent the correlation of RT and RR. The main experiment was carried out in a climate chamber with five 30-day-old littermate female Landrace x Large White piglets. Temperature conditions inside chamber were varied from 14 °C up to 35.5 °C. The measurements were taken each 30 minutes, over six different skin regions, using a temperature data logger Thermochron iButton® - DS1921G (Tb) and an infrared thermometer (Ti). As shown by the results, the tympanic region is the best one for RT and RR monitoring using an infrared thermometer (TiF). In contrast, when using temperature sensors, the ear (TbE) is preferred to be used for RT predictions and the loin region (TbC) for RR.

Using Distributed Temperature Sensing to monitor field scale dynamics of ground surface temperature and related substrate heat flux

We present one of the first studies of the use of Distributed Temperature Sensing (DTS) along fibre-optic cables to purposely monitor spatial and temporal variations in ground surface temperature (GST) and soil temperature, and provide an estimate of the heat flux at the base of the canopy layer and in the soil. Our field site was at a groundwater-fed wet meadow in the Netherlands covered by a canopy layer (between 0-0.5 m thickness) consisting of grass and sedges. At this site, we ran a single cable across the surface in parallel 40 m sections spaced by 2 m, to create a 40×40 m monitoring field for GST. We also buried a short length (≈10 m) of cable to depth of 0.1±0.02 m to measure soil temperature. We monitored the temperature along the entire cable continuously over a two-day period and captured the diurnal course of GST, and how it was affected by rainfall and canopy structure. The diurnal GST range, as observed by the DTS system, varied between 20.94 and 35.08◦C; precipitation events acted to suppress the range of GST. The spatial distribution of GST correlated with canopy vegetation height during both day and night. Using estimates of thermal inertia, combined with a harmonic analysis of GST and soil temperature, substrate and soil-heat fluxes were determined. Our observations demonstrate how the use of DTS shows great promise in better characterising area-average substrate/soil heat flux, their spatiotemporal variability, and how this variability is affected by canopy structure. The DTS system is able to provide a much richer data set than could be obtained from point temperature sensors. Furthermore, substrate heat fluxes derived from GST measurements may be able to provide improved closure of the land surface energy balance in micrometeorological field studies. This will enhance our understanding of how hydrometeorological processes interact with near-surface heat fluxes.

Temperature Variation Aware Energy Optimization in Heterogeneous MPSoCs

Thermal effects are rapidly gaining importance in nanometer heterogeneous integrated systems. Increased power density, coupled with spatio-temporal variability of chip workload, cause lateral and vertical temperature non-uniformities (variations) in the chip structure. The assumption of an uniform temperature for a large circuit leads to inaccurate determination of key design parameters. To improve design quality, we need precise estimation of temperature at detailed spatial resolution which is very computationally intensive. Consequently, thermal analysis of the designs needs to be done at multiple levels of granularity. To further investigate the flow of chip/package thermal analysis we exploit the Intel Single Chip Cloud Computer (SCC) and propose a methodology for calibration of SCC on-die temperature sensors. We also develop an infrastructure for online monitoring of SCC temperature sensor readings and SCC power consumption. Having the thermal simulation tool in hand, we propose MiMAPT, an approach for analyzing delay, power and temperature in digital integrated circuits. MiMAPT integrates seamlessly into industrial Front-end and Back-end chip design flows. It accounts for temperature non-uniformities and self-heating while performing analysis. Furthermore, we extend the temperature variation aware analysis of designs to 3D MPSoCs with Wide-I/O DRAM. We improve the DRAM refresh power by considering the lateral and vertical temperature variations in the 3D structure and adapting the per-DRAM-bank refresh period accordingly. We develop an advanced virtual platform which models the performance, power, and thermal behavior of a 3D-integrated MPSoC with Wide-I/O DRAMs in detail. Moving towards real-world multi-core heterogeneous SoC designs, a reconfigurable heterogeneous platform (ZYNQ) is exploited to further study the performance and energy efficiency of various CPU-accelerator data sharing methods in heterogeneous hardware architectures. A complete hardware accelerator featuring clusters of OpenRISC CPUs, with dynamic address remapping capability is built and verified on a real hardware.

Assessing the dynamic behavior of wsn motes and rfid semi-passive tags for temperature monitoring.

A notorious advantage of wireless transmission is a significant reduction and simplification in wiring and harness. There are a lot of applications of wireless systems, but in many occasions sensor nodes require a specific housing to protect the electronics from hush environmental conditions. Nowadays the information is scarce and nonspecific on the dynamic behaviour of WSN and RFID. Therefore the purpose of this study is to evaluate the dynamic behaviour of the sensors. A series of trials were designed and performed covering temperature steps between cold room (5 °C), room temperature (23 °C) and heated environment (35 °C). As sensor nodes: three Crossbow motes, a surface mounted Nlaza module (with sensor Sensirion located on the motherboard), an aerial mounted Nlaza where the Sensirion sensor stayed at the end of a cable), and four tags RFID Turbo Tag (T700 model with and without housing), and 702-B (with and without housing). To assess the dynamic behaviour a first order response approach is used and fitted with dedicated optimization tools programmed in Matlab that allow extracting the time response (?) and corresponding determination coefficient (r2) with regard to experimental data. The shorter response time (20.9 s) is found for the uncoated T 700 tag which encapsulated version provides a significantly higher response (107.2 s). The highest ? corresponds to the Crossbow modules (144.4 s), followed by the surface mounted Nlaza module (288.1 s), while the module with aerial mounted sensor gives a response certainly close above to the T700 without coating (42.8 s). As a conclusion, the dynamic response of temperature sensors within wireless and RFID nodes is dramatically influenced by the way they are housed (to protect them from the environment) as well as by the heat released by the node electronics itself; its characterization is basic to allow monitoring of high rate temperature changes and to certify the cold chain. Besides the time to rise and to recover is significantly different being mostly higher for the latter than for the former.

A novel high-sensitivity, low-power, liquid crystal temperature sensor

A novel temperature sensor based on nematic liquid crystal permittivity as a sensing magnitude, is presented. This sensor consists of a specific micrometric structure that gives considerable advantages from other previous related liquid crystal (LC) sensors. The analytical study reveals that permittivity change with temperature is introduced in a hyperbolic cosine function, increasing the sensitivity term considerably. The experimental data has been obtained for ranges from −6 °C to 100 °C. Despite this, following the LC datasheet, theoretical ranges from −40 °C to 109 °C could be achieved. These results have revealed maximum sensitivities of 33 mVrms/°C for certain temperature ranges; three times more than of most silicon temperature sensors. As it was predicted by the analytical study, the micrometric size of the proposed structure produces a high output voltage. Moreover the voltage’s sensitivity to temperature response can be controlled by the applied voltage. This response allows temperature measurements to be carried out without any amplification or conditioning circuitry, with very low power consumption.

Vertical profiles of environmental parameters measured from physical, optical and imaging sensors during Tara Oceans expedition 2009-2013

The present data publication provides permanent links to original and updated versions of validated data files. The data files include properties of seawater, particulate matter and dissolved matter from physical, optical and imaging sensors mounted on a vertical sampling system (Rosette) used during the 2009-2013 tara Oceans Expedition. It comprised 2 pairs of conductivity and temperature sensors (SEABIRD components), and a complete set of WEtLabs optical sensors, including chrorophyll and CDOM fluorometers, a 25 cm transmissiometer, and a one-wavelength backscatter meter. In addition, a SATLANTIC ISUS nitrate sensor and a Hydroptic Underwater Vision Profiler (UVP) were mounted on the rosette. In the Arctic Ocean and Arctic Seas (2013), a second oxygen sensor (SBE43) and a four frequency Aquascat acoustic profiler were added. The system was powered on specific Li-Ion batteries and data were self-recorded at 24HZ. Sensors have all been factory calibrated before, during and after the four year program. Oxygen was validated using climatologies (WOA09). Nitrate and Fluorescence data were adjusted with discrete measurements from Niskin bottles mounted on the Rosette, and optical darks were performed monthly on board. A total of 839 quality checked vertical profiles were made during the tara Oceans expedition 2009-2013.