Effect of group formation on performance, task management and social loafing

Engineering graduates of today are required to adapt to a rapidly changing work environment. In particular, they are expected to demonstrate enhanced capabilities in both mono-disciplinary and multi-disciplinary teamwork environments. Engineering education needs, as a result, to further focus on developing group work capabilities amongst engineering graduates. Over the last two years, the authors trialed various group work strategies across two engineering disciplines. In particular, the effect of group formation on students' performance, task management, and social loafing was analyzed. A recently developed online teamwork management tool, Teamworker, was used to collect students' experience of the group work. Analysis showed that students who were allowed to freely allocate to any group were less likely to report loafing from other team members, than students who were pre-allocated to a group. It also showed that performance was more affected by the presence or absence of a leader in pre-allocated rather than free-allocated groups.

Designing an E-Mail Prototype to Enhance Effective Communication and Task Management: A Case Study

This paper deals with communicational breakdowns and misunderstandings in computer mediated communication (CMC) and ways to recover from them or to prevent them. The paper describes a case study of CMC conducted in a company named Artigiani. We observed communication and conducted content analysis of e-mail messages, focusing on message exchanges between customer service representatives (CSRs) and their contacts. In addition to task management difficulties, we identified communication breakdowns that result from differences between perspectives, and from the lack of contextual information, mainly technical background and professional jargon at the customers’ side. We examined possible ways to enhance CMC and accordingly designed a prototype for an e-mail user interface that emphasizes a communicational strategy called contextualization as a central component for obtaining effective communication and for supporting effective management and control of organizational activities, especially handling orders, price quoting, and monitoring the supply and installation of products.

Intercultural competence in engineering education : who are we teaching?

BACKGROUND There is little doubt that our engineering graduates’ ability to identify cultural differences and their potential to impact on engineering projects, and to work effectively with these differences is of key importance in the modern engineering practice. Within engineering degree programs themselves there is also a significant need to recognise the impact of changing student and staff profiles on what happens in the classroom. The research described in this paper forms part of a larger project exploring issues of intercultural competence in engineering. PURPOSE This paper presents an observational and survey study of undergraduate and postgraduate engineering students from four institutions working in groups on tasks with a purely technical focus, or with a cultural and humanitarian element. The study sought to explore how students rate their own intercultural competence and team process and whether any differences exist depending on the nature of the task they are working on. We also investigated whether any differences were evident between groups of first year, second year and postgraduate students. DESIGN/METHOD The study used the miniCQS instrument (Ang & Van Dyne, 2008) and a Bales Interaction Process Analysis based scale (Bales, 1950; Carney, 1976) to collect students self ratings of group process, task management, and cultural experience and behaviour. The Bales IPA was also used for coding video observations of students working in groups. Survey data were used to form descriptive variables to compare outcomes across the different tasks and contexts. Observations analysed in Nvivo were used to provide commentary and additional detail on the quantitative data. RESULTS The results of the survey indicated consistent mean scores on each survey item for each group of students, despite vastly different tasks, student backgrounds and educational contexts. Some small, statistically significant mean differences existed, offering some basic insights into how task and student group composition could affect self ratings. Overall though, the results suggest minimal shift in how students view group function and their intercultural experience, irrespective of differing educational experience. CONCLUSIONS The survey results, contrasted with group observations, indicate that either students are not translating their experience (in the group tasks) into critical self assessment of their cultural competence and teamwork, or that they become more critical of team performance and cultural competence as their competence in these areas grows, so their ratings remain consistent. Both outcomes indicate that students need more intensive guidance to build their critical self and peer assessment skills in these areas irrespective of their year level of study.

一种FPGA的嵌入式可重构机器人控制系统

提出一种基于FPGA的可重构嵌入式微处理器控制系统.在FPGA中嵌入两个NiosⅡ软核,用VHDL语言编写用户自定义组件.在一个由NiosⅡ软核组成的处理器上实现PWM信号生成、编码器信号处理以及多电机同步伺服运算等,在另一个处理器实现机器人任务管理.该控制系统针对微小型爬壁机器人的控制系统设计,不仅具有良好的实时多任务处理能力,而且具有可重构的特点,因而可应用于一类微小型机器人控制系统以提高其设计的灵活性.

仿人机器人控制系统的研究与实现

根据仿人机器人控制性能的要求,设计开发了关节控制器,并通过CAN总线把各个关节控制器、力传感器及上位机连接在一起,构成了分布式控制系统.利用无线局域网技术,实现了语音、视频等多媒体信息的传输,把监控台、头部、上身和移动平台连接在一起,构成了仿人机器人完整的控制系统.最后提出了一些设想以提高系统的性能.

仿人机器人系统的研究与实现

针对仿人机器人的结构和控制性能的要求,设计开发了机器人的关节控制器,并利用CAN总线把各个关节和力传感器及上位机连接在一起,构成了有效可靠的分布式控制系统;利用无线局域网技术,实现了语音、视频等多媒体信息的传输,构成了仿人机器人完整的控制系统。最后提出了一些设想以提高系统的性能。

Aplicación web para la gestión de tareas siguiendo la metodología GTD

[ES] El Trabajo Final de Grado tiene por finalidad ofrecer una solución que ayude a las personas a gestionar sus tareas tanto personales como empresariales de una manera más productiva. Actualmente este tipo de aplicaciones tienen mucho éxito. Se decidió que el desarrollo de esta aplicación fuera con la metodología Getting Things Done (GTD) ya que es una metodología que aumenta la productividad y reduce el estrés laboral. A día de hoy, no hay muchas aplicaciones que utilice esta metodología y las que la utilizan lo hace de una forma muy básica. Junto a esta metodología y guiándonos de la experiencia del tutor se intentó combinar esta metodología con controles de tiempo para mejorar aún más la productividad de las personas que utiliza dicho software. El resultado obtenido de este trabajo final de grado fue la base de una aplicación web para la gestión de tareas. El software creado es totalmente funcional, muy fácil de usar, muy intuitivo, y usa la filosofía Getting Things Done . Básicamente los objetivos principales conseguidos en este proyecto fueron: la gestión de usuarios. La gestión de tareas y proyectos. Aplicación de la metodología GTD. Control del tiempo productivo, e improductivo, interrupciones, temporizadores. La aplicación ha sido realizada como Trabajo Final de Grado en Ingeniería Informática, cumpliendo con todas las fases del desarrollo del software, para obtener un producto funcional que fuera aprobado por el tutor que haría el rol de potencial cliente. En el presente proyecto se ha seguido la metodología RUP, dirigida por casos de uso, iterativa e incremental. Para completar el proceso se ha realizado la elaboración de una lista de características, la especificación de los casos de uso, una fase de análisis, una de diseño, implementación y prueba. Las tecnologías utilizadas han sido, principalmente, Ruby On Rails, HTML5, CSS , AJAX y JAVASCRIPT. El objetivo a largo plazo es que esta solución pueda ser tomada como base de implementación, donde haciendo las mejoras necesarias se pueda poner en el mercado un gran software de gestión de tareas siguiendo la metodología GTD.

Tecniche di ottimizzazione del software per sistemi su singolo chip per applicazioni di Nomadic Computing

I moderni sistemi embedded sono equipaggiati con risorse hardware che consentono l’esecuzione di applicazioni molto complesse come il decoding audio e video. La progettazione di simili sistemi deve soddisfare due esigenze opposte. Da un lato è necessario fornire un elevato potenziale computazionale, dall’altro bisogna rispettare dei vincoli stringenti riguardo il consumo di energia. Uno dei trend più diffusi per rispondere a queste esigenze opposte è quello di integrare su uno stesso chip un numero elevato di processori caratterizzati da un design semplificato e da bassi consumi. Tuttavia, per sfruttare effettivamente il potenziale computazionale offerto da una batteria di processoriè necessario rivisitare pesantemente le metodologie di sviluppo delle applicazioni. Con l’avvento dei sistemi multi-processore su singolo chip (MPSoC) il parallel programming si è diffuso largamente anche in ambito embedded. Tuttavia, i progressi nel campo della programmazione parallela non hanno mantenuto il passo con la capacità di integrare hardware parallelo su un singolo chip. Oltre all’introduzione di multipli processori, la necessità di ridurre i consumi degli MPSoC comporta altre soluzioni architetturali che hanno l’effetto diretto di complicare lo sviluppo delle applicazioni. Il design del sottosistema di memoria, in particolare, è un problema critico. Integrare sul chip dei banchi di memoria consente dei tempi d’accesso molto brevi e dei consumi molto contenuti. Sfortunatamente, la quantità di memoria on-chip che può essere integrata in un MPSoC è molto limitata. Per questo motivo è necessario aggiungere dei banchi di memoria off-chip, che hanno una capacità molto maggiore, come maggiori sono i consumi e i tempi d’accesso. La maggior parte degli MPSoC attualmente in commercio destina una parte del budget di area all’implementazione di memorie cache e/o scratchpad. Le scratchpad (SPM) sono spesso preferite alle cache nei sistemi MPSoC embedded, per motivi di maggiore predicibilità, minore occupazione d’area e – soprattutto – minori consumi. Per contro, mentre l’uso delle cache è completamente trasparente al programmatore, le SPM devono essere esplicitamente gestite dall’applicazione. Esporre l’organizzazione della gerarchia di memoria ll’applicazione consente di sfruttarne in maniera efficiente i vantaggi (ridotti tempi d’accesso e consumi). Per contro, per ottenere questi benefici è necessario scrivere le applicazioni in maniera tale che i dati vengano partizionati e allocati sulle varie memorie in maniera opportuna. L’onere di questo compito complesso ricade ovviamente sul programmatore. Questo scenario descrive bene l’esigenza di modelli di programmazione e strumenti di supporto che semplifichino lo sviluppo di applicazioni parallele. In questa tesi viene presentato un framework per lo sviluppo di software per MPSoC embedded basato su OpenMP. OpenMP è uno standard di fatto per la programmazione di multiprocessori con memoria shared, caratterizzato da un semplice approccio alla parallelizzazione tramite annotazioni (direttive per il compilatore). La sua interfaccia di programmazione consente di esprimere in maniera naturale e molto efficiente il parallelismo a livello di loop, molto diffuso tra le applicazioni embedded di tipo signal processing e multimedia. OpenMP costituisce un ottimo punto di partenza per la definizione di un modello di programmazione per MPSoC, soprattutto per la sua semplicità d’uso. D’altra parte, per sfruttare in maniera efficiente il potenziale computazionale di un MPSoC è necessario rivisitare profondamente l’implementazione del supporto OpenMP sia nel compilatore che nell’ambiente di supporto a runtime. Tutti i costrutti per gestire il parallelismo, la suddivisione del lavoro e la sincronizzazione inter-processore comportano un costo in termini di overhead che deve essere minimizzato per non comprometterre i vantaggi della parallelizzazione. Questo può essere ottenuto soltanto tramite una accurata analisi delle caratteristiche hardware e l’individuazione dei potenziali colli di bottiglia nell’architettura. Una implementazione del task management, della sincronizzazione a barriera e della condivisione dei dati che sfrutti efficientemente le risorse hardware consente di ottenere elevate performance e scalabilità. La condivisione dei dati, nel modello OpenMP, merita particolare attenzione. In un modello a memoria condivisa le strutture dati (array, matrici) accedute dal programma sono fisicamente allocate su una unica risorsa di memoria raggiungibile da tutti i processori. Al crescere del numero di processori in un sistema, l’accesso concorrente ad una singola risorsa di memoria costituisce un evidente collo di bottiglia. Per alleviare la pressione sulle memorie e sul sistema di connessione vengono da noi studiate e proposte delle tecniche di partizionamento delle strutture dati. Queste tecniche richiedono che una singola entità di tipo array venga trattata nel programma come l’insieme di tanti sotto-array, ciascuno dei quali può essere fisicamente allocato su una risorsa di memoria differente. Dal punto di vista del programma, indirizzare un array partizionato richiede che ad ogni accesso vengano eseguite delle istruzioni per ri-calcolare l’indirizzo fisico di destinazione. Questo è chiaramente un compito lungo, complesso e soggetto ad errori. Per questo motivo, le nostre tecniche di partizionamento sono state integrate nella l’interfaccia di programmazione di OpenMP, che è stata significativamente estesa. Specificamente, delle nuove direttive e clausole consentono al programmatore di annotare i dati di tipo array che si vuole partizionare e allocare in maniera distribuita sulla gerarchia di memoria. Sono stati inoltre sviluppati degli strumenti di supporto che consentono di raccogliere informazioni di profiling sul pattern di accesso agli array. Queste informazioni vengono sfruttate dal nostro compilatore per allocare le partizioni sulle varie risorse di memoria rispettando una relazione di affinità tra il task e i dati. Più precisamente, i passi di allocazione nel nostro compilatore assegnano una determinata partizione alla memoria scratchpad locale al processore che ospita il task che effettua il numero maggiore di accessi alla stessa.

Exploration of RVC applications using an ARM multicore processor = Exploración de aplicaciones RVC empleando un procesador ARM multinúcleo

Single core capabilities have reached their maximum clock speed; new multicore architectures provide an alternative way to tackle this issue instead. The design of decoding applications running on top of these multicore platforms and their optimization to exploit all system computational power is crucial to obtain best results. Since the development at the integration level of printed circuit boards are increasingly difficult to optimize due to physical constraints and the inherent increase in power consumption, development of multiprocessor architectures is becoming the new Holy Grail. In this sense, it is crucial to develop applications that can run on the new multi-core architectures and find out distributions to maximize the potential use of the system. Today most of commercial electronic devices, available in the market, are composed of embedded systems. These devices incorporate recently multi-core processors. Task management onto multiple core/processors is not a trivial issue, and a good task/actor scheduling can yield to significant improvements in terms of efficiency gains and also processor power consumption. Scheduling of data flows between the actors that implement the applications aims to harness multi-core architectures to more types of applications, with an explicit expression of parallelism into the application. On the other hand, the recent development of the MPEG Reconfigurable Video Coding (RVC) standard allows the reconfiguration of the video decoders. RVC is a flexible standard compatible with MPEG developed codecs, making it the ideal tool to integrate into the new multimedia terminals to decode video sequences. With the new versions of the Open RVC-CAL Compiler (Orcc), a static mapping of the actors that implement the functionality of the application can be done once the application executable has been generated. This static mapping must be done for each of the different cores available on the working platform. It has been chosen an embedded system with a processor with two ARMv7 cores. This platform allows us to obtain the desired tests, get as much improvement results from the execution on a single core, and contrast both with a PC-based multiprocessor system. Las posibilidades ofrecidas por el aumento de la velocidad de la frecuencia de reloj de sistemas de un solo procesador están siendo agotadas. Las nuevas arquitecturas multiprocesador proporcionan una vía de desarrollo alternativa en este sentido. El diseño y optimización de aplicaciones de descodificación de video que se ejecuten sobre las nuevas arquitecturas permiten un mejor aprovechamiento y favorecen la obtención de mayores rendimientos. Hoy en día muchos de los dispositivos comerciales que se están lanzando al mercado están integrados por sistemas embebidos, que recientemente están basados en arquitecturas multinúcleo. El manejo de las tareas de ejecución sobre este tipo de arquitecturas no es una tarea trivial, y una buena planificación de los actores que implementan las funcionalidades puede proporcionar importantes mejoras en términos de eficiencia en el uso de la capacidad de los procesadores y, por ende, del consumo de energía. Por otro lado, el reciente desarrollo del estándar de Codificación de Video Reconfigurable (RVC), permite la reconfiguración de los descodificadores de video. RVC es un estándar flexible y compatible con anteriores codecs desarrollados por MPEG. Esto hace de RVC el estándar ideal para ser incorporado en los nuevos terminales multimedia que se están comercializando. Con el desarrollo de las nuevas versiones del compilador específico para el desarrollo de lenguaje RVC-CAL (Orcc), en el que se basa MPEG RVC, el mapeo estático, para entornos basados en multiprocesador, de los actores que integran un descodificador es posible. Se ha elegido un sistema embebido con un procesador con dos núcleos ARMv7. Esta plataforma nos permitirá llevar a cabo las pruebas de verificación y contraste de los conceptos estudiados en este trabajo, en el sentido del desarrollo de descodificadores de video basados en MPEG RVC y del estudio de la planificación y mapeo estático de los mismos.

A cooperative multi-agent robotics system: design and modelling

This paper presents the development of the robotic multi-agent system SMART. In this system, the agent concept is applied to both hardware and software entities. Hardware agents are robots, with three and four legs, and an IP-camera that takes images of the scene where the cooperative task is carried out. Hardware agents strongly cooperate with software agents. These latter agents can be classified into image processing, communications, task management and decision making, planning and trajectory generation agents. To model, control and evaluate the performance of cooperative tasks among agents, a kind of PetriNet, called Work-Flow Petri Net, is used. Experimental results shows the good performance of the system.

Sistema WEB para gestão de dossier de clientes da CPI RETAIL

Dissertação apresentada ao Instituto Politécnico de Castelo Branco para cumprimento dos requisitos necessários à obtenção do grau de Mestre em Desenvolvimento de Software e Sistemas Interativos, realizada sob a orientação científica do Doutor Fernando Reinaldo Ribeiro, Professor Adjunto da Escola Superior de Tecnologia do Instituto Politécnico de Castelo Branco

Grid Approach to Satellite Monitoring Systems Integration

This paper highlights the challenges of satellite monitoring systems integration, in particular based on Grid platform, and reviews possible solutions for these problems. We describe integration issues on different levels: data integration level and task management level (job submission in terms of Grid). We show example of described technologies for integration of monitoring systems of Ukraine (National Space Agency of Ukraine, NASU) and Russia (Space Research Institute RAS, IKI RAN). Another example refers to the development of InterGrid infrastructure that integrates several regional and national Grid systems: Ukrainian Academician Grid (with Satellite data processing Grid segment) and RSGS Grid (Chinese Academy of Sciences).

Management of atopic dermatitis in children : evaluation of parents' self-efficacy, outcome expectations, and self-reported task performance using the Child Eczema Management Questionnaire

Child behaviour management is crucial to successful treatment of atopic dermatitis. This study tested relationships between parents’ self-efficacy, outcome expectations, and self-reported task performance when caring for a child with atopic dermatitis. Using a cross-sectional study design, a community-based convenience sample of 120 parents participated in pilot-testing of the Child Eczema Management Questionnaire - a self-administered questionnaire which appraises parents’ self-efficacy, outcome expectations, and self-reported task performance when managing atopic dermatitis. Overall, parents’ self-reported confidence and success with performing routine management tasks was greater than that for managing their child’s symptoms and behaviour. Therewas a positive relationship between time since diagnosis and self-reported performance of routine management tasks; however, success with managing the child’s symptoms and behaviour did not improve with illness duration. Longer time since diagnosis was also associated with more positive outcome expectations of performing tasks that involved others in the child’s care (i.e. healthcare professionals, or the child themselves). This study provides the foundation for further research examining relationships between child, parent, and family psychosocial variables, parent management of atopic dermatitis, and child health outcomes. Improved understanding of these relationships will assist healthcare providers to better support parents and families caring for children with atopic dermatitis. KEYWORDS

Towards Ecologically Sustainable Management of the Torres Strait Prawn Fishery. CRC Torres Strait Task T1.5 – Final Report

This publication, which is the final report to the Torres Strait Cooperative Research Centre, provides an overview of all the research that was conducted as part of the Torres Strait CRC Task 1.5 - Towards Ecologically Sustainable Management of the Torres Strait Prawn Fishery The objectives of the task were: To develop cost-effective protocols to monitor and quantify the bycatch and environmental impacts of commercial prawn trawling. To monitor the status of target species using both fishery dependent and fishery independent data. To develop biological reference points for target species and undertake management strategy evaluation, in particular a risk assessment of fishing at various levels of fishing mortality. This report focuses on the second component of objective 1 and details a comparative analysis of bycatch samples collected from areas of the Torres Strait that were both closed and open to prawn trawl fishing. The report also reviews the research conducted in relation to objectives 2 and 3 which are detailed in a separate report, Stock Assessment of the Torres Strait Tiger Prawn Fishery (Penaeus esculentus).