Differential mixer with NMOS/PMOS stack at switching stage

This paper proposes a novel differential mixer topology. The traditional stage of switching is replaced by a stack of NMOS and PMOS transistors combined. A design is given of a 900 MHz down-conversion mixer using a 0.35 μm CMOS process. Comparison with conventional mixer shows that the topology leads to a better performance in terms of conversion gain and linearity. ©2012 IEEE.

Procedimiento De Amplificador De Envolvente De Señales Moduladas En RF Para Técnicas EER Y ET

An envelope amplifier for an EER (Envelope Elimination and Restoration) and ET (Envelope Tracking) techniques is shown in this paper. The amplifier is based on a high speed two phases buck converter and employs RF LDMOS technology for the switching stage. A DPWM (Digital Pulse With Modulation) signal is used to control the amplifier by means of a functions generator. Simulations and measurements on a circuit prototype are presented showing a good agreement. Up to 125W output peak power can be delivered over a 5Ω load resistor. About 80% efficiency has been obtained. And at the two tone test, the third order intermodulation products (IP3) remain below 45dBc over a 2MHz bandwidth.

Methodologies for Synthesizable Programmable Devices based on Multi-Stage Switching Networks

Nowadays the rise of non-recurring engineering (NRE) costs associated with complexity is becoming a major factor in SoC design, limiting both scaling opportunities and the flexibility advantages offered by the integration of complex computational units. The introduction of embedded programmable elements can represent an appealing solution, able both to guarantee the desired flexibility and upgradabilty and to widen the SoC market. In particular embedded FPGA (eFPGA) cores can provide bit-level optimization for those applications which benefits from synthesis, paying on the other side in terms of performance penalties and area overhead with respect to standard cell ASIC implementations. In this scenario this thesis proposes a design methodology for a synthesizable programmable device designed to be embedded in a SoC. A soft-core embedded FPGA (eFPGA) is hence presented and analyzed in terms of the opportunities given by a fully synthesizable approach, following an implementation flow based on Standard-Cell methodology. A key point of the proposed eFPGA template is that it adopts a Multi-Stage Switching Network (MSSN) as the foundation of the programmable interconnects, since it can be efficiently synthesized and optimized through a standard cell based implementation flow, ensuring at the same time an intrinsic congestion-free network topology. The evaluation of the flexibility potentialities of the eFPGA has been performed using different technology libraries (STMicroelectronics CMOS 65nm and BCD9s 0.11μm) through a design space exploration in terms of area-speed-leakage tradeoffs, enabled by the full synthesizability of the template. Since the most relevant disadvantage of the adopted soft approach, compared to a hardcore, is represented by a performance overhead increase, the eFPGA analysis has been made targeting small area budgets. The generation of the configuration bitstream has been obtained thanks to the implementation of a custom CAD flow environment, and has allowed functional verification and performance evaluation through an application-aware analysis.

Switching barriers in the four-stage loyalty model

Oliver (1997) suggests a four-stage loyalty model proposing that loyalty consists of belief, affect, intentions, and action. Although this model has recently been subject to empirical examination, the issue of moderator variables has been largely neglected. This article fills that void by analyzing the moderating effects of switching barriers, using a sample of 589 customers of a large do-it-yourself (DIY) retailer. The results suggest that these moderators exert an influence on the development of the different stages of the loyalty sequence. Specifically, switching costs, social benefits, and attractiveness of alternatives are found to be important moderators of the links in the four-stage loyalty model.

Switching patterns and steady-state analysis of grid-connected and stand-alone single-stage boost-inverters for PV applications

Renewable or sustainable energy (SE) sources have attracted the attention of many countries because the power generated is environmentally friendly, and the sources are not subject to the instability of price and availability. This dissertation presents new trends in the DC-AC converters (inverters) used in renewable energy sources, particularly for photovoltaic (PV) energy systems. A review of the existing technologies is performed for both single-phase and three-phase systems, and the pros and cons of the best candidates are investigated. In many modern energy conversion systems, a DC voltage, which is provided from a SE source or energy storage device, must be boosted and converted to an AC voltage with a fixed amplitude and frequency. A novel switching pattern based on the concept of the conventional space-vector pulse-width-modulated (SVPWM) technique is developed for single-stage, boost-inverters using the topology of current source inverters (CSI). The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the DC input voltage. It is demonstrated that the CSI topology in conjunction with the developed switching pattern is capable of providing the required residential AC voltage from a low DC voltage of one PV panel at its rated power for both linear and nonlinear loads. In a micro-grid, the active and reactive power control and consequently voltage regulation is one of the main requirements. Therefore, the capability of the single-stage boost-inverter in controlling the active power and providing the reactive power is investigated. It is demonstrated that the injected active and reactive power can be independently controlled through two modulation indices introduced in the proposed switching algorithm. The system is capable of injecting a desirable level of reactive power, while the maximum power point tracking (MPPT) dictates the desirable active power. The developed switching pattern is experimentally verified through a laboratory scaled three-phase 200W boost-inverter for both grid-connected and stand-alone cases and the results are presented.

Switching Patterns and Steady-State Analysis of Grid-Connected and Stand-Alone Single-Stage Boost-Inverters for PV Applications

Renewable or sustainable energy (SE) sources have attracted the attention of many countries because the power generated is environmentally friendly, and the sources are not subject to the instability of price and availability. This dissertation presents new trends in the DC-AC converters (inverters) used in renewable energy sources, particularly for photovoltaic (PV) energy systems. A review of the existing technologies is performed for both single-phase and three-phase systems, and the pros and cons of the best candidates are investigated. In many modern energy conversion systems, a DC voltage, which is provided from a SE source or energy storage device, must be boosted and converted to an AC voltage with a fixed amplitude and frequency. A novel switching pattern based on the concept of the conventional space-vector pulse-width-modulated (SVPWM) technique is developed for single-stage, boost-inverters using the topology of current source inverters (CSI). The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the DC input voltage. It is demonstrated that the CSI topology in conjunction with the developed switching pattern is capable of providing the required residential AC voltage from a low DC voltage of one PV panel at its rated power for both linear and nonlinear loads. In a micro-grid, the active and reactive power control and consequently voltage regulation is one of the main requirements. Therefore, the capability of the single-stage boost-inverter in controlling the active power and providing the reactive power is investigated. It is demonstrated that the injected active and reactive power can be independently controlled through two modulation indices introduced in the proposed switching algorithm. The system is capable of injecting a desirable level of reactive power, while the maximum power point tracking (MPPT) dictates the desirable active power. The developed switching pattern is experimentally verified through a laboratory scaled three-phase 200W boost-inverter for both grid-connected and stand-alone cases and the results are presented.

Multi-resistance states in the electrical switching behavior of amorphous Si15Te75Ge10 thin films: Possibility of multi-bit storage

Electrical switching studies on amorphous Si15Te75Ge10 thin film devices reveal the existence of two distinct, stable low-resistance, SET states, achieved by varying the electrical input to the device. The multiple resistance levels can be attributed to multi-stage crystallization, as observed from temperature dependant resistance studies. The devices are tested for their ability to be RESET with minimal resistance degradation; further, they exhibit a minimal drift in the SET resistance value even after several months of switching. (c) 2013 Elsevier B.V. All rights reserved.

Performance evaluation of a two-stage silica gel plus water adsorption based cooling-cum-desalination system

The first objective of this paper is to show that a single-stage adsorption based cooling-cum-desalination system cannot be used if air cooled heat rejection is used under tropical conditions. This objective is achieved by operating a silica gel + water adsorption chiller first in a single-stage mode and then in a 2-stage mode with 2 beds/stage in each case. The second objective is to improve upon the simulation results obtained earlier by way of empirically describing the thermal wave phenomena during switching of operation of beds between adsorption and desorption and vice versa. Performance indicators, namely, cooling capacity, coefficient of performance and desalinated water output are extracted for various evaporator pressures and half cycle times. The improved simulation model is found to interpret experimental results more closely than the earlier one. Reasons for decline in performance indicators between theoretical and actual scenarios are appraised. (C) 2015 Elsevier Ltd and IIR. All rights reserved.

Free-space optoelectronic switching cores with MPLS for SANs over WDM ring networks

With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated. © 2012 OSA.

Modelling of free-space optoelectronic switching with MPLS for storage area networks (SANs)

Low-cost optical switches based on SLMs have conventionally been considered unsuitable for packet switching due to slow reconfiguration time. In this paper, we demonstrate that the constraint of SLM reconfiguration time in a hybrid three-stage electronic/optical switching node architecture can be compensated through the utilization of MPLS label switching mechanism to achieve the best performance for SAN applications. © 2012 SEE.

A direct digital frequency synthesizer with single-stage delta-sigma interpolator and current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300MS/s 12-bit current-steering DAC based on Q(2) Random Walk switching scheme. The delta-sigma interpolator is used to reduce the phase truncation error and the ROM size. The measured spurious-free dynamic range (SFDR) is greater than 80 dB for 8-bit phase value and 12-bit sine-amplitude output. The DDFS prototype is fabricated in a 0.35um CMOS technology with core area of 1.11mm(2).

Cutting edge: Langerin+ dendritic cells in the mesenteric lymph node set the stage for skin and gut immune system cross-talk.

Topical transcutaneous immunization (TCI) presents many clinical advantages, but its underlying mechanism remains unknown. TCI induced Ag-specific IgA Ab-secreting cells expressing CCR9 and CCR10 in the small intestine in a retinoic acid-dependent manner. These intestinal IgA Abs were maintained in Peyer\'s patch-null mice but abolished in the Peyer\'s patch- and lymph node-null mice. The mesenteric lymph node (MLN) was shown to be the site of IgA isotype class switching after TCI. Unexpectedly, langerin(+)CD8alpha(-) dendritic cells emerged in the MLN after TCI; they did not migrate from the skin but rather differentiated rapidly from bone marrow precursors. Depletion of langerin(+) cells impaired intestinal IgA Ab responses after TCI. Taken together, these findings suggest that MLN is indispensable for the induction of intestinal IgA Abs following skin immunization and that cross-talk between the skin and gut immune systems might be mediated by langerin(+) dendritic cells in the MLN.

Free-space optoelectronic switching cores with MPLS for SANs over WDM ring networks

With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated.