Low-cost, scalable optical packet switching networks with multi-wavelength labels

We propose a self-forwarding packet-switched optical network with bit-parallel multi-wavelength labels. We experimentally demonstrate transmission of variable-length optical packets over 80 km of fiber and switching over a 1×4 multistage switch with two stages. © 2007 Optical Society of America.

Quality of service in optical burst switching networks

Tese dout., Engenharia Electrónica e Computação, Universidade do Algarve, 2009

Methodologies for Synthesizable Programmable Devices based on Multi-Stage Switching Networks

Nowadays the rise of non-recurring engineering (NRE) costs associated with complexity is becoming a major factor in SoC design, limiting both scaling opportunities and the flexibility advantages offered by the integration of complex computational units. The introduction of embedded programmable elements can represent an appealing solution, able both to guarantee the desired flexibility and upgradabilty and to widen the SoC market. In particular embedded FPGA (eFPGA) cores can provide bit-level optimization for those applications which benefits from synthesis, paying on the other side in terms of performance penalties and area overhead with respect to standard cell ASIC implementations. In this scenario this thesis proposes a design methodology for a synthesizable programmable device designed to be embedded in a SoC. A soft-core embedded FPGA (eFPGA) is hence presented and analyzed in terms of the opportunities given by a fully synthesizable approach, following an implementation flow based on Standard-Cell methodology. A key point of the proposed eFPGA template is that it adopts a Multi-Stage Switching Network (MSSN) as the foundation of the programmable interconnects, since it can be efficiently synthesized and optimized through a standard cell based implementation flow, ensuring at the same time an intrinsic congestion-free network topology. The evaluation of the flexibility potentialities of the eFPGA has been performed using different technology libraries (STMicroelectronics CMOS 65nm and BCD9s 0.11μm) through a design space exploration in terms of area-speed-leakage tradeoffs, enabled by the full synthesizability of the template. Since the most relevant disadvantage of the adopted soft approach, compared to a hardcore, is represented by a performance overhead increase, the eFPGA analysis has been made targeting small area budgets. The generation of the configuration bitstream has been obtained thanks to the implementation of a custom CAD flow environment, and has allowed functional verification and performance evaluation through an application-aware analysis.

Minimization of switching networks using negative functions

Bibliography: p. 46.

Effects of crosstalk in WDM optical label switching networks due to wavelength switching of a tunable laser

Crosstalk caused by switching events in fast tunable lasers in an optical label switching (OLS) system is investigated for the first time. A wavelength-division-multiplexed OLS system based on subcarrier multiplexed labels is presented which employs a 40-Gb/s duobinary payload and a 155-Mb/s label on a 40-GHz subcarrier. Degradation in system performance as the transmitters switch between different channels is then characterized in terms of the frequency drift of the tunable laser.

Neural network design for switching network control

A neural network is a highly interconnected set of simple processors. The many connections allow information to travel rapidly through the network, and due to their simplicity, many processors in one network are feasible. Together these properties imply that we can build efficient massively parallel machines using neural networks. The primary problem is how do we specify the interconnections in a neural network. The various approaches developed so far such as outer product, learning algorithm, or energy function suffer from the following deficiencies: long training/ specification times; not guaranteed to work on all inputs; requires full connectivity.

Alternatively we discuss methods of using the topology and constraints of the problems themselves to design the topology and connections of the neural solution. We define several useful circuits-generalizations of the Winner-Take-All circuitthat allows us to incorporate constraints using feedback in a controlled manner. These circuits are proven to be stable, and to only converge on valid states. We use the Hopfield electronic model since this is close to an actual implementation. We also discuss methods for incorporating these circuits into larger systems, neural and nonneural. By exploiting regularities in our definition, we can construct efficient networks. To demonstrate the methods, we look to three problems from communications. We first discuss two applications to problems from circuit switching; finding routes in large multistage switches, and the call rearrangement problem. These show both, how we can use many neurons to build massively parallel machines, and how the Winner-Take-All circuits can simplify our designs.

Next we develop a solution to the contention arbitration problem of high-speed packet switches. We define a useful class of switching networks and then design a neural network to solve the contention arbitration problem for this class. Various aspects of the neural network/switch system are analyzed to measure the queueing performance of this method. Using the basic design, a feasible architecture for a large (1024-input) ATM packet switch is presented. Using the massive parallelism of neural networks, we can consider algorithms that were previously computationally unattainable. These now viable algorithms lead us to new perspectives on switch design.

THE MATRIX ANALYSIS FOR AN OPTICAL FREE-SPACE SWITCHING NETWORK AND AN OPTICAL CROSSOVER NETWORK WITH 4-FUNCTION INTERCHANGE NODES

A matrix analysis for free-space switching networks, such as perfect shuffle-exchange omega, crossover and Banyan is presented. On the basis of matrix analysis, the equivalence of these three switching networks and the route selection between input and output ports are simply explained. Furthermore, an optical crossover switching network, where MQW SEED arrays are used as electrically addressed four-function interchange nodes, is described and the optical crossover interconnection of 64 x 64, and high-speed four-function, interchange nodes is demonstrated in the experiment.

A comparison of performance indexes in DC-DC converters under different stabilizing state-dependent switching laws

This paper deals with the problem of establishing stabilizing state-dependent switching laws in DC-DC converters operating at continuous conduction mode (CCM) and comparing their performance indexes. Firstly, the nature of the problem is defined, that is, the study of switched affine systems, which may not share a common equilibrium point. The concept of stability is, therefore, broadened. Then, the central theorem is proposed, from which a family of switching laws can be derived, namely the minimum law and the hold state law. Some of these are proved to stabilize the basic DC-DC converters and then, their performances are compared to another law, from a previous work, by simulation, where a great reduction in overshoot is obtained. © 2011 IEEE.

Investigation of EDFA power transients in circuit-switched and packet-switched optical networks

Erbium-doped fibre amplifiers (EDFA’s) are a key technology for the design of all optical communication systems and networks. The superiority of EDFAs lies in their negligible intermodulation distortion across high speed multichannel signals, low intrinsic losses, slow gain dynamics, and gain in a wide range of optical wavelengths. Due to long lifetime in excited states, EDFAs do not oppose the effect of cross-gain saturation. The time characteristics of the gain saturation and recovery effects are between a few hundred microseconds and 10 milliseconds. However, in wavelength division multiplexed (WDM) optical networks with EDFAs, the number of channels traversing an EDFA can change due to the faulty link of the network or the system reconfiguration. It has been found that, due to the variation in channel number in the EDFAs chain, the output system powers of surviving channels can change in a very short time. Thus, the power transient is one of the problems deteriorating system performance. In this thesis, the transient phenomenon in wavelength routed WDM optical networks with EDFA chains was investigated. The task was performed using different input signal powers for circuit switched networks. A simulator for the EDFA gain dynamicmodel was developed to compute the magnitude and speed of the power transients in the non-self-saturated EDFA both single and chained. The dynamic model of the self-saturated EDFAs chain and its simulator were also developed to compute the magnitude and speed of the power transients and the Optical signal-to-noise ratio (OSNR). We found that the OSNR transient magnitude and speed are a function of both the output power transient and the number of EDFAs in the chain. The OSNR value predicts the level of the quality of service in the related network. It was found that the power transients for both self-saturated and non-self-saturated EDFAs are close in magnitude in the case of gain saturated EDFAs networks. Moreover, the cross-gain saturation also degrades the performance of the packet switching networks due to varying traffic characteristics. The magnitude and the speed of output power transients increase along the EDFAs chain. An investigation was done on the asynchronous transfer mode (ATM) or the WDM Internet protocol (WDM-IP) traffic networks using different traffic patterns based on the Pareto and Poisson distribution. The simulator is used to examine the amount and speed of the power transients in Pareto and Poisson distributed traffic at different bit rates, with specific focus on 2.5 Gb/s. It was found from numerical and statistical analysis that the power swing increases if the time interval of theburst-ON/burst-OFF is long in the packet bursts. This is because the gain dynamics is fast during strong signal pulse or with long duration pulses, which is due to the stimulatedemission avalanche depletion of the excited ions. Thus, an increase in output power levelcould lead to error burst which affects the system performance.

Quality of Service System Approximation in IP Networks

This paper is sponsored by the Ministry of Education and Research of the Republic of Bulgaria in the framework of project No 105 “Multimedia Packet Switching Networks Planning with Quality of Service and Traffic Management”.

Kollisionsverlust bei zeitgerastertem Vielfachzugriff

In Zeitmultiplex-Vielfachzugriff-(TDMA-)Durchschalte-Vermittlungsnetzen mit verteilter Steuerung können Kollisionen von Zugriffsvorgängen auftreten. Es wird unterstellt, daß die den kollidierenden Zugriffsvorgängen zugehörigen Verbindungswünsche nicht weiterbehandelt werden und deshalb wegen Kollision zu Verlust gehen. Die zugehörige Verlustwahrscheinlichkeit -genannt Kollisionsverlust BK - wird allgemein berechnet. Die numerische Auswertung zeigt, daß für Fernsprechverkehr diese - gegenüber Systemen mit konzentrierter Steuerung - zusätzlichen Kollisionsverluste vernachlässigt werden können gegenüber den üblichen Planungsverlusten wegen Abnehmermangels.

Reconfiguracao de sistemas de distribuicao radiais utilizando o criterio de queda de tensao

Network reconfiguration in distribution systems can be carried out by changing the status of sectionalizing switches and it is usually done for loss minimization and load balancing. In this paper it is presented an heuristic algorithm that accomplishes network reconfiguration for operation planning in order to obtain a configuration set whose configurations have the smallest active losses on its feeders. To obtain the configurations, it is used an approached radial load flow method and an heuristic proceeding based on maximum limit of voltage drop on feeders. Results are presented for three hypothetical systems largely known whose data are available in literature and a real system with 135 busses. In addition, it is used a fast and robust load flow which decreases the computational effort.

Modeling of pre-regulator boost ZCS interleaved operating in critical conduction mode and with high power factor

This paper presents a new pre-regulator boost operating in the boundary area between the continuous and discontinuous conduction modes of the boost inductor current, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode when operating in the continuous conduction mode. Additionally, the interleaving technique is applied in the power cell, providing a significant input current ripple reduction. It should be noticed that the main objective of this paper is to present a complete modeling for the converter operating in the critical conduction mode, allowing an improved design procedure for interleaved techniques with high input power factor, a complete dynamic analysis of the structure, and the possibility of implementing digital control techniques in closed loop.

Observer-based control design for switched affine systems and applications to DC-DC converters

This paper deals with the problem of establishing a state estimator for switched affine systems. For that matter, a modification on the Luenberger observer is proposed, the switched Luenberger observer, whose idea is to design one output gain matrix for each mode of the original system. The efficiency of the proposed method relies on a simplification on estimation error which is proved always valid, guaranteeing the estimation error to asymptotically converge to zero, for any initial state and switching law. Next, a dynamic output-dependent switching law is formulated. Then, design methodologies using linear matrix inequalities are proposed, which, to the authors's knowledge, have not yet been applied to this problem. Finally, observers for DC-DC converters are designed and simulated as application examples. © 2013 Brazilian Society for Automatics - SBA.