Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.

Novel techniques for the design and practical realization of switched-capacitor circuits in deep-submicron CMOS technologies

Dissertação apresentada para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

The effect of circuit parasitics on resonant switched capacitor converters

Switched Capacitor (SC) converters have been used for several years in low-power, power electronic energy conversion systems. However, because of their attractive features such as low-weight and high-density energy conversion and with the emergence of new circuit topologies and SiC switching devices, these circuits have recently been proposed for higher power applications. The resonant switched capacitor topology is a good candidate for high-power due to its very low-switching loss, but circuit parasitic inductance and resistance can have a significant effect on the resonant frequency of each cell. This paper discusses the influence of these parasitics on the performance of the converter and proposes a method by which these parasitics can be estimated. Simulation results and measurements from a hardware prototype are used to validate the technique.

A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V-OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm(2) in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm(2), is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m(2). After starting-up, the system requires an irradiance of only 0.18 W/m(2) (18 mu W/cm(2)) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mu W. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 mu W, which is comparable with reported values from circuits operating at similar power levels.

Design of switched-capacitor filters using low gain amplifiers

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

Analysis and implementation of a multi-ratio switched capacitor DC-DC converter for a supercapacitor power supply

An energy harvesting system requires an energy storing device to store the energy retrieved from the surrounding environment. This can either be a rechargeable battery or a supercapcitor. Due to the limited lifetime of rechargeable batteries, they need to be periodically replaced. Therefore, a supercapacitor, which has ideally a limitless number of charge/discharge cycles can be used to store the energy; however, a voltage regulator is required to obtain a constant output voltage as the supercapacitor discharges. This can be implemented by a Switched-Capacitor DC-DC converter which allows a complete integration in CMOS technology, although it requires several topologies in order to obtain a high efficiency. This thesis presents the complete analysis of four different topologies in order to determine expressions that allow to design and determine the optimum input voltage ranges for each topology. To better understand the parasitic effects, the implementation of the capacitors and the non-ideal effect of the switches, in 130 nm technology, were carefully studied. With these two analysis a multi-ratio SC DC-DC converter was designed with an output power of 2 mW, maximum efficiency of 77%, and a maximum output ripple, in the steady state, of 23 mV; for an input voltage swing of 2.3 V to 0.85 V. This proposed converter has four operation states that perform the conversion ratios of 1/2, 2/3, 1/1 and 3/2 and its clock frequency is automatically adjusted to produce a stable output voltage of 1 V. These features are implemented through two distinct controller circuits that use asynchronous time machines (ASM) to dynamically adjust the clock frequency and to select the active state of the converter. All the theoretical expressions as well as the behaviour of the whole system was verified using electrical simulations.

A peptide export–import control circuit modulating bacterial development regulates protein phosphatases of the phosphorelay

The phosphorelay signal transduction system activates developmental transcription in sporulation of Bacillus subtilis by phosphorylation of aspartyl residues of the Spo0F and Spo0A response regulators. The phosphorylation level of these response regulators is determined by the opposing activities of protein kinases and protein aspartate phosphatases that interpret positive and negative signals for development in a signal integration circuit. The RapA protein aspartate phosphatase of the phosphorelay is regulated by a peptide that directly inhibits its activity. This peptide is proteolytically processed from an inactive pre-inhibitor protein encoded in the phrA gene. The pre-inhibitor is cleaved by the protein export apparatus to a putative pro-inhibitor that is further processed to the active inhibitor peptide and internalized by the oligopeptide permease. This export–import circuit is postulated to be a mechanism for timing phosphatase activity where the processing enzymes regulate the rate of formation of the active inhibitor. The processing events may, in turn, be controlled by a regulatory hierarchy. Chromosome sequencing has revealed several other phosphatase–prepeptide gene pairs in B. subtilis, suggesting that the use of this mechanism may be widespread in signal transduction.

Switched capacitor DC-DC converters for HVDC applications

DC distribution and transmission provides an efficient, cost effective and reliable alternative to traditional AC systems for offshore wind farm integration. High power DC-DC converters are key components to realise future offshore voltage DC grids and multi-terminal HVDC systems. Different DC-DC converter topologies have been proposed for this application. The aim of this paper is to investigate the viability of Switched Capacitor (SC) converters in high power application particularly the interconnection of offshore windfarms to a medium voltage DC grid. In addition, a comparison of alternative topologies that have been proposed will be presented. Simulation and experimental results are provided to verify the analysis.

Implementation of a DC-DC converter with variable structure control of switched systems

This paper presents a control method for a class of continuous-time switched systems, using state feedback variable structure controllers. The method is applied to the control of a two-cell dc-dc buck converter and a control circuit design using the software PSpice is proposed. The design is based on Lyapunov-Metzler-SPR systems and the performance of the resulting control system is superior to that afforded by a recently-proposed alternative sliding-mode control technique. The dc-dc power converters are very used in industrial applications, for instance, in power systems of hybrid electric vehicles and aircrafts. Good results were obtained and the proposed design is also inexpensive because it uses electric components that can be easily found for the hardware implementation. Future researches on the subject include the hardware validation of the dc-dc converter controller and the robust control design of switched systems, with structural failures. © 2011 IEEE.

Design and implementation of a dc-dc converter based on variable structure control of switched systems

This paper presents a control method for a class of continuous-time switched systems, using state feedback variable structure controllers. The method is applied to the control of a non-trivial dc-dc power converter and a simple and inexpensive control circuit design, that was simulated using the software PSpice, is proposed. The design is based on Lyapunov-Metzler-SPR systems and the performance of the resulting control system is superior to that afforded by a recently proposed alternative sliding-mode control technique. © 2011 IFAC.

Design of a variable width pulse generator feasible for manual or automatic control

A variable width pulse generator featuring more than 4-V peak amplitude and less than 10-ns FWHM is described. In this design the width of the pulses is controlled by means of the control signal slope. Thus, a variable transition time control circuit (TTCC) is also developed, based on the charge and discharge of a capacitor by means of two tunable current sources. Additionally, it is possible to activate/deactivate the pulses when required, therefore allowing the creation of any desired pulse pattern. Furthermore, the implementation presented here can be electronically controlled. In conclusion, due to its versatility, compactness and low cost it can be used in a wide variety of applications.

Fonte de carga de condensadores de alta tensão com compensação de fator potência

Trabalho Final de Mestrado para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Automated design of microwave discrete tuning differential capacitance circuits in Si-integrated technologies

A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs.

Reference-free high-speed cmos pipeline analog-to-digital converters

Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de Lisboa