953 resultados para Silicon wet etching


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In this paper, Isopropanol (IPA) availability during the anisotropic etching of silicon in Potassium Hydroxide (KOH) solutions was investigated. Squares of 8 to 40 m were patterned to (100) oriented silicon wafers through DWL (Direct Writing Laser) photolithography. The wet etching process was performed inside an open HDPE (High Density Polyethylene) flask with ultrasonic agitation. IPA volume and evaporation was studied in a dynamic etching process, and subsequent influence on the silicon etching was inspected. For the tested conditions, evaporation rates for water vapor and IPA were determined as approximately 0.0417 mL/min and 0.175 mL/min, respectively. Results demonstrate that IPA availability, and not concentration, plays an important role in the definition of the final structure. Transversal SEM (Scanning Electron Microscopy) analysis demonstrates a correlation between microloading effects (as a consequence of structure spacing) and the angle formed towards the (100) plane.

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Tese de Doutoramento em Engenharia Biomédica.

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This paper reports on an innovative approach to measuring intraluminal pressure in the upper gastrointestinal (GI) tract, especially monitoring GI motility and peristaltic movements. The proposed approach relies on thin-film aluminum strain gauges deposited on top of a Kapton membrane, which in turn lies on top of an SU-8 diaphragm-like structure. This structure enables the Kapton membrane to bend when pressure is applied, thereby affecting the strain gauges and effectively changing their electrical resistance. The sensor, with an area of 3.4 mm2, is fabricated using photolithography and standard microfabrication techniques (wet etching). It features a linear response (R2 = 0.9987) and an overall sensitivity of 2.6 mV mmHg−1. Additionally, its topology allows a high integration capability. The strain gauges’ responses to pressure were studied and the fabrication process optimized to achieve high sensitivity, linearity, and reproducibility. The sequential acquisition of the different signals is carried out by a microcontroller, with a 10-bit ADC and a sample rate of 250 Hz. The pressure signals are then presented in a user-friendly interface, developed using the Integrated Development Environment software, QtCreator IDE, for better visualization by physicians.

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In this work investigation of the QDs formation and the fabrication of QD based semiconductor lasers for telecom applications are presented. InAs QDs grown on AlGaInAs lattice matched to InP substrates are used to fabricate lasers operating at 1.55 µm, which is the central wavelength for far distance data transmission. This wavelength is used due to its minimum attenuation in standard glass fibers. The incorporation of QDs in this material system is more complicated in comparison to InAs QDs in the GaAs system. Due to smaller lattice mismatch the formation of circular QDs, elongated QDs and quantum wires is possible. The influence of the different growth conditions, such as the growth temperature, beam equivalent pressure, amount of deposited material on the formation of the QDs is investigated. It was already demonstrated that the formation process of QDs can be changed by the arsenic species. The formation of more round shaped QDs was observed during the growth of QDs with As2, while for As4 dash-like QDs. In this work only As2 was used for the QD growth. Different growth parameters were investigated to optimize the optical properties, like photoluminescence linewidth, and to implement those QD ensembles into laser structures as active medium. By the implementation of those QDs into laser structures a full width at half maximum (FWHM) of 30 meV was achieved. Another part of the research includes the investigation of the influence of the layer design of lasers on its lasing properties. QD lasers were demonstrated with a modal gain of more than 10 cm-1 per QD layer. Another achievement is the large signal modulation with a maximum data rate of 15 Gbit/s. The implementation of optimized QDs in the laser structure allows to increase the modal gain up to 12 cm-1 per QD layer. A reduction of the waveguide layer thickness leads to a shorter transport time of the carriers into the active region and as a result a data rate up to 22 Gbit/s was achieved, which is so far the highest digital modulation rate obtained with any 1.55 µm QD laser. The implementation of etch stop layers into the laser structure provide the possibility to fabricate feedback gratings with well defined geometries for the realization of DFB lasers. These DFB lasers were fabricated by using a combination of dry and wet etching. Single mode operation at 1.55 µm with a high side mode suppression ratio of 50 dB was achieved.

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Data of chemical analysis of Black Sea ctenophore Mnemiopsis leidyi indicates that their body contains on average 5.28% carbon, 3.48% nitrogen, 0.11% phosphorus, and 0.03% silicon on dry weight. Mean ratios of the main biogenic elements in ctenophores is C:N=1.4, N:P=10.9, and C:P=32.2. Comparing concentration of the main biogenic elements in the surface layer with their concentrations in ctenophores it is concluded that mass development of M. leidyi has negative effect on the hydrochemical structure of the Black Sea.

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We report on the fabrication details of TES based on Mo/Au bilayers. The Mo layer is deposited by radio frequency (RF) sputtering and capped with a sputter deposited thin Au protection layer. Afterwards, a second Au layer of suitable (lower) resistivity is deposited ex‐situ by e‐beam evaporation, until completion of the total desired Au thickness. The deposition was performed at room temperature (RT) on LPCVD Si3 N4 membranes. Such a deposition procedure is very reproducible and allow controlling the critical temperature (Tc) and normal electrical resistance (RN ) of the Mo/Au bilayer. The process is optimized to achieve low stress bilayers, thus avoiding the undesirable curvature of the membranes. Bilayers are patterned using photolithographic techniques and wet etching procedures. Mo superconducting paths are used to contact the Mo/Au bilayers, thus ensuring good electrical conductivity and thermal isolation. The entire fabrication process let to stable and reproducible sensors with required and tunable functional properties

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El objetivo principal del presente trabajo es estudiar y explotar estructuras que presentan un gas bidimensional de electrones (2DEG) basadas en compuestos nitruros con alto contenido de indio. Existen muchas preguntas abiertas, relacionadas con el nitruro de indio y sus aleaciones, algunas de las cuales se han abordado en este estudio. En particular, se han investigado temas relacionados con el análisis y la tecnología del material, tanto para el InN y heteroestructuras de InAl(Ga)N/GaN como para sus aplicaciones a dispositivos avanzados. Después de un análisis de la dependencia de las propiedades del InN con respecto a tratamientos de procesado de dispositivos (plasma y térmicos), el problema relacionado con la formación de un contacto rectificador es considerado. Concretamente, su dificultad es debida a la presencia de acumulación de electrones superficiales en la forma de un gas bidimensional de electrones, debido al pinning del nivel de Fermi. El uso de métodos electroquímicos, comparados con técnicas propias de la microelectrónica, ha ayudado para la realización de esta tarea. En particular, se ha conseguido lamodulación de la acumulación de electrones con éxito. En heteroestructuras como InAl(Ga)N/GaN, el gas bidimensional está presente en la intercara entre GaN y InAl(Ga)N, aunque no haya polarización externa (estructuras modo on). La tecnología relacionada con la fabricación de transistores de alta movilidad en modo off (E-mode) es investigada. Se utiliza un método de ataque húmedo mediante una solución de contenido alcalino, estudiando las modificaciones estructurales que sufre la barrera. En este sentido, la necesidad de un control preciso sobre el material atacado es fundamental para obtener una estructura recessed para aplicaciones a transistores, con densidad de defectos e inhomogeneidad mínimos. La dependencia de la velocidad de ataque de las propiedades de las muestras antes del tratamiento es observada y comentada. Se presentan también investigaciones relacionadas con las propiedades básicas del InN. Gracias al uso de una puerta a través de un electrolito, el desplazamiento de los picos obtenidos por espectroscopia Raman es correlacionado con una variación de la densidad de electrones superficiales. En lo que concierne la aplicación a dispositivos, debido al estado de la tecnología actual y a la calidad del material InN, todavía no apto para dispositivos, la tesis se enfoca a la aplicación de heteroestructuras de InAl(Ga)N/GaN. Gracias a las ventajas de una barrera muy fina, comparada con la tecnología de AlGaN/GaN, el uso de esta estructura es adecuado para aplicaciones que requieren una elevada sensibilidad, estando el canal 2DEG más cerca de la superficie. De hecho, la sensibilidad obtenida en sensores de pH es comparable al estado del arte en términos de variaciones de potencial superficial, y, debido al poco espesor de la barrera, la variación de la corriente con el pH puede ser medida sin necesidad de un electrodo de referencia externo. Además, estructuras fotoconductivas basadas en un gas bidimensional presentan alta ganancia debida al elevado campo eléctrico en la intercara, que induce una elevada fuerza de separación entre hueco y electrón generados por absorción de luz. El uso de metalizaciones de tipo Schottky (fotodiodos Schottky y metal-semiconductormetal) reduce la corriente de oscuridad, en comparación con los fotoconductores. Además, la barrera delgada aumenta la eficiencia de extracción de los portadores. En consecuencia, se obtiene ganancia en todos los dispositivos analizados basados en heteroestructuras de InAl(Ga)N/GaN. Aunque presentando fotoconductividad persistente (PPC), los dispositivos resultan más rápidos con respeto a los valores que se dan en la literatura acerca de PPC en sistemas fotoconductivos. ABSTRACT The main objective of the present work is to study and exploit the two-dimensionalelectron- gas (2DEG) structures based on In-related nitride compounds. Many open questions are analyzed. In particular, technology and material-related topics are the focus of interest regarding both InNmaterial and InAl(Ga)N/GaNheterostructures (HSs) as well as their application to advanced devices. After the analysis of the dependence of InN properties on processing treatments (plasma-based and thermal), the problemof electrical blocking behaviour is taken into consideration. In particular its difficulty is due to the presence of a surface electron accumulation (SEA) in the form of a 2DEG, due to Fermi level pinning. The use of electrochemical methods, compared to standard microelectronic techniques, helped in the successful realization of this task. In particular, reversible modulation of SEA is accomplished. In heterostructures such as InAl(Ga)N/GaN, the 2DEGis present at the interface between GaN and InAl(Ga)N even without an external bias (normally-on structures). The technology related to the fabrication of normally off (E-mode) high-electron-mobility transistors (HEMTs) is investigated in heterostructures. An alkali-based wet-etching method is analysed, standing out the structural modifications the barrier underwent. The need of a precise control of the etched material is crucial, in this sense, to obtain a recessed structure for HEMT application with the lowest defect density and inhomogeneity. The dependence of the etch rate on the as-grown properties is observed and commented. Fundamental investigation related to InNis presented, related to the physics of this degeneratematerial. With the help of electrolyte gating (EG), the shift in Raman peaks is correlated to a variation in surface eletron density. As far as the application to device is concerned, due to the actual state of the technology and material quality of InN, not suitable for working devices yet, the focus is directed to the applications of InAl(Ga)N/GaN HSs. Due to the advantages of a very thin barrier layer, compared to standard AlGaN/GaN technology, the use of this structure is suitable for high sensitivity applications being the 2DEG channel closer to the surface. In fact, pH sensitivity obtained is comparable to the state-of-the-art in terms of surface potential variations, and, due to the ultrathin barrier, the current variation with pH can be recorded with no need of the external reference electrode. Moreover, 2DEG photoconductive structures present a high photoconductive gain duemostly to the high electric field at the interface,and hence a high separation strength of photogenerated electron and hole. The use of Schottky metallizations (Schottky photodiode and metal-semiconductor-metal) reduce the dark current, compared to photoconduction, and the thin barrier helps to increase the extraction efficiency. Gain is obtained in all the device structures investigated. The devices, even if they present persistent photoconductivity (PPC), resulted faster than the standard PPC related decay values.

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The first dark characterization of a thermometer fabricated with our Mo/Au bilayers to be used as a transition edge sensor is presented. High-quality, stress-free Mo layers, whose thickness is used to tune the critical temperature (TC ) down to 100 mK, are deposited by sputtering at room temperature (RT ) on Si3N4 bulk and membranes, and protected from degradation with a 15-nm sputtered Au layer. An extra layer of high-quality Au is deposited by ex situ e-beam to ensure low residual resistance. The thermometer is patterned on a membrane using standard photolithographic techniques and wet etching processes, and is contacted through Mo paths, displaying a sharp superconducting transition (α ≈ 600). Results show a good coupling between Mo and Au layers and excellent TC reproducibility, allowing to accurately correlate dM o and TC . Since dAu is bigger than ξM for all analyzed samples, bilayer residual resistance can be modified without affecting TC . Finally, first current to voltage measurements at different temperatures are measured and analyzed, obtaining the corresponding characterization parameters.

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Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

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In this work, we propose a new strategy for the synthesis of multifunctional nanowires using a combination of sol–gel and electrodeposition techniques, based on a two-step procedure. First of all, nanotubes of SiO2 are synthesized via a sol–gel technique using polycarbonate membranes as templates. Homogenous nanotubes are obtained after centrifugation and thermal annealing. Afterwards, a ferromagnetic cobalt core is grown using potentiostatic electrodeposition. Finally, the core–shell Co–SiO2 nanowires are released by dissolving the template using wet-etching. These nanodevices can be used for many detection and sensing purposes. As a proof of concept, we have developed a pH nanosensor by including a pH-sensitive organic dye in the SiO2 shell. The sensing principle is based on the optical response of the organic dye towards pH when added to a solution. The magnetic core allows the recovery of the nanosensors after use. These nanowires can therefore be used as recoverable pH nanosensors. By changing the dye molecule to another molecule or receptor, the procedure described in the paper can be used to synthesize nanodevices for many different applications.

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A novel laser electrodispersion (LE) technique was employed to deposit gold nanoparticles onto Si and SiOx surfaces. The LE technique combines laser ablation with cascade fission of liquid metal micro-drops, which results in the formation of nanoparticles upon rapid cooling. The shape and the size distribution of the Au nanoparticles prepared by LE depend on the nature of the support. Gold nanoparticles were also deposited in the channels of microreactors fabricated by wet etching of Si and used as SE(R)RS sensors. The influence of the nanoparticle surface density as well as of the nature of the substrate on the Raman response was studied. At an appropriate surface density of the deposited nanoparticles a significant enhancement of Raman signal was observed showing the possibility to create efficient SERS substrates. Application of microfluidic devices in surface enhanced Raman spectroscopy (SERS) in continuous-flow mode with sensor regeneration is described. © 2011 The Royal Society of Chemistry.

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We report the results of a study into the factors controlling the quality of nanolithographic imaging. Self-assembled monolayer (SAM) coverage, subsequent postetch pattern definition, and minimum feature size all depend on the quality of the Au substrate used in material mask atomic nanolithographic experiments. We find that sputtered Au substrates yield much smoother surfaces and a higher density of {111}-oriented grains than evaporated Au surfaces. Phase imaging with an atomic force microscope shows that the quality and percentage coverage of SAM adsorption are much greater for sputtered Au surfaces. Exposure of the self-assembled monolayer to an optically cooled atomic Cs beam traversing a two-dimensional array of submicron material masks mounted a few microns above the self-assembled monolayer surface allowed determination of the minimum average Cs dose (2 Cs atoms per self-assembled monolayer molecule) to write the monolayer. Suitable wet etching, with etch rates of 2.2 nm min-1, results in optimized pattern definition. Utilizing these optimizations, material mask features as small as 230 nm in diameter with a fractional depth gradient of 0.820 nm were realized.