436 resultados para Reconfigurable FSS


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This work aims to present how the reconfigurable microstrip antennas and frequency selective surfaces can be used to operate at communication systems that require changing their operation frequency according to system requirements or environmental conditions. The main purpose is to present a reconfigurable circular microstrip antenna using a parasitic ring and a reconfigurable dipole frequency selective surface. Thereupon there are shown fundamental topics like microstrip antennas, PIN diodes and the fundamental theory of reconfigurable antennas and frequency selective surfaces. There are shown the simulations and measurements of the fabricated prototypes and it is done an analysis of some parameters like the bandwidth and radiation pattern, for the antennas, and the transmission characteristics, for the frequency selective surface. Copper strips were used in place of the diodes for proof of the reconfigurability concept

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The paper proposes a methodology and design rules for organisational structures facing higher necessity of rapidly reconfigure themselves to cope with unpredictable situations-new markets, new products, changing mix of production, problems in production process or flows etc. It implies changing and often conflictive criteria for production goals and for the allocation of work. The methodology was developed based on a large field action research and consulting. Their basis is the design of auto-reconfigurable working groups-or groups with variable geometry, depending on the events to face. (C) 2009 Elsevier B.V. All rights reserved.

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This paper presents an analysis of a reconfigurable patch filter based on a triple-mode circular patch resonator with four radial slots. The analysis has been carried out thanks to the development of a new theoretical approach of the tunable patch filter based on the coupling matrix. The coefficients of the coupling matrix related to the tunable behavior have been identified and some rules for their evolution have been derived. For a proof-of-concept, a bandpass filter has been designed with a continuous tunability obtained with varactors connected across the slots. State-of-the-art results have been obtained, with a frequency tuning range of 27% from 1.95 to 2.43 GHz and a change in fractional bandwidth from 8.5% to 31.5% for the respective frequencies. In the entire tuning range, the return loss is better than 10 dB and the maximum insertion loss is 2 dB. Due to the newly developed coupling matrix, measurements, simulations, and theory showed great agreement.

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O trabalho descrito nesta dissertação de mestrado foca-se em geral na investigação de antenas impressas. São apresentados conceitos básicos, em conjunto com alguns exemplos desenvolvidos. No entanto, o principal foco prende-se com técnicas de miniaturização e reconfigurabilidade de antenas. A miniaturização de antenas é um tema de investigação de longa data, no entanto, novas técnicas e soluções são apresentadas regularmente. Nesta tese, é aplicada uma técnica recente, baseada na introdução de indutores encapsulados no elemento ressonante de uma antena, que permite miniaturizar um monopólio impresso com uma frequência de ressonância de 2.5 GHz. Outro assunto abordado neste trabalho é a reconfigurabilidade de antenas. Algumas das técnicas mais comuns na investigação actual são apresentadas e debatidas. Uma solução com recurso a díodos PIN é usada para estudar esta capacidade. Os conceitos e características deste tipo de componentes são apresentadas sendo feito o desenho e fabrico de um possível monopólio impresso reconfigurável para operação em dupla banda. Por fim, são combinadas as técnicas de miniaturização com inductor encapsulado e reconfigurabilidade através de díodos PIN, por forma a projectar uma antena reconfigurável muito pequena, para operação em duas bandas distintas. Os resultados são discutidos e com base nestes, algumas possíveis otimizações são propostas. The work reported in this dissertation is focused in the printed antenna research. Basic concepts of printed antennas are presented, along with a few examples that were developed. The main focus however, is around miniaturization and reconfigurability of antennas. Antenna miniaturization is a long time research subject, however, new techniques and solutions are presented everyday. In this thesis, a recent technique based on the introduction of chip inductors in the resonating element of a printed antenna is used in order to miniaturize a monopole with a resonating frequency at 2.5 GHz. Another issue approached in this work is antenna reconfigurability. Some common techniques used in antenna reconfiguration are presented and debated. A solution with PIN diodes is used to study this capability. The concepts and characteristics of this type of components are presented and an example of a reconfigurable printed monopole for dual-band operation is designed and fabricated. At last, miniaturization with chip inductor and reconfigurability through PIN diodes are used together to create a very small antenna for dual-band operation. The simulated and measured results are discussed and upon these, some possible optimizations are proposed.

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WDM multilayered SiC/Si devices based on a-Si:H and a-SiC:H filter design are approached from a reconfigurable point of view. Results show that the devices, under appropriated optical bias, act as reconfigurable active filters that allow optical switching and optoelectronic logic functions development. Under front violet irradiation the magnitude of the red and green channels are amplified and the blue and violet reduced. Violet back irradiation cuts the red channel, slightly influences the magnitude of the green and blue ones and strongly amplifies de violet channel. This nonlinearity provides the possibility for selective removal of useless wavelengths. Particular attention is given to the amplification coefficient weights, which allow taking into account the wavelength background effects when a band needs to be filtered from a wider range of mixed signals, or when optical active filter gates are used to select and filter input signals to specific output ports in WDM communication systems. A truth table of an encoder that performs 8-to-1 multiplexer (MUX) function is presented.

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Multilayered heterostructures based on embedded a-Si:H and a-SiC:H p-i-n filters are analyzed from differential voltage design perspective using short- and long-pass filters. The transfer functions characteristics are presented. A numerical simulation is presented to explain the filtering properties of the photonic devices. Several monochromatic pulsed lights, separately (input channels) or in a polychromatic mixture (multiplexed signal) at different bit rates, illuminated the device. Steady-state optical bias is superimposed from the front and the back side. Results show that depending on the wavelength of the external background and impinging side, the device acts either as a short- or a long-pass band filter or as a band-stop filter. Particular attention is given to the amplification coefficient weights, which allow to take into account the wavelength background effects when a band or frequency needs to be filtered or the gate switch, in which optical active filter gates are used to select and filter input signals to specific output ports in wavelength division multiplexing (WDM) communication systems. This nonlinearity provides the possibility for selective removal or addition of wavelengths. A truth table of an encoder that performs 8-to-1 MUX function exemplifies the optoelectronic conversion.

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Due to the application of active components into antennas these became a source of distortion on wireless communication systems. In this paper we explore the nonlinear effects occurring in a frequency reconfigurable antenna operating with a PIN Diode. We describe the measurement setup used to check the antenna intermodulation products and the measured compression and third order intermodulation limitations of a frequency reconfigurable antenna, operating at the UMTS and WLAN frequencies.

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Technology plays a double role in Education: it can act as a facilitator in the teaching/learning process and it can be the very subject of that process in Science & Engineering courses. This is especially true when students perform laboratory activities where they interact with equipment and objects under experimentation. In this context, technology can also play a facilitator role if it allows students to perform experiments in a remote fashion, through the Internet, in a so-called weblab or remote laboratory. No doubt, the Internet has been revolutionizing the educational process in many aspects, and it can be stated that remote laboratories are just an angle of that on-going revolution. As any other educational tool or resource, the i) pedagogical approach and the ii) technology used in the development of a remote laboratory can dictate its general success or its ephemeral existence. By pedagogical approach we consider the way remote experiments address the process by which students acquire experimental skills and link experimental results to theoretical concepts. In respect to technology, we discuss different specification and implementation alternatives, to show the case where the adoption of a family of standards would positively contribute to a larger acceptance and utilization of remote laboratories, and also to a wider collaboration in their development.

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This paper proposes a possible implementation of a compact printed monopole antenna, useful to operate in UMTS and WLAN bands. In order to accomplish that, a miniaturization technique based on the application of chip inductors is used in conjunction with frequency reconfiguration capability. The chip inductors change the impedance response of the monopole, allowing to reduce the resonant frequency. In order to be able to operate the antenna in these two different frequencies, an antenna reconfiguration technique based on PIN diodes is applied. This procedure allows the change of the active form of the antenna leading to a shift in the resonant frequency. The prototype measurements show good agreement with the simulation results.

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It is already more than 10 years that weblabs are seen as important resources to provide the experimental work required in engineering education. Several weblabs have been applied in engineering courses, but there are still unsolved problems related to the development of their infrastructures. For solving some of those problems, it was implemented a weblab with a reconfigurable infrastructure compliant with the IEEE1451.0 Std. and supported by Field Programmable Gate Array (FPGA) technology. This paper presents the referred weblab, and provides and analyses a set of researchers' opinions about the implemented infrastructure, and the adopted methodology for the conduction of real experiments.

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Weblabs are spreading their influence in Science and Engineering (S&E) courses providing a way to remotely conduct real experiments. Typically, they are implemented by different architectures and infrastructures supported by Instruments and Modules (I&Ms) able to be remotely controlled and observed. Besides the inexistence of a standard solution for implementing weblabs, their reconfiguration is limited to a setup procedure that enables interconnecting a set of preselected I&Ms into an Experiment Under Test (EUT). Moreover, those I&Ms are not able to be replicated or shared by different weblab infrastructures, since they are usually based on hardware platforms. Thus, to overcome these limitations, this paper proposes a standard solution that uses I&Ms embedded into Field-Programmable Gate Array (FPGAs) devices. It is presented an architecture based on the IEEE1451.0 Std. supported by a FPGA-based weblab infrastructure able to be remotely reconfigured with I&Ms, described through standard Hardware Description Language (HDL) files, using a Reconfiguration Tool (RecTool).

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Dynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.

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To boost logic density and reduce per unit power consumption SRAM-based FPGAs manufacturers adopted nanometric technologies. However, this technology is highly vulnerable to radiation-induced faults, which affect values stored in memory cells, and to manufacturing imperfections. Fault tolerant implementations, based on Triple Modular Redundancy (TMR) infrastructures, help to keep the correct operation of the circuit. However, TMR is not sufficient to guarantee the safe operation of a circuit. Other issues like module placement, the effects of multi- bit upsets (MBU) or fault accumulation, have also to be addressed. In case of a fault occurrence the correct operation of the affected module must be restored and/or the current state of the circuit coherently re-established. A solution that enables the autonomous restoration of the functional definition of the affected module, avoiding fault accumulation, re-establishing the correct circuit state in real-time, while keeping the normal operation of the circuit, is presented in this paper.

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To increase the amount of logic available in SRAM-based FPGAs manufacturers are using nanometric technologies to boost logic density and reduce prices. However, nanometric scales are highly vulnerable to radiation-induced faults that affect values stored in memory cells. Since the functional definition of FPGAs relies on memory cells, they become highly prone to this type of faults. Fault tolerant implementations, based on triple modular redundancy (TMR) infrastructures, help to keep the correct operation of the circuit. However, TMR is not sufficient to guarantee the safe operation of a circuit. Other issues like the effects of multi-bit upsets (MBU) or fault accumulation, have also to be addressed. Furthermore, in case of a fault occurrence the correct operation of the affected module must be restored and the current state of the circuit coherently re-established. A solution that enables the autonomous correct restoration of the functional definition of the affected module, avoiding fault accumulation, re-establishing the correct circuit state in realtime, while keeping the normal operation of the circuit, is presented in this paper.

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To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its use more attractive. However, these technological improvements also make FPGAs particularly vulnerable to configuration memory bit-flips caused by power fluctuations, strong electromagnetic fields and radiation. This issue is particularly sensitive because of the increasing amount of configuration memory cells needed to define their functionality. A short survey of the most recent publications is presented to support the options assumed during the definition of a framework for implementing circuits immune to bit-flips induction mechanisms in memory cells, based on a customized redundant infrastructure and on a detection-and-fix controller.