同步加速器高频系统前端控制器改进设计；Improvement Design of RF Front-end Controller for Synchrotron RF System

介绍了在CSR同步加速器高频控制系统改进项目中,高频前端控制器的改进设计。根据系统改进的具体要求,采用DSP+FPGA双电路板的体系结构,对高频前端控制器各个部分做了详细的设计,并给出了具体的资源消耗结果和设计图。

Developing wireless measurement system for building deployed capacitive sensors with optimized RF front end circuit

In this paper, a prototype of miniaturized, low power, bi-directional wireless sensor node for wireless sensor networks (WSN) was designed for doors and windows building monitoring. The capacitive pressure sensors have been developed particularly for such application, where packaging size and minimization of the power requirements of the sensors are the major drivers. The capacitive pressure sensors have been fabricated using a 2.4 mum thick strain compensated heavily boron doped SiGeB diaphragm is presented. In order to integrate the sensors with the wireless module, the sensor dice was wire bonded onto TO package using chip on board (COB) technology. The telemetric link and its capabilities to send information for longer range have been significantly improved using a new design and optimization process. The simulation tool employed for this work was the Designerreg tool from Ansoft Corporation.

CMOS RF front-end receivers for DVB-SH

Programa de doctorado: Ingeniería de Telecomunicación Avanzada.

DESIGN OF A MINIATURIZED SOP INTEGRATED GNSS RF FRONT-END MODULE

Navigation devices used to be bulky and expensive and were not widely commercialized for personal use. Nowadays, all useful electronic devices are turning into being handheld so that they can be conveniently used anytime and anywhere. One can claim that almost any mobile phone, used today, has quite strong navigational capabilities that can efficiently work anywhere in the globe. No matter where you are, you can easily know your exact location and make your way smoothly to wherever you would like to go. This couldn’t have been made possible without the existence of efficient and small microwave circuits responsible for the transmission and reception of high quality navigation signals. This thesis is mainly concerned with the design of novel highly miniaturized and efficient filtering components working in the Global Navigational Satellite Systems (GNSS) frequency band to be integrated within an efficient Radio Frequency (RF) front-end module (FEM). A System-on-Package (SoP) integration technique is adopted for the design of all the components in this thesis. Two novel miniaturized filters are designed, where one of them is a wideband filter targeting the complete GNSS band with a fractional bandwidth of almost 50% at a center frequency of 1.385 GHz. This filter utilizes a direct inductive coupling topology to achieve the required wide band performance. It also has very good out-of-band rejection and low IL. Whereas the other dual band filter will only cover the lower and upper GNSS bands with a rejection notch in between the two bands. It has very good inter band rejection. The well-known “divide and conquer” design methodology was applied for the design of this filter to help save valuable design and optimization time. Moreover, the performance of two commercially available ultra-Low Noise Amplifiers (LNAs) is studied. The complete RF FEM showed promising preliminary performance in terms of noise figure, gain and bandwidth, where it out performed other commercial front-ends in these three aspects. All the designed circuits are fabricated and tested. The measured results are found to be in good agreements with the simulations.

DESIGN OF A MINIATURIZED SOP INTEGRATED GNSS RF FRONT-END MODULE

Navigation devices used to be bulky and expensive and were not widely commercialized for personal use. Nowadays, all useful electronic devices are turning into being handheld so that they can be conveniently used anytime and anywhere. One can claim that almost any mobile phone, used today, has quite strong navigational capabilities that can efficiently work anywhere in the globe. No matter where you are, you can easily know your exact location and make your way smoothly to wherever you would like to go. This couldn’t have been made possible without the existence of efficient and small microwave circuits responsible for the transmission and reception of high quality navigation signals. This thesis is mainly concerned with the design of novel highly miniaturized and efficient filtering components working in the Global Navigational Satellite Systems (GNSS) frequency band to be integrated within an efficient Radio Frequency (RF) front-end module (FEM). A System-on-Package (SoP) integration technique is adopted for the design of all the components in this thesis. Two novel miniaturized filters are designed, where one of them is a wideband filter targeting the complete GNSS band with a fractional bandwidth of almost 50% at a center frequency of 1.385 GHz. This filter utilizes a direct inductive coupling topology to achieve the required wide band performance. It also has very good out-of-band rejection and low IL. Whereas the other dual band filter will only cover the lower and upper GNSS bands with a rejection notch in between the two bands. It has very good inter band rejection. The well-known “divide and conquer” design methodology was applied for the design of this filter to help save valuable design and optimization time. Moreover, the performance of two commercially available ultra-Low Noise Amplifiers (LNAs) is studied. The complete RF FEM showed promising preliminary performance in terms of noise figure, gain and bandwidth, where it out performed other commercial front-ends in these three aspects. All the designed circuits are fabricated and tested. The measured results are found to be in good agreements with the simulations.

A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF-DC Rectifier

This paper presents a fully integrated CMOS analog front end for a passive 900-MHz radio-frequency identification (RFID) transponder. The power supply in this front end is generated from the received RF electromagnetic energy by using an RF-dc voltage rectifier. In order to improve the compatibility with standard CMOS technology, Schottky diodes in conventional RF-dc rectifiers are replaced by diode-connected MOS transistors with zero threshold. Meanwhile, theoretical analyses for the proposed rectifier are provided and verified by both simulation and measurement results. The design considerations of the pulsewidth-modulation (PWM) demodulator and the backscatter modulator in the front end are also discussed for low-power applications. The proposed front end is implemented in a 0.35-mu m 2P4M CMOS technology. The whole chip occupies a die area of 490 x 780 mu m(2) and consumes only 2.1 mu W in reading mode under a self-generated 1.5-V supply voltage. The measurement results show that the proposed rectifier can properly operate with a - 14.7-dBm input RF power at a power conversion efficiency of 13.0%. In the proposed RFID applications, this sensitivity corresponds to 10.88-m communication distance at 4-W equivalent isotropically radiated power from a reader base station.

A wide-band front-end for terrestrial and cable receptions

In this paper, a wide-band low noise amplifier, two mixers and a VCO with its buffers implemented in 50GHz 0.35 mu m SiGe BiCMOS technology for dual-conversion digital TV tuner front-end is presented. The LNA and up-converting mixer utilizes current injection technology to achieve high linearity. Without using inductors, the LNA achieves 0.1-1GHz wide bandwidth and 18.8-dB gain with less than 1.4-dB gain variation. The noise figure of the LNA is less than 5dB and its 1dB compression point is -2 dBm. The IIP3 of two mixers is 25-dBm. The measurement results show that the VCO has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole chip consume 253mW power with 5-V supply.

Dual-tracking multi-constellation GNSS front-end for high-performance receiver applications

This paper presents the design and implementation of a dual–tracking Radio Frequency (RF) front–end for a multi–constellation Global Navigation Satellite Systems (GNSS) receiver. The RF frond–end is based on the direct RF conversion architecture, which employs sub–Nyquist sampling (also known as subsampling) at RF. The dual–tracking RF front–end is composed of a few RF components that are duplicated to form the two RF channels. Employing a dual–channel Analogue–to–Digital Converter (ADC) enables synchronisation of the RF channels and minimises the errors resulting from the differences in the satellite clocks and the propagation delay between the two RF channels. The digitised GNSS signals are processed by two separate acquisition and tracking engines that are driven by the front–end’s master clock. This setup provides two synchronised receivers that are integrated onto one piece of hardware. The hardware is intended to be used for research applications such as multipath mitigation, scintillation assessment, and advanced satellite clock and spatial frame transformation modelling.

Visual front-end wars : Viola-Jones face detector vs Fourier Lucas-Kanade

The performance of visual speech recognition (VSR) systems are significantly influenced by the accuracy of the visual front-end. The current state-of-the-art VSR systems use off-the-shelf face detectors such as Viola- Jones (VJ) which has limited reliability for changes in illumination and head poses. For a VSR system to perform well under these conditions, an accurate visual front end is required. This is an important problem to be solved in many practical implementations of audio visual speech recognition systems, for example in automotive environments for an efficient human-vehicle computer interface. In this paper, we re-examine the current state-of-the-art VSR by comparing off-the-shelf face detectors with the recently developed Fourier Lucas-Kanade (FLK) image alignment technique. A variety of image alignment and visual speech recognition experiments are performed on a clean dataset as well as with a challenging automotive audio-visual speech dataset. Our results indicate that the FLK image alignment technique can significantly outperform off-the shelf face detectors, but requires frequent fine-tuning.

HFL micro inverter with front-end diode clamped multi-level inverter and half-wave cycloconverter

A high-frequency-link (HFL) micro inverter with a front-end diode clamped multi-level inverter and a grid-connected half-wave cycloconverter is proposed. The diode clamped multi-level inverter with an auxiliary capacitor is used to generate high-frequency (HF) three level quasi square-wave output and it is fed into a series resonant tank to obtain high frequency continuous sinusoidal current. The obtained continuous sinusoidal current is modulated by using the grid-connected half-wave cycloconverter to obtain grid synchronized output current in phase with the grid voltage. The phase shift power modulation is used with auxiliary capacitor at the front-end multi-level inverter to have soft-switching. The phase shift between the HFL resonant current and half-wave cycloconverter input voltage is modulated to obtain grid synchronized output current.

HFL PV micro-inverter with front-end current-fed converter and half-wave cycloconverter

A high-frequency-link micro inverter is proposed with a front-end dual inductor push-pull converter and a grid-connected half-wave cycloconverter. Pulse width modulation is used to control the front-end converter and phase shift modulation is used at the back-end converter to obtain grid synchronized output current. A series resonant circuit and high-frequency transformer are used to interface the front-end and the back-end converters. The operation of the proposed micro-inverter in grid-connected mode is validated using MATLAB/Simpower simulation. Experimental results are provided to further validate the operation.

Micro inverter with a front-end current-fed converter

The reliability of micro inverters is an important factor as it would be necessary to reduce cost and maintenance of the small and medium scale distributed PV power conversion systems. Electrolytic capacitors and active power decouple circuits can be avoided in micro inverters with the use of medium voltage DC-link. Such a DC-link based micro inverter is proposed with a front-end dual inductor current-fed push-pull converter. The primary side power switches of the front-end converter have reduced switching losses due to multi-resonant operation. In addition, the voltage and current stresses on the diodes of the secondary diode voltage doubler rectifier are reduced due to the presence of a series resonant circuit in the front-end converter. The operation of the proposed micro inverter is explained using an in-depth analysis of the switching characteristics of the power semiconductor devices. The theoretical analysis of the proposed micro inverter is validated using simulation result.

A Front end Switched Rectifier DC Source for Neutral Point Balancing of A NPC Three-Level Inverter for The Full Modulation Range

A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.