Frame-rate stereopsis using non-parametric transforms and programmable logic

A frame-rate stereo vision system, based on non-parametric matching metrics, is described. Traditional metrics, such as normalized cross-correlation, are expensive in terms of logic. Non-parametric measures require only simple, parallelizable, functions such as comparators, counters and exclusive-or, and are thus very well suited to implementation in reprogrammable logic.

A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays

In this paper, the validity of'single fault assumption in deriving diagnostic test sets is examined with respect to crosspoint faults in programmable logic arrays (PLA's). The control input procedure developed here can be used to convert PLA's having undetectable crosspoint faults to crosspoint-irredundant PLA's for testing purposes. All crosspoints will be testable in crosspoint-irredundant PLA's. The control inputs are used as extra variables during testing. They are maintained at logic I during normal operation. A useful heuristic for obtaining a near-minimal number of control inputs is suggested. Expressions for calculating bounds on the number of control inputs have also been obtained.

An on-line algorithm for the location of cross point faults in programmable logic arrays

An on-line algorithm is developed for the location of single cross point faults in a PLA (FPLA). The main feature of the algorithm is the determination of a fault set corresponding to the response obtained for a failed test. For the apparently small number of faults in this set, all other tests are generated and a fault table is formed. Subsequently, an adaptive procedure is used to diagnose the fault. Functional equivalence test is carried out to determine the actual fault class if the adaptive testing results in a set of faults with identical tests. The large amount of computation time and storage required in the determination, a priori, of all the fault equivalence classes or in the construction of a fault dictionary are not needed here. A brief study of functional equivalence among the cross point faults is also made.

An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays

An on-line algorithm is developed for the location of single cross point faults in a PLA (FPLA). The main feature of the valgorithm is the determination of a fault set corresponding to the response obtained for a failed test. For the apparently small number of faults in this set, all other tests are generated and a fault table is formed. Subsequently, an adaptive procedure is used to diagnose the fault. Functional equivalence test is carried out to determine the actual fault class if the adaptive testing results in a set of faults with identical tests. The large amount of computation time and storage required in the determination, a priori, of all the fault equivalence classes or in the construction of a fault dictionary are not needed here. A brief study of functional equivalence among the cross point faults is also made.

Foldable compatibility matrix for the folding of programmable logic arrays

This paper describes a switching theoretic algorithm for the folding of programmable logic arrays (PLA). The algorithm is valid for both column and row folding, although it has been presented considering only the simple column folding. The pairwise compatibility relations among all the pairs of the columns of the PLA are mapped into a square matrix, called the compatibility matrix of the PLA. A foldable compatibility matrix (FCM), a new concept introduced by the author, is then derived from the compatibility matrix. A new theorem called the folding theorem is then proved. The theorem states that the existence of an m by 2m FCM is both necessary and sufficient to fold 2m columns of the n column PLA (2m ≤ n). Once an FCM is obtained, the ordered pairs of foldable columns and the re-ordering of the rows are readily determined.

Nonautonomous elementary net systems and their application to programmable logic control

In this paper, a novel approach to Petri net modeling of programmable logic controller (PLC) programs is presented. The modeling approach is a simple extension of elementary net systems, and a graphical design tool that supports the use of this modeling approach is provided. A key characteristic of the model is that the binary sensory inputs and binary actuation outputs of the PLC are explicitly represented. This leads to the following two improvements: outputs are unambiguous, and interaction patterns are more clearly represented in the graphical form. The use of this modeling approach produces programs that are simple, lightweight, and portable. The approach is demonstrated by applying it to the development of a control module for a MonTech Positioning Station. © 2008 IEEE.

Programmable Logic-Based Delivery of Small-Molecule Therapeutics from Gels

Thesis (Master's)--University of Washington, 2015

Performance evaluation on electronic control systemsfor field sprayers using programmable logic controllers

The aim of this study was to develop a laboratory method for time response evaluation on electronically controlled spray equipment using Programmable Logic Controllers (PLCs). For that purpose, a PLC controlled digital drive inverter was set up to drive an asynchronous electric motor linked to a centrifugal pump on a experimental sprayer equipped with electronic flow control. The PLC was operated via RS232 serial communication from a PC computer. A user program was written to control de motor by adjusting the following system variables, all related to the motor speed: time stopped; ramp up and ramp down times, time running at a given constant speed and ramp down time to stop the motor. This set up was used in conjunction with a data acquisition system to perform laboratory tests with an electronically controlled sprayer. Time response for pressure stabilization was measured while changing the pump speed by +/-20%. The results showed that for a 0.2 s ramp time increasing the motor speed, as an example, an AgLogix Flow Control system (Midwest Technologies Inc.) took 22 s in average to readjust the pressure. When decreasing the motor speed, this time response was down to 8 s. General results also showed that this kind of methodology could make easier the definition of standards for tests on electronically controlled application equipment.

Programmable logic design of a compact Genetic Algorithm for phasor estimation in real-time

The main objective of this work is to present an efficient method for phasor estimation based on a compact Genetic Algorithm (cGA) implemented in Field Programmable Gate Array (FPGA). To validate the proposed method, an Electrical Power System (EPS) simulated by the Alternative Transients Program (ATP) provides data to be used by the cGA. This data is as close as possible to the actual data provided by the EPS. Real life situations such as islanding, sudden load increase and permanent faults were considered. The implementation aims to take advantage of the inherent parallelism in Genetic Algorithms in a compact and optimized way, making them an attractive option for practical applications in real-time estimations concerning Phasor Measurement Units (PMUs).

A new approach to a model of the mammalian retina with optically programmable logic cells

This paper reports a model of the mammalian retina as well as an interpretation of some functions of the visual cortex. Its main objective is to simulate some of the behaviors observed at the different retina cells depending on the characteristics of the light impinging onto the photoreceptors. This simulation is carried out with a simple structure employed previously as basic building block of some optical computer architectures. Its possibility to perform any type of Boolean function allows a wide range of behaviors.

Chaos synchronization in optically programmable logic cells

A possible approach to the synchronization of chaotic circuits is reported. It is based on an Optically Programmable Logic Cell and the signals are fully digital. A method to study the characteristics of the obtained chaos is reported as well as a new technique to compare the obtained chaos from an emitter and a receiver. This technique allows the synchronization of chaotic signals. The signals received at the receiver, composed by the addition of information and chaotic signals, are compared with the chaos generated there and a pure information signal can be detected. Its application to cryptography in Optical Communications comes directly from these properties. The model here presented is based on a computer simulation.

Optically programmable logic cells as basic units for transmission and synchronization of chaotic signals

We proposed an optical communications system, based on a digital chaotic signal where the synchronization of chaos was the main objective, in some previous papers. In this paper we will extend this work. A way to add the digital data signal to be transmitted onto the chaotic signal and its correct reception, is the main objective. We report some methods to study the main characteristics of the resulting signal. The main problem with any real system is the presence of some retard between the times than the signal is generated at the emitter at the time when this signal is received. Any system using chaotic signals as a method to encrypt need to have the same characteristics in emitter and receiver. It is because that, this control of time is needed. A method to control, in real time the chaotic signals, is reported.