Three-level inverter fed open-end winding IM drive with common mode voltage elimination and reduced power device count

A three-level space phasor generation scheme with common mode elimination and with reduced power device count is proposed for an open end winding induction motor in this paper. The open end winding induction motor is fed by the three-level inverters from both sides. Each two level inverter is formed by cascading two two-level inverters. By sharing the bottom inverter for the two three-level inverters on either side, the power device count is reduced. The switching states with zero common mode voltage variation are selected for PWM switching so that there is no alternating common mode voltage in the pole voltages as well as in phase voltages. Only two isolated DC-links, with half the voltage rating of a conventional three-level neutral point clamped inverter, are needed for the proposed scheme.

A field effect transistor using highly nitrogen-doped CVD diamond for power device applications

A new idea of power device, which contains highly nitrogen-doped CVD diamond and Schottky contact, is proposed to actualise a power device with diamond. Two-dimensional simulation is conducted using ISE TCAD device simulator. While comparably high current is obtained in a transient simulation as expected, this current does not contribute to the drain-source current because of the symmetry of the device. Using an asymmetric structure or bias conditions, the device has high potential as an electric device for extremely high power, high frequency and high temperature. © 2003 Elsevier Science B.V. All rights reserved.

Technical impediments to a more effective utilization of neutron transmutation doped silicon for high-power device fabrication /

"Issued May 1980."

Voltage unbalance improvement in low voltage residential feeders with rooftop PVs using custom power devices

Voltage unbalance is a major power quality problem in low voltage residential feeders due to the random location and rating of single-phase rooftop photovoltaic cells (PV). In this paper, two different improvement methods based on the application of series (DVR) and parallel (DSTATCOM) custom power devices are investigated to improve the voltage unbalance problem in these feeders. First, based on the load flow analysis carried out in MATLAB, the effectiveness of these two custom power devices is studied vis-à-vis the voltage unbalance reduction in urban and semi-urban/rural feeders containing rooftop PVs. Their effectiveness is studied from the installation location and rating points of view. Later, a Monte Carlo based stochastic analysis is carried out to investigate their efficacy for different uncertainties of load and PV rating and location in the network. After the numerical analyses, a converter topology and control algorithm is proposed for the DSTATCOM and DVR for balancing the network voltage at their point of common coupling. A state feedback control, based on pole-shift technique, is developed to regulate the voltage in the output of the DSTATCOM and DVR converters such that the voltage balancing is achieved in the network. The dynamic feasibility of voltage unbalance and profile improvement in LV feeders, by the proposed structure and control algorithm for the DSTATCOM and DVR, is verified through detailed PSCAD/EMTDC simulations.

Power quality improvements in low voltage distribution networks containing distributed energy resources

In this thesis various schemes using custom power devices for power quality improvement in low voltage distribution network are studied. Customer operated distributed generators makes a typical network non-radial and affect the power quality. A scheme considering different algorithm of DSTATCOM is proposed for power circulation and islanded operation of the system. To compensate reactive power overflow and facilitate unity power factor, a UPQC is introduced. Stochastic analysis is carried out for different scenarios to get a comprehensive idea about a real life distribution network. Combined operation of static compensator and voltage regulator is tested for the optimum quality and stability of the system.

HVIC switch for high-frequency power converters

A high voltage integrated circuit (HVIC) switch designed as a building block for power converters operating up to 13.56 MHz from off-line voltages is presented. A CMOS-compatible, 500 V power device process is used to integrate control circuitry with a high-speed MOS gate driver and high voltage lateral power MOSFET. Fabrication of the HVIC switches has proceeded in two stages. The first batch of devices showed switching times of less than 5 ns for the power switch and good high frequency performance of a level-shifter for driving half bridge converters. In the second phase, a switch that monolithically integrates all the elements required to form a complete high-frequency converter has been designed.

Switching aspects of hybrid semiconductor power devices

A hybrid semiconductor power device has been designed which combines IGBT switching and thyristor on-state characteristics. A single gate signal controls the switching and triggers the transitions between an IGBT and a thyristor mode of operation. This paper discusses aspects of the switching behaviour of this and of similar devices. Simulation results of an example structure are presented and conceivable developments in the switching characteristics of hybrid devices are discussed.

Switching aspects of hybrid semiconductor power devices

A hybrid semiconductor power device has been designed which combines IGBT switching and thyristor on-state characteristics. A single gate signal controls the switching and triggers the transitions between an IGBT and a thyristor mode of operation. This paper discusses aspects of the switching behaviour of this and of similar devices. Simulation results of an example structure are presented and conceivable developments in the switching characteristics of hybrid devices are discussed.