RECONNECT: A NoC for polymorphic ASICs using a low overhead single cycle router

A polymorphic ASIC is a runtime reconfigurable hardware substrate comprising compute and communication elements. It is a ldquofuture proofrdquo custom hardware solution for multiple applications and their derivatives in a domain. Interoperability between application derivatives at runtime is achieved through hardware reconfiguration. In this paper we present the design of a single cycle Network on Chip (NoC) router that is responsible for effecting runtime reconfiguration of the hardware substrate. The router design is optimized to avoid FIFO buffers at the input port and loop back at output crossbar. It provides virtual channels to emulate a non-blocking network and supports a simple X-Y relative addressing scheme to limit the control overhead to 9 bits per packet. The 8times8 honeycomb NoC (RECONNECT) implemented in 130 nm UMC CMOS standard cell library operates at 500 MHz and has a bisection bandwidth of 28.5 GBps. The network is characterized for random, self-similar and application specific traffic patterns that model the execution of multimedia and DSP kernels with varying network loads and virtual channels. Our implementation with 4 virtual channels has an average network latency of 24 clock cycles and throughput of 62.5% of the network capacity for random traffic. For application specific traffic the latency is 6 clock cycles and throughput is 87% of the network capacity.

Traffic engineered NoC for streaming applications

Streaming applications demand hard bandwidth and throughput guarantees in a multiprocessor environment amidst resource competing processes. We present a Label Switching based Network-on-Chip (LS-NoC) motivated by throughput guarantees offered by bandwidth reservation. Label switching is a packet relaying technique in which individual packets carry route information in the form of labels. A centralized LS-NoC Management framework engineers traffic into Quality of Service (QoS) guaranteed routes. LS-NoC caters to the requirements of streaming applications where communication channels are fixed over the lifetime of the application. The proposed NoC framework inherently supports heterogeneous and ad hoc system-on-chips. The LS-NoC can be used in conjunction with conventional best effort NoC as a QoS guaranteed communication network or as a replacement to the conventional NoC. A multicast, broadcast capable label switched router for the LS-NoC has been designed. A 5 port, 256 bit data bus, 4 bit label router occupies 0.431 mm(2) in 130 nm and delivers peak bandwidth of 80 Gbits/s per link at 312.5 MHz. Bandwidth and latency guarantees of LS-NoC have been demonstrated on traffic from example streaming applications and on constant and variable bit rate traffic patterns. LS-NoC was found to have a competitive AreaxPower/Throughput figure of merit with state-of-the-art NoCs providing QoS. Circuit switching with link sharing abilities and support for asynchronous operation make LS-NoC a desirable choice for QoS servicing in chip multiprocessors. (C) 2013 Elsevier B.V. All rights reserved.

Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat

The growing number of applications and processing units in modern Multiprocessor Systems-on-Chips (MPSoCs) come along with reduced time to market. Different IP cores can come from different vendors, and their trust levels are also different, but typically they use Network-on-Chip (NoC) as their communication infrastructure. An MPSoC can have multiple Trusted Execution Environments (TEEs). Apart from performance, power, and area research in the field of MPSoC, robust and secure system design is also gaining importance in the research community. To build a secure system, the designer must know beforehand all kinds of attack possibilities for the respective system (MPSoC). In this paper we survey the possible attack scenarios on present-day MPSoCs and investigate a new attack scenario, i.e., router attack targeted toward NoC architecture. We show the validity of this attack by analyzing different present-day NoC architectures and show that they are all vulnerable to this type of attack. By launching a router attack, an attacker can control the whole chip very easily, which makes it a very serious issue. Both routing tables and routing logic-based routers are vulnerable to such attacks. In this paper, we address attacks on routing tables. We propose different monitoring-based countermeasures against routing table-based router attack in an MPSoC having multiple TEEs. Synthesis results show that proposed countermeasures, viz. Runtime-monitor, Restart-monitor, Intermediate manager, and Auditor, occupy areas that are 26.6, 22, 0.2, and 12.2 % of a routing table-based router area. Apart from these, we propose Ejection address checker and Local monitoring module inside a router that cause 3.4 and 10.6 % increase of a router area, respectively. Simulation results are also given, which shows effectiveness of proposed monitoring-based countermeasures.

Generic low-latency NoC router architecture for FPGA computing systems

A novel cost-effective and low-latency wormhole router for packet-switched NoC designs, tailored for FPGA, is presented. This has been designed to be scalable at system level to fully exploit the characteristics and constraints of FPGA based systems, rather than custom ASIC technology. A key feature is that it achieves a low packet propagation latency of only two cycles per hop including both router pipeline delay and link traversal delay - a significant enhancement over existing FPGA designs - whilst being very competitive in terms of performance and hardware complexity. It can also be configured in various network topologies including 1-D, 2-D, and 3-D. Detailed design-space exploration has been carried for a range of scaling parameters, with the results of various design trade-offs being presented and discussed. By taking advantage of abundant buildin reconfigurable logic and routing resources, we have been able to create a new scalable on-chip FPGA based router that exhibits high dimensionality and connectivity. The architecture proposed can be easily migrated across many FPGA families to provide flexible, robust and cost-effective NoC solutions suitable for the implementation of high-performance FPGA computing systems. © 2011 IEEE.

TLM2.0 based timing accurate modeling method for complex NoC systems

Scalability and efficiency of on-chip communication of emerging Multiprocessor System-on-Chip (MPSoC) are critical design considerations. Conventional bus based interconnection schemes no longer fit for MPSoC with a large number of cores. Networks-on-Chip (NoC) is widely accepted as the next generation interconnection scheme for large scale MPSoC. The increase of MPSoC complexity requires fast and accurate system-level modeling techniques for rapid modeling and veri-fication of emerging MPSoCs. However, the existing modeling methods are limited in delivering the essentials of timing accuracy and simulation speed. This paper proposes a novel system-level Networks-on-Chip (NoC) modeling method, which is based on SystemC and TLM2.0 and capable of delivering timing accuracy close to cycle accurate modeling techniques at a significantly lower simulation cost. Experimental results are presented to demonstrate the proposed method. ©2010 IEEE.

A multi-objective adaptive immune algorithm for multi-application NoC mapping

Current SoC design trends are characterized by the integration of larger amount of IPs targeting a wide range of application fields. Such multi-application systems are constrained by a set of requirements. In such scenario network-on-chips (NoC) are becoming more important as the on-chip communication structure. Designing an optimal NoC for satisfying the requirements of each individual application requires the specification of a large set of configuration parameters leading to a wide solution space. It has been shown that IP mapping is one of the most critical parameters in NoC design, strongly influencing the SoC performance. IP mapping has been solved for single application systems using single and multi-objective optimization algorithms. In this paper we propose the use of a multi-objective adaptive immune algorithm (M(2)AIA), an evolutionary approach to solve the multi-application NoC mapping problem. Latency and power consumption were adopted as the target multi-objective functions. To compare the efficiency of our approach, our results are compared with those of the genetic and branch and bound multi-objective mapping algorithms. We tested 11 well-known benchmarks, including random and real applications, and combines up to 8 applications at the same SoC. The experimental results showed that the M(2)AIA decreases in average the power consumption and the latency 27.3 and 42.1 % compared to the branch and bound approach and 29.3 and 36.1 % over the genetic approach.

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Mode of access: Internet.

Construção de um ambiente virtual de aprendizagem para aplicação do processo de enfermagem baseado na Nanda International, NOC, NIC e CIPE®

This study aimed to build a virtual learning environment for application of the nursing process based on the NANDA-I, NOC, NIC and ICNP® . Faced with problems related to learning of the nursing process and classifications, there is an urgent need to develop innovative teaching resources that modify the relationship between students and teachers. The methodology was based on the steps inception, development, construction and transition, and the software development process Rational Process Unifield. The team involved in the development of this environment was composed by researchers and students of The Care and Epidemiological Practice in Health and Nursing and Group of the Software Engineering curse of the Federal University Rio Grande do Norte, with the participation of the Lisbon and Porto Schools of Nursing, in Portugal. In the inception stage the inter research communication was in order to define the functions, features and tools for the construction process. In the preparation, step the planning and modeling occurred, which resulted in the creation of a diagram and a architectural drawings that specify the features and functionality of the software. The development, unit testing and integrated in interfaces of the modules and areas (administrator, teacher, student, and construction of the NP). Then the transition step was performed, which showed complete and functioning system, as well as the training and use by researchers with its use in practice. In conclusion, this study allowed for the planning and the construction of an educational technology, and it is expected that its implementation will trigger a substantial change in the learning of the nursing process and classifications, with the student being active agent of the learning process. Later, an assessment will be made of functional performance, which will enable the software development, with a feedback, correction of defects and necessary changes. It is believed that the software increment after the reviews, this tool grow further and help insert this methodology and every language under the educational and health institutions, promoting paradigmatic desired change by nursing.

Seguridad del paciente tratado con E.I.M.I en una UCCYU: aplicación de NANDA-NOC-NIC

El infliximab o remicade® es un anticuerpo monoclonal quimérico, utilizado para disminuir la cascada inflamatoria en enfermedades inflamatorias. Los objetivos de esta investigación es normalizar la práctica clínica de los pacientes tratados con Infliximab, disminuir la variabilidad de cuidados y mejorar la seguridad de estos pacientes. Se ha elaborado un registro de diagnósticos de enfermería, NOC y NIC que con mayor incidencia se presentan en pacientes con E.I.M.I tratados con Inflixibab, con los cuales se pueden realizar cuidados de enfermería de calidad, logrando garantizar el registro y transmisión adecuada de información relativa a los cuidados.

Building a network Operations Center (NOC) solution

Esta dissertação contextualiza e descreve a actividade prática do quotidiano de um gestor de redes informáticas modernas. Define Network Operations Center (NOC) e a sua importância como provedor de serviços de Internet, e aborda a gestão de redes como alicerce teórico mediante a tomada de decisões que a tarefa de gestão coloca. É com base na complexidade da tarefa de gestão que surge a necessidade e o aparecimento consequente de Plataformas de Gestão. Estas plataformas não só auxiliam na tarefa para a qual foram desenvolvidas como substituem todo um conjunto de ferramentas tradicionais, limitadas para a realidade das infraestruturas de telecomunicações actuais. O estudo do NOC da NOS Madeira enfatiza a problemática que as infra-estruturas de média e grande dimensão comportam para os gestores de redes que lá operam. As limitações da plataforma de gestão em uso referentes à definição e organização de utilizadores, dispositivos e grupos respectivos, conjuntamente com a falta de parametrização em notificações justificam uma solução. Aqui, é feita uma análise e um levantamento de requisitos para a selecção da nova plataforma de gestão seguida da proposta de uma solução integrada para resolução do problema. Esta proposta envolve a definição de uma arquitectura, o desenho e a implementação de software próprios para um sistema particular ao qual designamos: ZenDash.

Building a network Operations Center (NOC) solution

Esta dissertação contextualiza e descreve a actividade prática do quotidiano de um gestor de redes informáticas modernas. Define Network Operations Center (NOC) e a sua importância como provedor de serviços de Internet, e aborda a gestão de redes como alicerce teórico mediante a tomada de decisões que a tarefa de gestão coloca. É com base na complexidade da tarefa de gestão que surge a necessidade e o aparecimento consequente de Plataformas de Gestão. Estas plataformas não só auxiliam na tarefa para a qual foram desenvolvidas como substituem todo um conjunto de ferramentas tradicionais, limitadas para a realidade das infraestruturas de telecomunicações actuais. O estudo do NOC da NOS Madeira enfatiza a problemática que as infra-estruturas de média e grande dimensão comportam para os gestores de redes que lá operam. As limitações da plataforma de gestão em uso referentes à definição e organização de utilizadores, dispositivos e grupos respectivos, conjuntamente com a falta de parametrização em notificações justificam uma solução. Aqui, é feita uma análise e um levantamento de requisitos para a selecção da nova plataforma de gestão seguida da proposta de uma solução integrada para resolução do problema. Esta proposta envolve a definição de uma arquitectura, o desenho e a implementação de software próprios para um sistema particular ao qual designamos: ZenDash.