A new multilevel converter configuration for high power and high quality applications

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

Multilevel converter structure and control

In recent years, multilevel converters are becoming more popular and attractive than traditional converters in high voltage and high power applications. Multilevel converters are particularly suitable for harmonic reduction in high power applications where semiconductor devices are not able to operate at high switching frequencies or in high voltage applications where multilevel converters reduce the need to connect devices in series to achieve high switch voltage ratings. This thesis investigated two aspects of multilevel converters: structure and control. The first part of this thesis focuses on inductance between a DC supply and inverter components in order to minimise loop inductance, which causes overvoltages and stored energy losses during switching. Three dimensional finite element simulations and experimental tests have been carried out for all sections to verify theoretical developments. The major contributions of this section of the thesis are as follows: The use of a large area thin conductor sheet with a rectangular cross section separated by dielectric sheets (planar busbar) instead of circular cross section wires, contributes to a reduction of the stray inductance. A number of approximate equations exist for calculating the inductance of a rectangular conductor but an assumption was made that the current density was uniform throughout the conductors. This assumption is not valid for an inverter with a point injection of current. A mathematical analysis of a planar bus bar has been performed at low and high frequencies and the inductance and the resistance values between the two points of the planar busbar have been determined. A new physical structure for a voltage source inverter with symmetrical planar bus bar structure called Reduced Layer Planar Bus bar, is proposed in this thesis based on the current point injection theory. This new type of planar busbar minimises the variation in stray inductance for different switching states. The reduced layer planar busbar is a new innovation in planar busbars for high power inverters with minimum separation between busbars, optimum stray inductance and improved thermal performances. This type of the planar busbar is suitable for high power inverters, where the voltage source is supported by several capacitors in parallel in order to provide a low ripple DC voltage during operation. A two layer planar busbar with different materials has been analysed theoretically in order to determine the resistance of bus bars during switching. Increasing the resistance of the planar busbar can gain a damping ratio between stray inductance and capacitance and affects the performance of current loop during switching. The aim of this section is to increase the resistance of the planar bus bar at high frequencies (during switching) and without significantly increasing the planar busbar resistance at low frequency (50 Hz) using the skin effect. This contribution shows a novel structure of busbar suitable for high power applications where high resistance is required at switching times. In multilevel converters there are different loop inductances between busbars and power switches associated with different switching states. The aim of this research is to consider all combinations of the switching states for each multilevel converter topology and identify the loop inductance for each switching state. Results show that the physical layout of the busbars is very important for minimisation of the loop inductance at each switch state. Novel symmetrical busbar structures are proposed for multilevel converters with diode-clamp and flying-capacitor topologies which minimise the worst case in stray inductance for different switching states. Overshoot voltages and thermal problems are considered for each topology to optimise the planar busbar structure. In the second part of the thesis, closed loop current techniques have been investigated for single and three phase multilevel converters. The aims of this section are to investigate and propose suitable current controllers such as hysteresis and predictive techniques for multilevel converters with low harmonic distortion and switching losses. This section of the thesis can be classified into three parts as follows: An optimum space vector modulation technique for a three-phase voltage source inverter based on a minimum-loss strategy is proposed. One of the degrees of freedom for optimisation of the space vector modulation is the selection of the zero vectors in the switching sequence. This new method improves switching transitions per cycle for a given level of distortion as the zero vector does not alternate between each sector. The harmonic spectrum and weighted total harmonic distortion for these strategies are compared and results show up to 7% weighted total harmonic distortion improvement over the previous minimum-loss strategy. The concept of SVM technique is a very convenient representation of a set of three-phase voltages or currents used for current control techniques. A new hysteresis current control technique for a single-phase multilevel converter with flying-capacitor topology is developed. This technique is based on magnitude and time errors to optimise the level change of converter output voltage. This method also considers how to improve unbalanced voltages of capacitors using voltage vectors in order to minimise switching losses. Logic controls require handling a large number of switches and a Programmable Logic Device (PLD) is a natural implementation for state transition description. The simulation and experimental results describe and verify the current control technique for the converter. A novel predictive current control technique is proposed for a three-phase multilevel converter, which controls the capacitors' voltage and load current with minimum current ripple and switching losses. The advantage of this contribution is that the technique can be applied to more voltage levels without significantly changing the control circuit. The three-phase five-level inverter with a pure inductive load has been implemented to track three-phase reference currents using analogue circuits and a programmable logic device.

A new unequal DC link voltage configuration for a single phase multilevel converter to reduce low order harmonics

Multilevel converters are used in high power and high voltage applications due to their attractive benefits in generating high quality output voltage. Increasing the number of voltage levels can lead to a reduction in lower order harmonics. Various modulation and control techniques are introduced for multilevel converters like Space Vector Modulation (SVM), Sinusoidal Pulse Width Modulation (SPWM) and Harmonic Elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this paper a new modulation technique based on harmonic elimination method is proposed for those multilevel converters that have unequal DC link voltages. This new technique has better effect on output voltage quality and less Total Harmonic Distortion (THD) than other modulation techniques. In order to verify the proposed modulation technique, MATLAB simulations are carried out for a single-phase diode-clamped inverter.

Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels

Multilevel converters, because of the benefits they attract in generating high quality output voltage, are used in several applications. Various modulation and control techniques are introduced by several researchers to control the output voltage of the multilevel converters like space vector modulation and harmonic elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this study a new HE technique based on the HE method is proposed for multilevel converters with unequal DC link voltage. The DC link voltage levels are considered as additional variables for the HE method and the voltage levels are defined based on the HE results. Increasing the number of voltage levels can reduce lower order harmonic content because of the fact that more variables are created. In comparison to previous methods, this new technique has a positive effect on the output voltage quality by reducing its total harmonic distortion, which must take into consideration for some applications such as uninterruptable power supply, motor drive systems and piezoelectric transducer excitation. In order to verify the proposed modulation technique, MATLAB simulations and experimental tests are carried out for a single-phase four-level diode-clamped converter.

Digitally-implemented naturally sampled PWM suitable for multilevel converter control

For dynamic closed loop control of a multilevel converter with a low pulse number (ratio of switching frequency to synthesized fundamental), natural sampled pulse-width modulation (PWM) is the best form of modulation. Natural sampling does not introduce distortion or a delayed response to the modulating signal. However previous natural sampled PWM implementations have generally been analog. For a modular multilevel converter, a digital implementation has advantages of accuracy and flexibility. Re-sampled uniform PWM is a novel digital modulation technique which approaches the performance of natural PWM. Both hardware and software implementations for a five level multilevel converter phase are presented, demonstrating the improvement over uniform PWM.

Cascaded multilevel converter based bidirectional inductive power transfer (BIPT) system

A typical low power IPT system employs an H-Bridge converter with a simple control strategy to generate a high frequency current from DC power supply. This paper proposes a cascaded multilevel converter for bidirectional IPT (BIPT) systems, which is suitable for low to medium power applications as well as for situations such as PV cells where several individual DC sources are to be utilized. A novel modulation strategy is proposed for the multilevel converter with the aim of minimizing switching losses. Series - Series (SS) compensation circuit is adopted for the IPT system and a mathematical model is presented to minimize the coil losses of the system under varying output power. Theoretical results presented in comparison to the simulations to demonstrate the applicability of the proposed concept and the validity of the developed model. The experimental results show the feasibility of the proposed phase shift modulation.

Switching period randomisation for multilevel converter modulation

The spectral energy associated with the carrier and sidebands of naturally sampled carrier based PWM can be spread by randomising the carrier (switch) half-period Tc = 1/2fc. So long as the switch duty cycle each period still correctly reflects the value of the modulating fundamental waveform as sampled during that switch period, then the fundamental component will remain undistorted. Natural sampling will ensure this occurs. Carrier based PWM can be extended to (m+1) level multilevel converter waveform generation by creating m triangular carriers, each with an equal 2*pi/m phase displacement. Alternatively the carrier disposition strategy calls for m amplitude displaced triangular carriers, each of amplitude 1/m and frequency mfc. Randomising these carrier sub-periods T0> = 1/2mfc is shown to generate (m+ 1) level PWM waveforms where the first (m-1) carrier groups are cancelled, while the remaining carrier and sidebands at multiples of mfc are spectrally spread. Numerous five level simulation and experimentally gathered randomised PWM waveforms are presented, showing the effects of the variation of the degree of randomisation, modulation depth and pulse number.

A multilevel converter structure for grid-connected PV plants

A new conversion structure for three-phase grid-connected photovoltaic (PV) generation plants is presented and discussed in this Thesis. The conversion scheme is based on two insulated PV arrays, each one feeding the dc bus of a standard 2-level three-phase voltage source inverter (VSI). Inverters are connected to the grid by a traditional three-phase transformer having open-end windings at inverters side and either star or delta connection at the grid side. The resulting conversion structure is able to perform as a multilevel VSI, equivalent to a 3-level inverter, doubling the power capability of a single VSI with given voltage and current ratings. Different modulation schemes able to generate proper multilevel voltage waveforms have been discussed and compared. They include known algorithms, some their developments, and new original approaches. The goal was to share the grid power with a given ratio between the two VSI within each cycle period of the PWM, being the PWM pattern suitable for the implementation in industrial DSPs. It has been shown that an extension of the modulation methods for standard two-level inverter can provide a elegant solution for dual two-level inverter. An original control method has been introduced to regulate the dc-link voltages of each VSI, according to the voltage reference given by a single MPPT controller. A particular MPPT algorithm has been successfully tested, based on the comparison of the operating points of the two PV arrays. The small deliberately introduced difference between two operating dc voltages leads towards the MPP in a fast and accurate manner. Either simulation or experimental tests, or even both, always accompanied theoretical developments. For the simulation, the Simulink tool of Matlab has been adopted, whereas the experiments have been carried out by a full-scale low-voltage prototype of the whole PV generation system. All the research work was done at the Lab of the Department of Electrical Engineering, University of Bologna.

New integrated multilevel converter for switched reluctance motor drives in plug-in hybrid electric vehicles with flexible energy conversion

This paper presents an integrated multilevel converter of switched reluctance motors (SRMs) fed by a modular front-end circuit for plug-in hybrid electric vehicle (PHEV) applications. Several operating modes can be achieved by changing the on-off states of the switches in the front-end circuit. In generator driving mode, the battery bank is employed to elevate the phase voltage for fast excitation and demagnetization. In battery driving mode, the converter is reconfigured as a four-level converter, and the capacitor is used as an additional charge capacitor to produce multilevel voltage outputs, which enhances the torque capability. The operating modes of the proposed drive are explained and the phase current and voltage are analyzed in details. The battery charging is naturally achieved by the demagnetization current in motoring mode and by the regenerative current in braking mode. Moreover, the battery can be charged by the external AC source or generator through the proposed converter when the vehicle is in standstill condition. The SRM-based PHEV can operate at different speeds by coordinating the power flow between the generator and battery. Simulation in MATLAB/Simulink and experiments on a three-phase 12/8 SRM confirm the effectiveness of the proposed converter topology.

A high frequency, low voltage stackable full bridge module for modular multilevel cascade converter (MMCC) research

A new small full bridge module for MMCC research is presented. Each full bridge converter cell is a single small (65 × 30 mm) multilayer PCB with two low voltage high current (22 V, 40 A) integrated half bridge ICs and the necessary isolated control signals and auxiliary power supply (2500 V isolation). All devices are surface mount, minimising cell height (4 mm) and parasitic inductance. Each converter cell can be physically stacked with PCB connectors propagating the control signals and inter-cell power connections. Many cells can be trivially stacked to create a large multilevel converter leg with isolated auxiliary power and control signals. Any of the MMCC family members is then easily formed. With a change in placement of stacking connector, a parallel connection of bridges is also possible. Operation of a nine level parallel full bridge is demonstrated at 12 V and 384 kHz switching frequency delivering a 30 W 2 kHz sinewave into a resistive load. A number of new applications for this novel module aside from MMCC development are listed.

Multilevel converters in renewable energy systems

In photovoltaic, fuel cells and storage batteries, the low output DC voltage should be boosted. Therefore, a step-up converter is necessary to boost the low DC voltage for the DC link voltage of the inverter. The main contribution of this chapter is to electrical energy conversion in renewable energy systems based on multilevel inverters. Different configuration of renewable energy systems based on power converters will be discussed in detail. Finally, a new single inductor Multi-Output Boost (MOB) converter is proposed, which is compatible with the diode-clamped configuration. Steady state and dynamic analyses have been carried out in order to show the validity of the proposed topology. Then the joint circuit of the proposed DC-DC converter with a three-level diode-clamped converter is presented in order to have a series regulated voltage at the DC link voltage of the diode-clamped inverter. MOB converter can boost the low input DC voltage of the renewable energy sources and at the same time adjust the voltage across each capacitor to the desired voltage levels, thereby solving the main problem associated with capacitor voltage imbalance in this type of multilevel converter.

Hybrid cascade converter topology with series connected symmetrical and asymmetrical diode-clamped H-Bridge cells

A novel H-bridge multilevel PWM converter topology based on a series connection of a high voltage (HV) diode-clamped inverter and a low voltage (LV) conventional inverter is proposed. A DC link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a fifteen-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low THD of voltage and current, which leads to the possible elimination of output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which nineteen levels can be synthesized in output voltage with the same number of components. To balance the DC link capacitor voltages for the maximum output voltage resolution as well as synthesise asymmetrical DC link combination, a new Multi-output Boost (MOB) converter is utilised at the DC link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high quality output voltage.

Hysteresis modulation of multilevel inverters

The hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide command-tracking bandwidth. Its application and beneftis for two-level converters are well understood, but the extension of this strategy to multilevel converters is still under development. This paper summarizes and reviews the various hysteresis modulation approaches available in the literature for multilevel converters. The pros and cons of various techniques are described and compared for tracking the reference signal in order to attain an adequate switching optimization, excellent dynamic responses and high accuracy in steady-state operation. By using the recently developed multilevel hysteresis modulation approaches the advantages of using several accessible dc potentials in a multilevel inverter has been fully exploited. All of these hysteresis modulation approaches are testing for tracking a current reference when applied to a fivelevel inveter. The relevant simulation and experimental result are also presented. This study will provide a useful framweork and point of reference for the future development of hysteresis modulation for multilevel converters.

Multi-converter topology evaluation for connection of low voltage DC sources

A design for a cascaded multilevel DC-DC converter is proposed. The applications of a multilevel converter and the design issues involved in changing from a single converter to multiple converters are discussed. Implementation of the multilevel system using multiple Cuk converters is suggested and explanations of design decisions are given. The merits of the proposed design are discussed.