928 resultados para Many-valued logic


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Lee M.H., Many-Valued Logic and Qualitative Modelling of Electrical Circuits, in Proc. QR?2000, 14th Int. Workshop on Qualitative Reasoning, Morelia, Mexico June 3rd - 7th 2000.

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In t-norm based systems many-valued logic, valuations of propositions form a non-countable set: interval [0,1]. In addition, we are given a set E of truth values p, subject to certain conditions, the valuation v is v=V(p), V reciprocal application of E on [0,1]. The general propositional algebra of t-norm based many-valued logic is then constructed from seven axioms. It contains classical logic (not many-valued) as a special case. It is first applied to the case where E=[0,1] and V is the identity. The result is a t-norm based many-valued logic in which contradiction can have a nonzero degree of truth but cannot be true; for this reason, this logic is called quasi-paraconsistent.

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This thesis studies the properties and usability of operators called t-norms, t-conorms, uninorms, as well as many valued implications and equivalences. Into these operators, weights and a generalized mean are embedded for aggregation, and they are used for comparison tasks and for this reason they are referred to as comparison measures. The thesis illustrates how these operators can be weighted with a differential evolution and aggregated with a generalized mean, and the kinds of measures of comparison that can be achieved from this procedure. New operators suitable for comparison measures are suggested. These operators are combination measures based on the use of t-norms and t-conorms, the generalized 3_-uninorm and pseudo equivalence measures based on S-type implications. The empirical part of this thesis demonstrates how these new comparison measures work in the field of classification, for example, in the classification of medical data. The second application area is from the field of sports medicine and it represents an expert system for defining an athlete's aerobic and anaerobic thresholds. The core of this thesis offers definitions for comparison measures and illustrates that there is no actual difference in the results achieved in comparison tasks, by the use of comparison measures based on distance, versus comparison measures based on many valued logical structures. The approach has been highly practical in this thesis and all usage of the measures has been validated mainly by practical testing. In general, many different types of operators suitable for comparison tasks have been presented in fuzzy logic literature and there has been little or no experimental work with these operators.

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A Hennessy-Milner property, relating modal equivalence and bisimulations, is defined for many-valued modal logics that combine a local semantics based on a complete MTL-chain (a linearly ordered commutative integral residuated lattice) with crisp Kripke frames. A necessary and sufficient algebraic condition is then provided for the class of image-finite models of these logics to admit the Hennessy-Milner property. Complete characterizations are obtained in the case of many-valued modal logics based on BL-chains (divisible MTL-chains) that are finite or have universe [0,1], including crisp Lukasiewicz, Gödel, and product modal logics.

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In this reviewing paper, we recall the main results of our papers [24, 31] where we introduced two paraconsistent semantics for Pavelka style fuzzy logic. Each logic formula a is associated with a 2 x 2 matrix called evidence matrix. The two semantics are consistent if they are seen from 'outside'; the structure of the set of the evidence matrices M is an MV-algebra and there is nothing paraconsistent there. However, seen from "inside,' that is, in the construction of a single evidence matrix paraconsistency comes in, truth and falsehood are not each others complements and there is also contradiction and lack of information (unknown) involved. Moreover, we discuss the possible applications of the two logics in real-world phenomena.

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This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

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Content Addressable Memory (CAM) is a special type of Complementary Metal-Oxide-Semiconductor (CMOS) storage element that allows for a parallel search operation on a memory stack in addition to the read and write operations yielded by a conventional SRAM storage array. In practice, it is often desirable to be able to store a “don’t care” state for faster searching operation. However, commercially available CAM chips are forced to accomplish this functionality by having to include two binary memory storage elements per CAM cell,which is a waste of precious area and power resources. This research presents a novel CAM circuit that achieves the “don’t care” functionality with a single ternary memory storage element. Using the recent development of multiple-voltage-threshold (MVT) CMOS transistors, the functionality of the proposed circuit is validated and characteristics for performance, power consumption, noise immunity, and silicon area are presented. This workpresents the following contributions to the field of CAM and ternary-valued logic:• We present a novel Simple Ternary Inverter (STI) transistor geometry scheme for achieving ternary-valued functionality in existing SOI-CMOS 0.18µm processes.• We present a novel Ternary Content Addressable Memory based on Three-Valued Logic (3CAM) as a single-storage-element CAM cell with “don’t care” functionality.• We explore the application of macro partitioning schemes to our proposed 3CAM array to observe the benefits and tradeoffs of architecture design in the context of power, delay, and area.

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Mode of access: Internet.

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Bibliography: p. 45-46.