Secure Design Flow for Asynchronous Multi-valued Logic Circuits
Data(s) |
01/05/2010
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Formato |
application/pdf |
Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Rafiev , A , Murphy , J & Yakovlev , A 2010 , ' Secure Design Flow for Asynchronous Multi-valued Logic Circuits ' Paper presented at 40th IEEE International Symposium on Multiple-Valued Logic , Spain , 01/05/2010 - 01/05/2010 , pp. 264-269 . DOI: 10.1109/ISMVL.2010.56 |
Tipo |
conferenceObject |