Determining carrier mobility with a metal–insulator–semiconductor structure

The electron and hole mobility of nickel-bis(dithiolene) (NiDT) are determined in a metal– insulator–semiconductor (MIS)structure using admittance spectroscopy. The relaxation times found in the admittance spectra are attributed to the diffusion time of carriers to reach the insulator interface and via Einstein’s relation this yields the mobility values. In this way, an electron mobility of 1:9 104 cm2=Vs and a hole mobility of 3:9 106 cm2=Vs were found. It is argued that the low mobility is caused by an amphoteric mid-gap trap level. The activation energy for electrons and holes from these traps is found to be 0.46 eV and 0.40 eV, respectively.

Characterization of vertical Mo/diamond Schottky barrier diode from non-ideal I-V and C-V measurements based on MIS model

In this study, we investigated non-ideal characteristics of a diamond Schottky barrier diode with Molybdenum (Mo) Schottky metal fabricated by Microwave Plasma Chemical Vapour Deposition (MPCVD) technique. Extraction from forward bias I-V and reverse bias C- 2-V measurements yields ideality factor of 1.3, Schottky barrier height of 1.872 eV, and on-resistance of 32.63 mö·cm2. The deviation of extracted Schottky barrier height from an ideal value of 2.24 eV (considering Mo workfunction of 4.53 eV) indicates Fermi level pinning at the interface. We attributed such non-ideal behavior to the existence of thin interfacial layer and interface states between metal and diamond which forms Metal-Interfacial layer-Semiconductor (MIS) structure. Oxygen surface treatment during fabrication process might have induced them. From forward bias C-V characteristics, the minimum thickness of the interfacial layer is approximately 0.248 nm. Energy distribution profile of the interface state density is then evaluated from the forward bias I-V characteristics based on the MIS model. The interface state density is found to be uniformly distributed with values around 1013 eV - 1·cm- 2. © 2013 Elsevier B.V.

Temperature dependent electrical characterisation of Pt/HfO2/n-GaN metal-insulator-semiconductor (MIS) Schottky diodes

This paper reports an improvement in Pt/n-GaN metal-semiconductor (MS) Schottky diode characteristics by the introduction of a layer of HfO2 (5 nm) between the metal and semiconductor interface. The resulting Pt/HfO2/n-GaN metal-insulator-semiconductor (MIS) Schottky diode showed an increase in rectification ratio from 35.9 to 98.9(@ 2V), increase in barrier height (0.52 eV to 0.63eV) and a reduction in ideality factor (2.1 to 1.3) as compared to the MS Schottky. Epitaxial n-type GaN films of thickness 300nm were grown using plasma assisted molecular beam epitaxy (PAMBE). The crystalline and optical qualities of the films were confirmed using high resolution X-ray diffraction and photoluminescence measurements. Metal-semiconductor (Pt/n-GaN) and metal-insulator-semiconductor (Pt/HfO2/n-GaN) Schottky diodes were fabricated. To gain further understanding of the Pt/HfO2/GaN interface, I-V characterisation was carried out on the MIS Schottky diode over a temperature range of 150 K to 370 K. The barrier height was found to increase (0.3 eV to 0.79 eV) and the ideality factor decreased (3.6 to 1.2) with increase in temperature from 150 K to 370 K. This temperature dependence was attributed to the inhomogeneous nature of the contact and the explanation was validated by fitting the experimental data into a Gaussian distribution of barrier heights. (C) 2015 Author(s).

EMI issues in high power and high level diode-clamped converters

Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. However, power switching components with fast switching combined with hard switched-converters produce high di/dt during turn off time and busbar stray inductance then becomes an important issue which creates overvoltage. It is necessary to keep the busbar stray inductance as low as possible to decrease overvoltage and Electromagnetic Interference (EMI) noise. In this paper, the effect of different transient current loops on busbar physical structure of the high-voltage high-level diode-clamped converters will be highlighted. Design considerations of proper planar busbar will also be presented to optimise the overall design of diode-clamped converters.

Asymmetrical DC link voltage configuration for a diode-clamped inverter

There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.

Multi-output DC-DC converters based on diode-clamped converters configuration : topology and control strategy

This paper presents a new DC-DC Multi-Output Boost (MOB) converter which can share its total output between different series of output voltages for low and high power applications. This configuration can be utilised instead of several single output power supplies. This is a compatible topology for a diode-clamed inverter in the grid connection systems, where boosting low rectified output-voltage and series DC link capacitors is required. To verify the proposed topology, steady state and dynamic analysis of a MOB converter are examined. A simple control strategy has been proposed to demonstrate the performance of the proposed topology for a double-output boost converter. The topology and its control strategy can easily be extended to offer multiple outputs. Simulation and experimental results are presented to show the validity of the control strategy for the proposed converter.

Hybrid cascade converter topology with series connected symmetrical and asymmetrical diode-clamped H-Bridge cells

A novel H-bridge multilevel PWM converter topology based on a series connection of a high voltage (HV) diode-clamped inverter and a low voltage (LV) conventional inverter is proposed. A DC link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a fifteen-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low THD of voltage and current, which leads to the possible elimination of output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which nineteen levels can be synthesized in output voltage with the same number of components. To balance the DC link capacitor voltages for the maximum output voltage resolution as well as synthesise asymmetrical DC link combination, a new Multi-output Boost (MOB) converter is utilised at the DC link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high quality output voltage.

A new family of multi-output DC-DC converter topologies to supply an asymmetrical four-level diode-clamped inverter

Purpose Multi-level diode-clamped inverters have the challenge of capacitor voltage balancing when the number of DC-link capacitors is three or more. On the other hand, asymmetrical DC-link voltage sources have been applied to increase the number of voltage levels without increasing the number of switches. The purpose of this paper is to show that an appropriate multi-output DC-DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC-link voltages advantages. Design/methodology/approach A family of multi-output DC-DC converters is presented in this paper. The application of these converters is to convert the output voltage of a photovoltaic (PV) panel to regulate DC-link voltages of an asymmetrical four-level diode-clamped inverter utilized for domestic applications. To verify the versatility of the presented topology, simulations have been directed for different situations and results are presented. Some related experiments have been developed to examine the capabilities of the proposed converters. Findings The three-output voltage-sharing converters presented in this paper have been mathematically analysed and proven to be appropriate to improve the quality of the residential application of PV by means of four-level asymmetrical diode-clamped inverter supplying highly resistive loads. Originality/value This paper shows that an appropriate multi-output DC-DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC-link voltages advantages and that there is a possibility of operation at high-modulation index despite reference voltage magnitude and power factor variations.

Flying-capacitor-based chopper circuit for DC capacitor voltage balancing in diode-clamped multilevel inverter

This paper proposes a flying-capacitor-based chopper circuit for dc capacitor voltage equalization in diode-clamped multilevel inverters. Its important features are reduced voltage stress across the chopper switches, possible reduction in the chopper switching frequency, improved reliability, and ride-through capability enhancement. This topology is analyzed using three- and four-level flying-capacitor-based chopper circuit configurations. These configurations are different in capacitor and semiconductor device count and correspondingly reduce the device voltage stresses by half and one-third, respectively. The detailed working principles and control schemes for these circuits are presented. It is shown that, by preferentially selecting the available chopper switch states, the dc-link capacitor voltages can be efficiently equalized in addition to having tightly regulated flying-capacitor voltages around their references. The various operating modes of the chopper are described along with their preferential selection logic to achieve the desired performances. The performance of the proposed chopper and corresponding control schemes are confirmed through both simulation and experimental investigations.

Reversed bias Pt/nanostructured ZnO Schottky diode with enhanced electric field for hydrogen sensing

In this paper, the effect of electric field enhancement on Pt/nanostructured ZnO Schottky diode based hydrogen sensors under reverse bias condition has been investigated. Current-voltage characteristics of these diodes have been studied at temperatures from 25 to 620 °C and their free carrier density concentration was estimated by exposing the sensors to hydrogen gas. The experimental results show a significantly lower breakdown voltage in reversed bias current-voltage characteristics than the conventional Schottky diodes and also greater lateral voltage shift in reverse bias operation than the forward bias. This can be ascribed to the increased localized electric fields emanating from the sharp edges and corners of the nanostructured morphologies. At 620 °C, voltage shifts of 114 and 325 mV for 0.06% and 1% hydrogen have been recorded from dynamic response under the reverse bias condition. © 2010 Elsevier B.V. All rights reserved.

Reverse biased Pt/nanostructured MoO3/SiC Schottky diode based hydrogen gas sensors

Pt/nanostructured molybdenum oxide (MoO3) /SiC Schottky diode based gas sensors were fabricated for hydrogen (H2) gas sensing. Due to the enhanced performance, which is ascribed to the application of MoO3 nanostructures, these devices were used in reversed bias. MoO3 characterization by scanning electron microscopy showed morphology of randomly orientated nanoplatelets with thicknesses between 50 and 500 nm. An α-Β mixed phase crystallographic structure of MoO3 was characterized by x-ray diffraction. At 180 °C, 1.343 V voltage shift in the reverse I-V curve and a Pt/ MoO3 barrier height change of 20 meV were obtained after exposure to 1% H2 gas in synthetic air. © 2009 American Institute of Physics.