A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

Low voltage four-quadrant current multiplier: An improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Low voltage four-quadrant current multiplier: an improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to (gm)-C filters

A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that considerably improves the stability of the processed-signal common,mode voltage over the tuning range, critical for very-low voltage applications, is introduced. It embeds a feedback loop that holds input devices on triode region while boosting the output resistance. Analysis of the integrator frequency response gives an insight into the location of secondary poles and zeros as function of design parameters. A third-order low-pass Cauer filter employing the proposed transconductor was designed and integrated on a 0.8-mum n-well CMOS standard process. For a 1.8-V supply, filter characterization revealed f(p) = 0.93 MHz, f(s) = 1.82 MHz, A(min) = 44.08, dB, and A(max) = 0.64 dB at nominal tuning. Mined by a de voltage V-TUNE, the filter bandwidth was linearly adjusted at a rate of 11.48 kHz/mV over nearly one frequency decade. A maximum 13-mV deviation on the common-mode voltage at the filter output was measured over the interval 25 mV less than or equal to V-TUNE less than or equal to 200 mV. For V-out = 300 mV(pp) and V-TUNE = 100 mV, THD was -55.4 dB. Noise spectral density was 0.84 muV/Hz(1/2) @1 kHz and S/N = 41 dB @ V-out = 300 mV(pp) and 1-MHz bandwidth. Idle power consumption was 1.73 mW @V-TUNE = 100 mV. A tradeoff between dynamic range, bandwidth, power consumption, and chip area has then been achieved.

On designing linearly-tunable ultra-low voltage CMOS gm-C filters

A linearly-tunable ULV transconductor featuring excellent stability of the processed signal common-mode voltage upon tuning, critical for very-low voltage applications, is presented. Its employment to the synthesis of CMOS gm-C high-frequency and voiceband filters is discussed. SPICE data describe the filter characteristics. For a 1.3 V-supply, their nominal passband frequencies are 1.0 MHz and 3.78 KHz, respectively, with tuning rates of 12.52 KHz/mV and 0.16 KHz/m V, input-referred noise spectral density of 1.3 μV/Hz1/2 and 5.0μV/Hz1/2 and standby consumption of 0.87 mW and 11.8 μW. Large-signal distortion given by THD = 1% corresponds to a differential output-swing of 360 mVpp and 480 mVpp, respectively. Common-mode voltage deviation is less than 4 mV over tuning interval.

Effect of seed addition on SnO2-based varistors for low voltage application

The effect of seed addition on the microstructure and non-ohmic properties of the SnO2 + 1%CoO + 0.05%Nb2O5 ceramic-based system was analyzed. Two classes of seeds were prepared: 99% SnO2 + 1%CuO and 99% SnO2 + 1%CoO (mol%); both classes were added to the ceramic-based system in the amount of 1%, 5%, and 10%. The two systems containing 1% of seeds resulted in a larger grain size and a lower breakdown voltage. The addition of 1% copper seeds produces a breakdown voltage (V b) of ∼ 37 V and a leakage current (fic) of 29 μA. On the other hand, the addition of 1% cobalt seeds produced a breakdown voltage of 57 V and a leakage current of 70 μA. Both systems are of great technological interest for low voltage varistor applications, by means of appropriate strategies to reduce the leakage current. Using larger amounts of seeds was not effective since the values of breakdown voltage in both cases are close to a system without seeds. To our knowledge, there are no reports in the literature regarding the use of seeds in the SnO2 system for low voltage applications. A potential barrier model which illustrates the formation of oxygen species (O′2(ads), O′ads, and O″ads) at the expense of clusters near the interface between grains is proposed. © 2012 The American Ceramic Society.

Performance and scalability of isolated DC-DC converter topologies in low voltage, high current applications

Fuel cells are a promising alternative for clean and efficient energy production. A fuel cell is probably the most demanding of all distributed generation power sources. It resembles a solar cell in many ways, but sets strict limits to current ripple, common mode voltages and load variations. The typically low output voltage from the fuel cell stack needs to be boosted to a higher voltage level for grid interfacing. Due to the high electrical efficiency of the fuel cell, there is a need for high efficiency power converters, and in the case of low voltage, high current and galvanic isolation, the implementation of such converters is not a trivial task. This thesis presents galvanically isolated DC-DC converter topologies that have favorable characteristics for fuel cell usage and reviews the topologies from the viewpoint of electrical efficiency and cost efficiency. The focus is on evaluating the design issues when considering a single converter module having large current stresses. The dominating loss mechanism in low voltage, high current applications is conduction losses. In the case of MOSFETs, the conduction losses can be efficiently reduced by paralleling, but in the case of diodes, the effectiveness of paralleling depends strongly on the semiconductor material, diode parameters and output configuration. The transformer winding losses can be a major source of losses if the windings are not optimized according to the topology and the operating conditions. Transformer prototyping can be expensive and time consuming, and thus it is preferable to utilize various calculation methods during the design process in order to evaluate the performance of the transformer. This thesis reviews calculation methods for solid wire, litz wire and copper foil winding losses, and in order to evaluate the applicability of the methods, the calculations are compared against measurements and FEM simulations. By selecting a proper calculation method for each winding type, the winding losses can be predicted quite accurately before actually constructing the transformer. The transformer leakage inductance, the amount of which can also be calculated with reasonable accuracy, has a significant impact on the semiconductor switching losses. Therefore, the leakage inductance effects should also be taken into account when considering the overall efficiency of the converter. It is demonstrated in this thesis that although there are some distinctive differences in the loss distributions between the converter topologies, the differences in the overall efficiency can remain within a range of a few percentage points. However, the optimization effort required in order to achieve the high efficiencies is quite different in each topology. In the presence of practical constraints such as manufacturing complexity or cost, the question of topology selection can become crucial.

A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications

A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.

A Gm-C bump equalizer for low-voltage low-power applications

A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

Aging assessment of polyethylene-based insulated low-voltage cables for nuclear applications

This thesis aims at investigating the evolution of physico-chemical and electrical properties relevant to low-voltage power cables for nuclear application when subjected to typical nuclear power plant (NPP) environments i.e., to gamma radiation and high temperature. This research is part of the European Project Horizon 2020 TeaM Cables, which aims at providing a novel methodology for efficient and reliable NPP cable aging management to NPP operators. The analyzed samples consist of both coaxial and twisted pair cables with different polymeric compounds used as primary insulation. Insulating materials are based on the same silane cross-linked polyethylene matrix with different additives and fillers. In order to characterize the material response to the environmental stresses, various experimental techniques have been used. These characterizations range from the microscale chemical response e.g. by FTIR, OIT and DSC, to the macroscale electrical and mechanical behavior. A significant part of this Thesis is given to the correlation of the response to aging among the different measured properties. It has been shown that it could be possible to connect both the chemical and mechanical properties of the investigated XLPE cables with the electrical ones. In particular, the high-frequency dielectric response allows an effective monitoring of both the early periods of aging, controlled by the antioxidant consumption kinetics, and then the subsequent oxidation of the polymer matrix. Therefore, dielectric spectroscopy showed to be capable of assessing the LV cable aging state and, it might be used as an aging marker for cable diagnostic. The last part of the manuscript focuses on the building of a predictive modelling approach of LV cable conditions subjected to radio-chemical aging. It resulted into obtaining a lifetime curve which relates the aging factor to which the cable is subjected to, namely the dose rate, with the limit value of the considered electrical property (tanδ).

Comparison between DC(+) and Square Wave AC SAW Current Outputs to Weld AISI 304 for Low-Temperature Applications

Welded equipment for cryogenic applications is utilized in chemical, petrochemical, and metallurgical industries. One material suitable for cryogenic application is austenitic stainless steel, which usually doesn`t present ductile/brittle transition temperature, except in the weld metal, where the presence of ferrite and micro inclusions can promote a brittle failure, either by ferrite cleavage or dimple nucleation and growth, respectively. A 25-mm- (1-in.-) thick AISI 304 stainless steel base metal was welded with the SAW process using a 308L solid wire and two kinds of fluxes and constant voltage power sources with two types of electrical outputs: direct current electrode positive and balanced square wave alternating current. The welded joints were analyzed by chemical composition, microstructure characterization, room temperature mechanical properties, and CVN impact test at -100 degrees C (-73 degrees F). Results showed that an increase of chromium and nickel content was observed in all weld beads compared to base metal. The chromium and nickel equivalents ratio for the weld beads were always higher for welding with square wave AC for the two types of fluxes than for direct current. The modification in the Cr(eq)/Ni(eq) ratio changes the delta ferrite morphology and, consequently, modifies the weld bead toughness at lower temperatures. The oxygen content can also affect the toughness in the weld bead. The highest absorbed energy in a CVN impact test was obtained for the welding condition with square wave AC electrical output and neutral flux, followed by DC(+) electrical output and neutral flux, and square wave AC electrical output and alloyed flux.

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation

IEEE International Symposium on Circuits and Systems, MAY 25-28, 2003, Bangkok, Thailand. (ISI Web of Science)

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Fractional slot permanent magnet synchronous motors for low speed applications

This study compares different rotor structures of permanent magnet motors with fractional slot windings. The surface mounted magnet and the embedded magnet rotor structures are studied. This thesis analyses the characteristics of a concentrated two-layer winding, each coil of which is wound around one tooth and which has a number of slots per pole and per phase less than one (q < 1). Compared to the integer slot winding, the fractional winding (q < 1) has shorter end windings and this, thereby, makes space as well as manufacturing cost saving possible. Several possible ways of winding a fractional slot machine with slots per pole and per phase lessthan one are examined. The winding factor and the winding harmonic components are calculated. The benefits attainable from a machine with concentrated windingsare considered. Rotor structures with surface magnets, radially embedded magnets and embedded magnets in V-position are discussed. The finite element method isused to solve the main values of the motors. The waveform of the induced electro motive force, the no-load and rated load torque ripple as well as the dynamic behavior of the current driven and voltage driven motor are solved. The results obtained from different finite element analyses are given. A simple analytic method to calculate fractional slot machines is introduced and the values are compared to the values obtained with the finite element analysis. Several different fractional slot machines are first designed by using the simple analytical methodand then computed by using the finite element method. All the motors are of thesame 225-frame size, and have an approximately same amount of magnet material, a same rated torque demand and a 400 - 420 rpm speed. An analysis of the computation results gives new information on the character of fractional slot machines.A fractional slot prototype machine with number 0.4 for the slots per pole and per phase, 45 kW output power and 420 rpm speed is constructed to verify the calculations. The measurement and the finite element method results are found to beequal.