Single-phase high power-factor boost ZCS pre-regulator operating in critical conduction mode

This paper presents a new single-phase interleaved high power factor boost pre-regulator operating in critical conduction mode, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode, when operating in the continuous conduction mode. The interleaving technique is applied in the power cell, providing a significant input current ripple reduction in comparison to discontinuous mode of operation, due to its input current continuous conduction operation. This paper presents a complete modeling for the converter operating in critical conduction mode, resulting in an improved design procedure for interleaved techniques with high input power factor, a complete design procedure, and main simulation results from a design example with two interleaved cells rated at 1kW, 400V output voltage and 220V rms input voltage.

A 2kW interleaved ZCS-FM boost rectifier digitally controlled by FPGA device

This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

A multi-cell variable frequency interleaved ZCS boost rectifier digitally controlled by FPGA

This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

Modeling of pre-regulator boost ZCS interleaved operating in critical conduction mode and with high power factor

This paper presents a new pre-regulator boost operating in the boundary area between the continuous and discontinuous conduction modes of the boost inductor current, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode when operating in the continuous conduction mode. Additionally, the interleaving technique is applied in the power cell, providing a significant input current ripple reduction. It should be noticed that the main objective of this paper is to present a complete modeling for the converter operating in the critical conduction mode, allowing an improved design procedure for interleaved techniques with high input power factor, a complete dynamic analysis of the structure, and the possibility of implementing digital control techniques in closed loop.

Bridgeless interleaved boost PFC converter with variable duty cycle control

This paper proposes a bridgeless boost interleaved PFC (power factor correction) converter with variable duty cycle control. The application of bridgeless technique causes reduction of conduction losses, while the interleaving technique of converters cells allows division of efforts in semiconductor devices and reduction of weight and volume of the input EMI filter. The use of variable duty cycle control has the functions of regulating the output voltage and eliminating the low order harmonic components that appears in the input current of the common interleaved power factor converters working in Discontinuous Conduction Mode (DCM). The simulation results of the proposed converter presented high power factor and a good transient response in relation to the output voltage regulation in presence of high load variations and supply voltage variations. © 2011 IEEE.

Experimental evaluation of the bridgeless interleaved boost PFC converter

This paper presents theoretical evaluation and experimental results to the proposed bridgeless interleaved boost PFC (power factor correction) converter. The application of bridgeless technique causes reduction of conduction losses, while the interleaving technique of the converter cells allows division of the current stress in semiconductor devices and reduction of weight and volume of the input EMI filter. In each cell of the converter, the inductor current operates in discontinuous conduction mode (DCM), which eliminates turn-on switching losses and the effects of reverse recovery in semiconductors, increasing the efficiency of the converter. The experimental results show the power factor of 0.96 for employed voltage ratio and an efficiency of 95.2 % for nominal load conditions. © 2012 IEEE.

Pré-regulador retificador entrelaçado (Interleaved) ZCS-FM boost, com controle digital através de dispositivo FPGA e linguagem VHDL

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)