A BASIC language interpreter for the Intel 8008 microprocessor /

Mode of access: Internet.

The Monitor Command System user's manual /

Mode of access: Internet.

Arquitectures x86 i x87

Estudi teòric-històric de la família de processadors x86 i dels coprocessadors matemàtics x87 als anys 80 i 90.

Microprocessor systems: an introduction

The aim of this book is to provide and introduction to microprocessor systems, their operation and design. It covers those topics needed by engineers and computer scientists who are interested in applying microprocessors in practical situations, namely computer hardware including logic and interfacing, software, in particular high level and assembly language programming, and the design and testing of such systems. The fundamental principles of micrprocessor systems are described and these are illustrated with reference to two microprocessors, the 32-bit MC68020 from Motorola and a single chip microcomputer, the 8051 from Intel; and in addition, interfacing to the general purpose STE bus is described. The details of the processors and the bus are concentrated in three chapters, thus allowing the presentation of the material to be independent of the microprocessors if that is desired, and permitting the specific details to be found easily.

Towards an algorithmic skeleton framework for programming the Intel R Xeon PhiTM processor

The Intel R Xeon PhiTM is the first processor based on Intel’s MIC (Many Integrated Cores) architecture. It is a co-processor specially tailored for data-parallel computations, whose basic architectural design is similar to the ones of GPUs (Graphics Processing Units), leveraging the use of many integrated low computational cores to perform parallel computations. The main novelty of the MIC architecture, relatively to GPUs, is its compatibility with the Intel x86 architecture. This enables the use of many of the tools commonly available for the parallel programming of x86-based architectures, which may lead to a smaller learning curve. However, programming the Xeon Phi still entails aspects intrinsic to accelerator-based computing, in general, and to the MIC architecture, in particular. In this thesis we advocate the use of algorithmic skeletons for programming the Xeon Phi. Algorithmic skeletons abstract the complexity inherent to parallel programming, hiding details such as resource management, parallel decomposition, inter-execution flow communication, thus removing these concerns from the programmer’s mind. In this context, the goal of the thesis is to lay the foundations for the development of a simple but powerful and efficient skeleton framework for the programming of the Xeon Phi processor. For this purpose we build upon Marrow, an existing framework for the orchestration of OpenCLTM computations in multi-GPU and CPU environments. We extend Marrow to execute both OpenCL and C++ parallel computations on the Xeon Phi. We evaluate the newly developed framework, several well-known benchmarks, like Saxpy and N-Body, will be used to compare, not only its performance to the existing framework when executing on the co-processor, but also to assess the performance on the Xeon Phi versus a multi-GPU environment.

Development of a microprocessor controlled energy harvester using a Peltier element

Nowadays it is necessary to research other types of energy alternatives and find the way to supply and save the energy we waste. The aim of the project consist of programming a microprocessor to measure if an oven radiates heat to the exterior, for the measure It is used a Peltier element that generates a voltage depending of the temperature difference between the oven and the air of the place where the oven is situated; The energy generated by the oven will be recollected in a condensor. A sensor will be used to know the exact measure. The second part of the project the main propose, is the development of a harvester. The microprocessor will use the voltage produced by the Peltier element to supply the electricity that it needs to work. A low power circuit and the appropriate software are needed to save the voltage generated.

Aplicació Web SONIN (Sistema Orientatiu Intel ligent)

L¿objectiu és un obtenir una aplicació per al control i homologació de les dades introduïdes pels usuaris en el e-CAP/SIAP (aplicacions informàtiques que gestionen l'activitat sanitària de la primària a Barcelona).Així que desenvoluparem una aplicació web amb eines de programació de Microsoft per facilitar la tasca principalment del personal auxiliar administratiu dels a l'hora de decidir el contingut de determinats valors a introduir en el e-CAP/SIAP.

Ús del Capital Social i la Intel.ligència Competitiva per part de les Universitats en el procés d"adaptació a l"EEES

En la present comunicació s'exposen els resultats del projecte ¿Análisis de los procedimientos de interacción entorno-universidad en el proceso de adaptación e implementación de titulaciones oficiales al EEES" finançat pel Ministerio de Ciencia e Innovación, en la convocatòria d'Estudios y Anàlisis, 2008. Un dels objectius d'aquest projecte era conèixer, de forma exploratòria, quines eines havien emprat lesUniversitats per tal d'adaptar les seves titulacions al nou EEES, considerant diversosfactors. Entre aquests, l'ús del Capital Social del qual disposen les Universitats, entès tant de d¿una òptica interna com externa. A la vegada, es pretenia analitzar si la Universitat disposa de veritables eines d'Intel·ligència Competitiva per tal d'interpretar adequadament el seu entorn. D'entre diverses conclusions, s'extreu que les Universitats no aprofiten suficientment els contactes que generen amb el seu entorn per tal de potenciar la seva competitivitat i les noves titulacions adaptades a l'EEES.

Development of a microprocessor controlled energy harvester using a Peltier element

Nowadays it is necessary to research other types of energy alternatives and find the way to supply and save the energy we waste. The aim of the project consist of programming a microprocessor to measure if an oven radiates heat to the exterior, for the measure It is used a Peltier element that generates a voltage depending of the temperature difference between the oven and the air of the place where the oven is situated; The energy generated by the oven will be recollected in a condensor. A sensor will be used to know the exact measure. The second part of the project the main propose, is the development of a harvester. The microprocessor will use the voltage produced by the Peltier element to supply the electricity that it needs to work. A low power circuit and the appropriate software are needed to save the voltage generated.

Patentointiaktiivisuuden muutos x86-prosessorivalmistajien keskuudessa vuosina 1985-2009 Case: Intel

Työssä tutkitaan x86-prosessorivalmistajien patentointiaktiivisuuden muutosta vuosina 1985 – 2009 Intelin kautta. Työn tavoitteena on selvittää syitä, jotka ovat johtaneet patentointiaktiivisuuden radikaaliin muutokseen toimialalla. Työssä esitellään patenttien tärkeys teknologiayrityksille ja miten patentointiaktiivisuus on muuttunut x86-prosessorivalmistajien keskuudessa. Työssä käsitellään patenttiteoriaa, esimerkiksi patenttijärjestelmää ja yrityksen patenttipolitiikkaa. Työssä käsitellään ei-valmistavia patenttitaloja ja luodaan katsaus niiden vaikutuksiin valmistaville yrityksille. Tämän jälkeen perehdytään yksityiskohtaisemmin teknologiajätti Inteliin. Työn tarkoitus on selvittää, onko toimialan patentointiaktiivisuus hidastumassa tai pysähtynyt. Työssä pyritään löytämään mahdollisia syitä Intelin patentointiaktiivisuuden muutokseen.

Some Studies and New Results on Multi Microprocessor Applications

One of the fastest expanding areas of computer exploitation is in embedded systems, whose prime function is not that of computing, but which nevertheless require information processing in order to carry out their prime function. Advances in hardware technology have made multi microprocessor systems a viable alternative to uniprocessor systems in many embedded application areas. This thesis reports the results of investigations carried out on multi microprocessors oriented towards embedded applications, with a view to enhancing throughput and reliability. An ideal controller for multiprocessor operation is developed which would smoothen sharing of routines and enable more powerful and efficient code I data interchange. Results of performance evaluation are appended.A typical application scenario is presented, which calls for classifying tasks based on characteristic features that were identified. The different classes are introduced along with a partitioned storage scheme. Theoretical analysis is also given. A review of schemes available for reducing disc access time is carried out and a new scheme presented. This is found to speed up data base transactions in embedded systems. The significance of software maintenance and adaptation in such applications is highlighted. A novel scheme of prov1d1ng a maintenance folio to system firmware is presented, alongwith experimental results. Processing reliability can be enhanced if facility exists to check if a particular instruction in a stream is appropriate. Likelihood of occurrence of a particular instruction would be more prudent if number of instructions in the set is less. A new organisation is derived to form the basement for further work. Some early results that would help steer the course of the work are presented.

Cervell, intel.ligències i dissenys d'ensenyament-aprenentatge. 'Cerebro, inteligencias y diseños de enseñanza-aprendizaje'

Se expone la diversidad de estilos cognitivos y de estilos de aprendizaje producto de los factores dominantes del funcionamiento del cerebro. El repaso, breve pero conciso, hace un recorrido por las partes del cerebro más desarrolladas en cuanto al aprendizaje se refiere. También proporciona pautas y metodologías de actuación en el aula para mejorar la enseñanza en el día a día, partiendo de una motivación y una emoción que los maestros deben transmitir a sus alumnos para obtener buenos resultados, tanto cognitivos como del propio desarrollo personal .

Avaluació de la intel.ligència a partir de tests de relacions lògiques. 'Evaluación de la inteligencia a partir de tests de relaciones lógicas'.

Crear dos tests de inteligencia basados en relaciones lógicas y evaluar su aplicación.. 60 niños de edades entre 13-14 años de escuelas públicas.. Realiza un análisis histórico y evolutivo del concepto inteligencia y conceptos relacionados (modelos, estructuras jerarquicas, procesos intelecturales, conducta, metacognición, estrategias de aprendizaje). Elabora dos test de inteligencia: el TRL-LI (test de relaciones lógicas con letras) y el TRL-F (test de relaciones lógicas con figuras). Depura estos dos instrumentos y realiza un estudio práctico donde se contrastan los dos tests. Factores analizados: razonamiento abstracto general, razonamiento abstracto a partir del AMPE, relaciones lógicas entre conjuntos y relaciones lógicas en complemento de estructuras complejas no verbales.. Test ad-hoc, RAVEN D-48, DAT-AR, PMA-R1, PMA-R3, AMPE-R1, AMPE-R3 . Medias, desviaciones standars, varianza, índice de Cronbach, cargas factoriales (rotación varimax). . Presenta una tabla resumen de los resultados en cargas factoriales (rotación varimax) y varianza justificada en tantos por ciento de la aplicación de cada test que se correponde al análisis de lso cuatro factores analizados. . El factor de razonamiento abstracto general se puede identificar mediante los test DOMINO D-48, DAT-AR, PMA-R1 y PMA-R3. Relaciones lógicas entre conjuntos es un factor que se puede identificar mediante los tests: TRS-L1 y el TRL-F. El TRL-L1 mide las relaciones lógicas a partir de símbolos verbales y letras. El TRL-F mide las relaciones lógicas a partir de figuras..

Per un consum racional i una utilitzaci?? intel??ligent de les pantalles

Resumen basado en el de la publicaci??n