Generalization of Wye and Delta auto-connections: Analysis of voltages and currents

Multipulse rectifier topologies based on autoconnections, or differential connections, are more and more applied as interface stages between the mains and power converters. These topologies mitigate many low-order current harmonics in the utility, reducing the THD (total harmonic distortion) and increasing the power factor. This paper presents a mathematical model based on phasor diagrams, that results in a single expression able to unify all differential topologies connections (Delta and Wye), for both step-up or step-down autotransformers, for 12 and 18-pulse AC-DC converters. The proposed family of converters can be designed for any relationship between the input voltage and the load voltage. An immediate application would be the retrofit, i.e. to replace a conventional rectifier with poor quality of the processed energy by the 12 or 18 pulses rectifier with Wye or Delta-differential connection. The design procedure, simple and fast, is developed and tested for a prototype rating 6 kW and 250 V on the DC load © 2010 IEEE.

A Short Note on Transverse Vibrations of a Shaft Carrying Two (or One) Disk Excited by a Nonideal Motor

The paper presents a number of numerical simulations of the transverse vibrations of two (or one) imbalanced rotors forced by an electric motor with limited power supply, during the passage through of the two resonance zones (increasing and decreasing input voltages). The predominant presence of the Sommerfeld effect. when the rotational velocity of the motor is captured, in the second resonance frequency is demonstrated. We have shown that the hysteretic jump phenomenon exists in a rotor system with two (or one) disks, and with this, we have shown that a torque is influenced by the dynamical behavior of die rotor [DOI: 10.1115/1.3007979]

A Short Note on Transverse Vibrations of a Shaft Carrying Two (or One) Disk Excited by a Nonideal Motor

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Resonant (P+RES) controller applied to voltage source inverter with minimum DC link capacitor

Voltage source inverters use large electrolytic capacitors in order to decouple the energy between the utility and the load, keeping the DC link voltage constant. Decreasing the capacitance reduces the distortion in the inverter input current but this also affects the load with low-order harmonics and generate disturbances at the input voltage. This paper applies the P+RES controller to solve the challenge of regulating the output current by means of controlling the magnitude of the current space vector, keeping it constant thus rejecting harmonic disturbances that would otherwise propagate to the load. This work presents a discussion of the switching and control strategy. © 2011 IEEE.

A single-phase single-stage buck-boost inverter intended for low power alternative energy conversion systems: Analysis, design and experimentation

This paper presents the operational analysis of the single-phase integrated buck-boost inverter. This topology is able to convert the DC input voltage into AC voltage with a high static gain, low harmonic content and acceptable efficiency, all in one single-stage. Main functionality aspects are explained, design procedure, system modeling and control, and also component requirements are detailed. Main simulation results are included, and two prototypes were implemented and experimentally tested, where its results are compared with those corresponding to similar topologies available in literature. © 2012 IEEE.

Digital Control Implementation to Reduce the Cost and Improve the Performance of the Control Stage of an Industrial Switched-Mode Power Supply

The main objective of this work is the design and implementation of the digital control stage of a 280W AC/DC industrial power supply in a single low-cost microcontroller to replace the analog control stage. The switch-mode power supply (SMPS) consists of a PFC boost converter with fixed frequency operation and a variable frequency LLC series resonant DC/DC converter. Input voltage range is 85VRMS-550VRMS and the output voltage range is 24V-28V. A digital controller is especially suitable for this kind of SMPS to implement its multiple functionalities and to keep the efficiency and the performance high over the wide range of input voltages. Additional advantages of the digital control are reliability and size. The optimized design and implementation of the digital control stage it is presented. Experimental results show the stable operation of the controlled system and an estimation of the cost reduction achieved with the digital control stage.

Regulador linear de tensão em tecnologia HV-CMOS

Atualmente, assiste-se na nossa sociedade a um recurso e uso massivo de equipamentos eletrónicos portáteis. Este facto, aliado à competitividade de mercado, exigiu o desenvolvimento desses equipamentos com o intuito de melhorar a sua gestão de potência e, obter, consequentemente, maior autonomia e rendimento. Assim, na gestão de potência de um SoC são os reguladores de tensão que assumem um papel de extrema importância. O trabalho realizado ao longo da presente dissertação pressupõe o projeto de um regulador linear de tensão do tipo LDO em tecnologia HV-CMOS, capaz de suportar tensões de entrada de 12V com vista à alimentação de blocos funcionais RF-CMOS com 3,3V e uma corrente de 100mA. Foi implementado através do processo CMOS de 0.35μm de 50V da Austria Micro Systems. A corrente de quiescente do regulador linear de tensão que determina a eficiência de corrente é de 120,22μA. Possui uma eficiência de corrente de 99,88% e um rendimento de 82,46% quando a tensão mínima de entrada é utilizada. O regulador linear de tensão possui uma tensão de dropout de 707mV. A estabilidade do sistema é mantida mesmo com transições de carga de 10μA para 100mA. O regulador possui um tempo de estabelecimento inferior a 2,4μs e uma variação da tensão de saída relativamente ao seu valor nominal inferior a 18mV, ambos para o pior caso. Porém, este regulador possui um undershoot e um overshoot de +- 1,85V.

A high-power-factor, three-phase isolated AC-DC converter using high-frequency current injection

A single-stage, three-phase AC-to-DC converter topology is proposed for high-frequency power supply applications. The principal features of the circuit include continuous current operation of the three AC input inductors, inherent shaping of the input currents, resulting in high power factor, a transformer isolated output, and only two active devices are required, both soft-switched. Resonant conversion techniques are used, and a high power factor is achieved by injecting high-frequency currents into the three-phase rectifier, producing a high frequency modulation of the rectifier input voltages. The current injection principle is explained and the system operation is confirmed by a combination of simulation and experimental results.

Robust STATCOM control for the stabilisation of fixed-speed wind turbines during low voltages

This paper presents a robust voltage control scheme for fixed-speed wind generators using a static synchronous compensator (STATCOM) controller. To enable a linear and robust control framework with structured uncertainty, the overall system is represented by a linear part plus a nonlinear part that covers an operating range of interest required to ensure stability during severe low voltages. The proposed methodology is flexible and readily applicable to larger wind farms of different configurations. The performance of the control strategy is demonstrated on a two area test system. Large disturbance simulations demonstrate that the proposed controller enhances voltage stability as well as transient stability of induction generators during low voltage ride through (LVRT) transients and thus enhances the LVRT capability. (C) 2011 Elsevier Ltd. All rights reserved.

Integrating structural and input design of a 2-DOF high-speed parallel manipulator: A flexible model-based approach

This paper discusses the integrated design of parallel manipulators, which exhibit varying dynamics. This characteristic affects the machine stability and performance. The design methodology consists of four main steps: (i) the system modeling using flexible multibody technique, (ii) the synthesis of reduced-order models suitable for control design, (iii) the systematic flexible model-based input signal design, and (iv) the evaluation of some possible machine designs. The novelty in this methodology is to take structural flexibilities into consideration during the input signal design; therefore, enhancing the standard design process which mainly considers rigid bodies dynamics. The potential of the proposed strategy is exploited for the design evaluation of a two degree-of-freedom high-speed parallel manipulator. The results are experimentally validated. (C) 2010 Elsevier Ltd. All rights reserved.

Extended Fault-Location Formulation for Power Distribution Systems

In this paper, an extended impedance-based fault-location formulation for generalized distribution systems is presented. The majority of distribution feeders are characterized by having several laterals, nonsymmetrical lines, highly unbalanced operation, and time-varying loads. These characteristics compromise traditional fault-location methods performance. The proposed method uses only local voltages and currents as input data. The current load profile is obtained through these measurements. The formulation considers load variation effects and different fault types. Results are obtained from numerical simulations by using a real distribution system from the Electrical Energy Distribution State Company of Rio Grande do Sul (CEEE-D), Southern Brazil. Comparative results show the technique robustness with respect to fault type and traditional fault-location problems, such as fault distance, resistance, inception angle, and load variation. The formulation was implemented as embedded software and is currently used at CEEE-D`s distribution operation center.

A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling

Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (IP) core integration into complex system-on-chip (SOC) architectures. These cores require thorough verification of their functionality to avoid erroneous behavior in the final device. Formal verification methods are capable of detecting any design bug. However, due to state explosion, their use remains limited to small circuits. Alternatively, simulation-based verification can explore hardware descriptions of any size, although the corresponding stimulus generation, as well as functional coverage definition, must be carefully planned to guarantee its efficacy. In general, static input space optimization methodologies have shown better efficiency and results than, for instance, Coverage Directed Verification (CDV) techniques, although they act on different facets of the monitored system and are not exclusive. This work presents a constrained-random simulation-based functional verification methodology where, on the basis of the Parameter Domains (PD) formalism, irrelevant and invalid test case scenarios are removed from the input space. To this purpose, a tool to automatically generate PD-based stimuli sources was developed. Additionally, we have developed a second tool to generate functional coverage models that fit exactly to the PD-based input space. Both the input stimuli and coverage model enhancements, resulted in a notable testbench efficiency increase, if compared to testbenches with traditional stimulation and coverage scenarios: 22% simulation time reduction when generating stimuli with our PD-based stimuli sources (still with a conventional coverage model), and 56% simulation time reduction when combining our stimuli sources with their corresponding, automatically generated, coverage models.

Open-circuit voltages: Theoretical and experimental optimizations of rear passivated silicon solar cells using Fz and Cz wafers

The theoretical and experimental open-circuit voltage optimizations of a simple fabrication process of silicon solar cells n(+)p with rear passivation are presented. The theoretical results were obtained by using an in-house developed program, including the light trapping effect and metal-grid optimization. On the other hand, the experimental steps were monitored by the photoconductive decay technique. The starting materials presented thickness of about 300 pm and resistivities: FZ (0.5 Omega cm), Cz-type 1 (2.5 Omega cm) and Cz-type 2 (3.3 Omega cm). The Gaussian profile emitters were optimized with sheet resistance between 55 Omega/sq and 100 Omega/sq, and approximately 2.0 mu m thickness in accordance to the theoretical results. Excellent implied open-circuit voltages of 670.8 mV, 652.5 mV and 662.6 mV, for FZ, Cz-type 1 and Cz-type 2 silicon wafers, respectively, could be associated to the measured lifetimes that represents solar cell efficiency up to 20% if a low cost anti-reflection coating system, composed by random pyramids and SiO(2) layer, is considered even for typical Cz silicon. (C) 2009 Elsevier Ltd. All rights reserved.

Threshold voltages of SOI MuGFETs

The multiple-gate field-effect transistor (MuGFET) is a device with a gate folded on different sides of the channel region. They are one of the most promising technological solutions to create high-performance ultra-scaled SOI CMOS. In this work, the behavior of the threshold voltage in double-gate, triple-gate and quadruple-gate SOI transistors with different channel doping concentrations is studied through three-dimensional numerical simulation. The results indicated that for double-gate transistors, one or two threshold voltages can be observed, depending on the channel doping concentration. However, in triple-gate and quadruple-gate it is possible to observe up to four threshold voltages due to the corner effect and the different doping concentration between the top and bottom of the Fin. (C) 2008 Elsevier Ltd. All rights reserved.

Lightning-Induced Voltages on Overhead Lines-Application of the Extended Rusck Model

Lightning-induced overvoltages have a considerable impact on the power quality of overhead distribution and telecommunications systems, and various models have been developed for the computation of the electromagnetic transients caused by indirect strokes. The most adequate has been shown to be the one proposed by Agrawal et al.; the Rusck model can be visualized as a particular case, as both models are equivalent when the lightning channel is perpendicular to the ground plane. In this paper, an extension of the Rusck model that enables the calculation of lightning-induced transients considering flashes to nearby elevated structures and realistic line configurations is tested against data obtained from both natural lightning and scale model experiments. The latter, performed under controlled conditions, can be used also to verify the validity of other coupling models and relevant codes. The so-called Extended Rusck Model, which is shown to be sufficiently accurate, is applied to the analysis of lightning-induced voltages on lines with a shield wire and/or surge arresters. The investigation conducted indicates that the ratio between the peak values of the voltages induced by typical first and subsequent strokes can be either greater or smaller than the unity, depending on the line configuration.