15 resultados para InAlN


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国家自然科学基金

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InAlN thin films and InAlN/GaN heterostructures have been intensively studied over recent years due to their applications in a variety of devices, including high electron mobility transistors (HEMTs). However, the quality of InAlN remains relatively poor with basic material and structural characteristics remain unclear.

Molecular beam epitaxy (MBE) is used to synthesize the materials for this research, as MBE is a widely used tool for semiconductor growth but has rarely been explored for InAlN growth. X-ray photoelectron spectroscopy (XPS) is used to determine the electronic and chemical characteristics of InAlN surfaces. This tool is used for the first time in application to MBE-grown InAlN and heterostructures for the characterization of surface oxides, the bare surface barrier height (BSBH), and valence band offsets (VBOs).

The surface properties of InAlN are studied in relation to surface oxide characteristics and formation. First, the native oxide compositions are studied. Then, methods enabling the effective removal of the native oxides are found. Finally, annealing is explored for the reliable growth of surface thermal oxides.

The bulk properties of InAlN films are studied. The unintentional compositional grading in InAlN during MBE growth is discovered and found to be affected by strain and relaxation. The optical characterization of InAlN using spectroscopy ellipsometry (SE) is also developed and reveals that a two-phase InAlN model applies to MBE-grown InAlN due to its natural formation of a nanocolumnar microstructure. The insertion of an AlN interlayer is found to mitigate the formation of this microstructure and increases mobility of whole structure by fivefold.

Finally, the synthesis and characterization of InAlN/GaN HEMT device structures are explored. The density and energy distribution of surface states are studied with relationships to surface chemical composition and surface oxide. The determination of the VBOs of InAlN/GaN structures with different In compositions are discussed at last.

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We present first-principles calculations of the thermodynamic and electronic properties of the zinc-blende ternary InxGa1-xN. InxAl1-xN, BxGa1-xN, and BxAl1-xN alloys. They are based on a generalized quasi-chemical approximation and a pseudopotential-plane-wave method. T-x phase diagrams for the alloys are obtained, We show that due to the large difference in interatomic distances between the binary compounds a significant phase miscibility gap for the alloys is found. In particular for the InxGa1-xN alloy, we show also experimental results obtained from X-ray and resonant Raman scattering measurements, which indicate the presence of an In-rich phase with x approximate to 0.8. For the boron-containing alloy layers we found a very high value for the critical temperature for miscibility. similar to9000 K. providing an explanation for the difficulties encountered to grow these materials with higher boron content. The influence of a biaxial strain on phase diagrams, energy gaps and gap bowing of these alloys is also discussed. (C) 2002 Elsevier B.V. B.V. All rights reserved.

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We report on properties of high quality ~60 nm thick InAlN layers nearly in-plane lattice-matched to GaN, grown on c-plane GaN-on-sapphire templates by plasma-assisted molecular beam epitaxy. Excellent crystalline quality and low surface roughness are confirmed by X-ray diffraction, transmission electron microscopy, and atomic force microscopy. High annular dark field observations reveal a periodic in-plane indium content variation (8 nm period), whereas optical measurements evidence certain residual absorption below the band-gap. The indium fluctuation is estimated to be +/- 1.2% around the nominal 17% indium content via plasmon energy oscillations assessed by electron energy loss spectroscopy with sub-nanometric spatial resolution.

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The high lattice mismatch between III-nitride binaries (InN, GaN and AlN) remains a key problem to grow high quality III-nitride heterostructures. Recent interest has been focused on the growth of high-quality InAlN layers, with approximately 18% of indium incorporation, in-plane lattice-matched (LM) to GaN. While a lot of work has been done by metal-organic vapour phase epitaxy (MOVPE) by Carlin and co-workers, its growth by molecular beam epitaxy (MBE) is still in infancy

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Molecular beam epitaxy growth of ten-period lattice-matched InAlN/GaN distributed Bragg reflectors (DBRs) with peak reflectivity centered around 400nm is reported including optical and transmission electron microscopy (TEM) measurements [1]. Good periodicity heterostructures with crack-free surfaces were confirmed, but, also a significant residual optical absorption below the bandgap was measured. The TEM characterization ascribes the origin of this problem to polymorfism and planar defects in the GaN layers and to the existence of an In-rich layer at the InAlN/GaN interfaces. In this work, several TEM based techniques have been combined.

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High-resolution monochromated electron energy loss spectroscopy (EELS) at subnanometric spatial resolution and <200 meV energy resolution has been used to assess the valence band properties of a distributed Bragg reflector multilayer heterostructure composed of InAlN lattice matched to GaN. This work thoroughly presents the collection of methods and computational tools put together for this task. Among these are zero-loss-peak subtraction and nonlinear fitting tools, and theoretical modeling of the electron scattering distribution. EELS analysis allows retrieval of a great amount of information: indium concentration in the InAlN layers is monitored through the local plasmon energy position and calculated using a bowing parameter version of Vegard Law. Also a dielectric characterization of the InAlN and GaN layers has been performed through Kramers-Kronig analysis of the Valence-EELS data, allowing band gap energy to be measured and an insight on the polytypism of the GaN layers.

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The luminescence properties of InxAl1−xN/GaN heterostructures are investigated systematically as a function of the In content (x = 0.067 − 0.208). The recombination between electrons confined in the two-dimensional electron gas and free holes in the GaN template is identified and analyzed. We find a systematic shift of the recombination with increasing In content from about 80 meV to only few meV below the GaN exciton emission. These results are compared with model calculations and can be attributed to the changing band profile and originating from the polarization gradient between InAlN and GaN.

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In order to clarify the effect of charged dislocations and surface donor states on the transport mechanisms in polar AlInN/AlN/GaN heterostructures, we have studied the current-voltage characteristics of Schottky junctions fabricated on AlInN/AlN/GaN heterostructures. The reverse-bias leakage current behaviour has been interpreted with a Poole-Frenkel emission of electrons from trap states near the metal-semiconductor junction to dislocation induced states. The variation of the Schottky barrier height as a function of the AlN layer thickness has been measured and discussed, considering the role of the surface states in the formation of the two dimensional electron gas at AlN/GaN interface.

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This thesis investigates the emerging InAlN high electron mobility transistor (HEMT) technology with respect to its application in the space industry. The manufacturing processes and device performance of InAlN HEMTs were compared to AlGaN HEMTs, also produced as part of this work. RF gain up to 4 GHz was demonstrated in both InAlN and AlGaN HEMTs with gate lengths of 1 μm, with InAlN HEMTs generally showing higher channel currents (~150 c.f. 60 mA/mm) but also degraded leakage properties (~ 1 x 10-4 c.f. < 1 x 10-8 A/mm) with respect to AlGaN. An analysis of device reliability was undertaken using thermal stability, radiation hardness and off-state breakdown measurements. Both InAlN and AlGaN HEMTs showed excellent stability under space-like conditions, with electrical operation maintained after exposure to 9.2 Mrad of gamma radiation at a dose rate of 6.6 krad/hour over two months and after storage at 250°C for four weeks. Furthermore a link was established between the optimisation of device performance (RF gain, power handling capabilities and leakage properties) and reliability (radiation hardness, thermal stability and breakdown properties), particularly with respect to surface passivation. Following analysis of performance and reliability data, the InAlN HEMT device fabrication process was optimised by adjusting the metal Ohmic contact formation process (specifically metal stack thicknesses and anneal conditions) and surface passivation techniques (plasma power during dielectric layer deposition), based on an existing AlGaN HEMT process. This resulted in both a reduction of the contact resistivity to around 1 x 10-4 Ω.cm2 and the suppression of degrading trap-related effects, bringing the measured gate-lag close to zero. These discoveries fostered a greater understanding of the physical mechanisms involved in device operation and manufacture, which is elaborated upon in the final chapter.

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The study of III-nitride materials (InN, GaN and AlN) gained huge research momentum after breakthroughs in the production light emitting diodes (LEDs) and laser diodes (LDs) over the past two decades. Last year, the Nobel Prize in Physics was awarded jointly to Isamu Akasaki, Hiroshi Amano and Shuji Nakamura for inventing a new energy efficient and environmental friendly light source: blue light-emitting diode (LED) from III-nitride semiconductors in the early 1990s. Nowadays, III-nitride materials not only play an increasingly important role in the lighting technology, but also become prospective candidates in other areas, for example, the high frequency (RF) high electron mobility transistor (HEMT) and photovoltaics. These devices require the growth of high quality III-nitride films, which can be prepared using metal organic vapour phase epitaxy (MOVPE). The main aim of my thesis is to study and develop the growth of III-nitride films, including AlN, u-AlGaN, Si-doped AlGaN, and InAlN, serving as sample wafers for fabrication of ultraviolet (UV) LEDs, in order to replace the conventional bulky, expensive and environmentally harmful mercury lamp as new UV light sources. For application to UV LEDs, reducing the threading dislocation density (TDD) in AlN epilayers on sapphire substrates is a key parameter for achieving high-efficiency AlGaNbased UV emitters. In Chapter 4, after careful and systematic optimisation, a working set of conditions, the screw and edge type dislocation density in the AlN were reduced to around 2.2×108 cm-2 and 1.3×109 cm-2 , respectively, using an optimized three-step process, as estimated by TEM. An atomically smooth surface with an RMS roughness of around 0.3 nm achieved over 5×5 µm 2 AFM scale. Furthermore, the motion of the steps in a one dimension model has been proposed to describe surface morphology evolution, especially the step bunching feature found under non-optimal conditions. In Chapter 5, control of alloy composition and the maintenance of compositional uniformity across a growing epilayer surface were demonstrated for the development of u-AlGaN epilayers. Optimized conditions (i.e. a high growth temperature of 1245 °C) produced uniform and smooth film with a low RMS roughness of around 2 nm achieved in 20×20 µm 2 AFM scan. The dopant that is most commonly used to obtain n-type conductivity in AlxGa1-xN is Si. However, the incorporation of Si has been found to increase the strain relaxation and promote unintentional incorporation of other impurities (O and C) during Si-doped AlGaN growth. In Chapter 6, reducing edge-type TDs is observed to be an effective appoach to improve the electric and optical properties of Si-doped AlGaN epilayers. In addition, the maximum electron concentration of 1.3×1019 cm-3 and 6.4×1018 cm-3 were achieved in Si-doped Al0.48Ga0.52N and Al0.6Ga0.4N epilayers as measured using Hall effect. Finally, in Chapter 7, studies on the growth of InAlN/AlGaN multiple quantum well (MQW) structures were performed, and exposing InAlN QW to a higher temperature during the ramp to the growth temperature of AlGaN barrier (around 1100 °C) will suffer a significant indium (In) desorption. To overcome this issue, quasi-two-tempeature (Q2T) technique was applied to protect InAlN QW. After optimization, an intense UV emission from MQWs has been observed in the UV spectral range from 320 to 350 nm measured by room temperature photoluminescence.

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PAPER Trapping phenomena in AlGaN and InAlN barrier HEMTs with different geometries S Martin-Horcajo1, A Wang1, A Bosca1, M F Romero1, M J Tadjer1,2, A D Koehler2, T J Anderson2 and F Calle1 Published 11 February 2015 • © 2015 IOP Publishing Ltd Semiconductor Science and Technology, Volume 30, Number 3 Article PDF Figures References Citations Metrics 350 Total downloads Cited by 1 articles Export citation and abstract BibTeX RIS Turn on MathJax Share this article Article information Abstract Trapping effects were evaluated by means of pulsed measurements under different quiescent biases for GaN/AlGaN/GaN and GaN/InAlN/GaN. It was found that devices with an AlGaN barrier underwent an increase in the on-resistance, and a drain current and transconductance reduction without measurable threshold voltage change, suggesting the location of the traps in the gate-drain access region. In contrast, devices with an InAlN barrier showed a transconductance and a decrease in drain associated with a significant positive shift of threshold voltage, indicating that the traps were likely located under the gate region; as well as an on-resistance degradation probably associated with the presence of surface traps in the gate-drain access region. Furthermore, measurements of drain current transients at different ambient temperatures revealed that the activation energy of electron traps was 0.43 eV and 0.38 eV for AlGaN and InAlN barrier devices, respectively. Experimental and simulation results demonstrated the influence of device geometry on the observed trapping effects, since devices with larger gate lengths and gate-to-drain distance values exhibited less noticeable charge trapping effects.

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III-nitride materials are very promising for high speed electronics/optical applications but still suffer in performance due to problems during high quality epitaxial growth, evolution of dislocation and defects, less understanding of fundamental physics of materials/processing of devices etc. This thesis mainly focus on GaN based heterostructures to understand the metal-semiconductor interface properties, 2DE(H)G influence on electrical and optical properties, and deep level states in GaN and InAlN, InGaN materials. The detailed electrical characterizations have been employed on Schottky diodes at GaN and InAl(Ga)N/GaN heterostructures in order to understand the metal-semiconductor interface related properties in these materials. I have observed the occurrence of Schottky barrier inhomogenity, role of dislocations in terms of leakage and creating electrically active defect states within energy gap of materials. Deep level transient spectroscopy method is employed on GaN, InAlN and InGaN materials and several defect levels have been observed related to majority and minority carriers. In fact, some defects have been found common in characteristics in ternary layers and GaN layer which indicates that those defect levels are from similar origin, most probably due to Ga/N vacancy in GaN/heterostructures. The role of structural defects, roughness has been extensively understood in terms of enhancing the reverse leakage current, suppressing the mobility in InAlN/AlN/GaN based high electron mobility transistor (HEMT) structures which are identified as key issues for GaN technology. Optical spectroscopy methods have been employed to understand materials quality, sub band and defect related transitions and compared with electrical characterizations. The observation of 2DEG sub band related absorption/emission in optical spectra have been identified and proposed for first time in nitride based polar heterostructures, which is well supported with simulation results. In addition, metal-semiconductor-metal (MSM)-InAl(Ga)N/GaN based photodetector structures have been fabricated and proposed for achieving high efficient optoelectronics devices in future.

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Los transistores de alta movilidad electrónica basados en GaN han sido objeto de una extensa investigación ya que tanto el GaN como sus aleaciones presentan unas excelentes propiedades eléctricas (alta movilidad, elevada concentración de portadores y campo eléctrico crítico alto). Aunque recientemente se han incluido en algunas aplicaciones comerciales, su expansión en el mercado está condicionada a la mejora de varios asuntos relacionados con su rendimiento y habilidad. Durante esta tesis se han abordado algunos de estos aspectos relevantes; por ejemplo, la fabricación de enhancement mode HEMTs, su funcionamiento a alta temperatura, el auto calentamiento y el atrapamiento de carga. Los HEMTs normalmente apagado o enhancement mode han atraído la atención de la comunidad científica dedicada al desarrollo de circuitos amplificadores y conmutadores de potencia, ya que su utilización disminuiría significativamente el consumo de potencia; además de requerir solamente una tensión de alimentación negativa, y reducir la complejidad del circuito y su coste. Durante esta tesis se han evaluado varias técnicas utilizadas para la fabricación de estos dispositivos: el ataque húmedo para conseguir el gate-recess en heterostructuras de InAl(Ga)N/GaN; y tratamientos basados en flúor (plasma CF4 e implantación de F) de la zona debajo de la puerta. Se han llevado a cabo ataques húmedos en heteroestructuras de InAl(Ga)N crecidas sobre sustratos de Si, SiC y zafiro. El ataque completo de la barrera se consiguió únicamente en las muestras con sustrato de Si. Por lo tanto, se puede deducir que la velocidad de ataque depende de la densidad de dislocaciones presentes en la estructura, ya que el Si presenta un peor ajuste del parámetro de red con el GaN. En relación a los tratamientos basados en flúor, se ha comprobado que es necesario realizar un recocido térmico después de la fabricación de la puerta para recuperar la heteroestructura de los daños causados durante dichos tratamientos. Además, el estudio de la evolución de la tensión umbral con el tiempo de recocido ha demostrado que en los HEMTs tratados con plasma ésta tiende a valores más negativos al aumentar el tiempo de recocido. Por el contrario, la tensión umbral de los HEMTs implantados se desplaza hacia valores más positivos, lo cual se atribuye a la introducción de iones de flúor a niveles más profundos de la heterostructura. Los transistores fabricados con plasma presentaron mejor funcionamiento en DC a temperatura ambiente que los implantados. Su estudio a alta temperatura ha revelado una reducción del funcionamiento de todos los dispositivos con la temperatura. Los valores iniciales de corriente de drenador y de transconductancia medidos a temperatura ambiente se recuperaron después del ciclo térmico, por lo que se deduce que dichos efectos térmicos son reversibles. Se han estudiado varios aspectos relacionados con el funcionamiento de los HEMTs a diferentes temperaturas. En primer lugar, se han evaluado las prestaciones de dispositivos de AlGaN/GaN sobre sustrato de Si con diferentes caps: GaN, in situ SiN e in situ SiN/GaN, desde 25 K hasta 550 K. Los transistores con in situ SiN presentaron los valores más altos de corriente drenador, transconductancia, y los valores más bajos de resistencia-ON, así como las mejores características en corte. Además, se ha confirmado que dichos dispositivos presentan gran robustez frente al estrés térmico. En segundo lugar, se ha estudiado el funcionamiento de transistores de InAlN/GaN con diferentes diseños y geometrías. Dichos dispositivos presentaron una reducción casi lineal de los parámetros en DC en el rango de temperaturas de 25°C hasta 225°C. Esto se debe principalmente a la dependencia térmica de la movilidad electrónica, y también a la reducción de la drift velocity con la temperatura. Además, los transistores con mayores longitudes de puerta mostraron una mayor reducción de su funcionamiento, lo cual se atribuye a que la drift velocity disminuye más considerablemente con la temperatura cuando el campo eléctrico es pequeño. De manera similar, al aumentar la distancia entre la puerta y el drenador, el funcionamiento del HEMT presentó una mayor reducción con la temperatura. Por lo tanto, se puede deducir que la degradación del funcionamiento de los HEMTs causada por el aumento de la temperatura depende tanto de la longitud de la puerta como de la distancia entre la puerta y el drenador. Por otra parte, la alta densidad de potencia generada en la región activa de estos transistores conlleva el auto calentamiento de los mismos por efecto Joule, lo cual puede degradar su funcionamiento y Habilidad. Durante esta tesis se ha desarrollado un simple método para la determinación de la temperatura del canal basado en medidas eléctricas. La aplicación de dicha técnica junto con la realización de simulaciones electrotérmicas han posibilitado el estudio de varios aspectos relacionados con el autocalentamiento. Por ejemplo, se han evaluado sus efectos en dispositivos sobre Si, SiC, y zafiro. Los transistores sobre SiC han mostrado menores efectos gracias a la mayor conductividad térmica del SiC, lo cual confirma el papel clave que desempeña el sustrato en el autocalentamiento. Se ha observado que la geometría del dispositivo tiene cierta influencia en dichos efectos, destacando que la distribución del calor generado en la zona del canal depende de la distancia entre la puerta y el drenador. Además, se ha demostrado que la temperatura ambiente tiene un considerable impacto en el autocalentamiento, lo que se atribuye principalmente a la dependencia térmica de la conductividad térmica de las capas y sustrato que forman la heterostructura. Por último, se han realizado numerosas medidas en pulsado para estudiar el atrapamiento de carga en HEMTs sobre sustratos de SiC con barreras de AlGaN y de InAlN. Los resultados obtenidos en los transistores con barrera de AlGaN han presentado una disminución de la corriente de drenador y de la transconductancia sin mostrar un cambio en la tensión umbral. Por lo tanto, se puede deducir que la posible localización de las trampas es la región de acceso entre la puerta y el drenador. Por el contrario, la reducción de la corriente de drenador observada en los dispositivos con barrera de InAlN llevaba asociado un cambio significativo en la tensión umbral, lo que implica la existencia de trampas situadas en la zona debajo de la puerta. Además, el significativo aumento del valor de la resistencia-ON y la degradación de la transconductancia revelan la presencia de trampas en la zona de acceso entre la puerta y el drenador. La evaluación de los efectos del atrapamiento de carga en dispositivos con diferentes geometrías ha demostrado que dichos efectos son menos notables en aquellos transistores con mayor longitud de puerta o mayor distancia entre puerta y drenador. Esta dependencia con la geometría se puede explicar considerando que la longitud y densidad de trampas de la puerta virtual son independientes de las dimensiones del dispositivo. Finalmente se puede deducir que para conseguir el diseño óptimo durante la fase de diseño no sólo hay que tener en cuenta la aplicación final sino también la influencia que tiene la geometría en los diferentes aspectos estudiados (funcionamiento a alta temperatura, autocalentamiento, y atrapamiento de carga). ABSTRACT GaN-based high electron mobility transistors have been under extensive research due to the excellent electrical properties of GaN and its related alloys (high carrier concentration, high mobility, and high critical electric field). Although these devices have been recently included in commercial applications, some performance and reliability issues need to be addressed for their expansion in the market. Some of these relevant aspects have been studied during this thesis; for instance, the fabrication of enhancement mode HEMTs, the device performance at high temperature, the self-heating and the charge trapping. Enhancement mode HEMTs have become more attractive mainly because their use leads to a significant reduction of the power consumption during the stand-by state. Moreover, they enable the fabrication of simpler power amplifier circuits and high-power switches because they allow the elimination of negativepolarity voltage supply, reducing significantly the circuit complexity and system cost. In this thesis, different techniques for the fabrication of these devices have been assessed: wet-etching for achieving the gate-recess in InAl(Ga)N/GaN devices and two different fluorine-based treatments (CF4 plasma and F implantation). Regarding the wet-etching, experiments have been carried out in InAl(Ga)N/GaN grown on different substrates: Si, sapphire, and SiC. The total recess of the barrier was achieved after 3 min of etching in devices grown on Si substrate. This suggests that the etch rate can critically depend on the dislocations present in the structure, since the Si exhibits the highest mismatch to GaN. Concerning the fluorine-based treatments, a post-gate thermal annealing was required to recover the damages caused to the structure during the fluorine-treatments. The study of the threshold voltage as a function of this annealing time has revealed that in the case of the plasma-treated devices it become more negative with the time increase. On the contrary, the threshold voltage of implanted HEMTs showed a positive shift when the annealing time was increased, which is attributed to the deep F implantation profile. Plasma-treated HEMTs have exhibited better DC performance at room temperature than the implanted devices. Their study at high temperature has revealed that their performance decreases with temperature. The initial performance measured at room temperature was recovered after the thermal cycle regardless of the fluorine treatment; therefore, the thermal effects were reversible. Thermal issues related to the device performance at different temperature have been addressed. Firstly, AlGaN/GaN HEMTs grown on Si substrate with different cap layers: GaN, in situ SiN, or in situ SiN/GaN, have been assessed from 25 K to 550 K. In situ SiN cap layer has been demonstrated to improve the device performance since HEMTs with this cap layer have exhibited the highest drain current and transconductance values, the lowest on-resistance, as well as the best off-state characteristics. Moreover, the evaluation of thermal stress impact on the device performance has confirmed the robustness of devices with in situ cap. Secondly, the high temperature performance of InAlN/GaN HEMTs with different layouts and geometries have been assessed. The devices under study have exhibited an almost linear reduction of the main DC parameters operating in a temperature range from room temperature to 225°C. This was mainly due to the thermal dependence of the electron mobility, and secondly to the drift velocity decrease with temperature. Moreover, HEMTs with large gate length values have exhibited a great reduction of the device performance. This was attributed to the greater decrease of the drift velocity for low electric fields. Similarly, the increase of the gate-to-drain distance led to a greater reduction of drain current and transconductance values. Therefore, this thermal performance degradation has been found to be dependent on both the gate length and the gate-to-drain distance. It was observed that the very high power density in the active region of these transistors leads to Joule self-heating, resulting in an increase of the device temperature, which can degrade the device performance and reliability. A simple electrical method have been developed during this work to determine the channel temperature. Furthermore, the application of this technique together with the performance of electro-thermal simulations have enabled the evaluation of different aspects related to the self-heating. For instance, the influence of the substrate have been confirmed by the study of devices grown on Si, SiC, and Sapphire. HEMTs grown on SiC substrate have been confirmed to exhibit the lowest self-heating effects thanks to its highest thermal conductivity. In addition to this, the distribution of the generated heat in the channel has been demonstrated to be dependent on the gate-to-drain distance. Besides the substrate and the geometry of the device, the ambient temperature has also been found to be relevant for the self-heating effects, mainly due to the temperature-dependent thermal conductivity of the layers and the substrate. Trapping effects have been evaluated by means of pulsed measurements in AlGaN and InAIN barrier devices. AlGaN barrier HEMTs have exhibited a de crease in drain current and transconductance without measurable threshold voltage change, suggesting the location of the traps in the gate-to-drain access region. On the contrary, InAIN barrier devices have showed a drain current associated with a positive shift of threshold voltage, which indicated that the traps were possibly located under the gate region. Moreover, a significant increase of the ON-resistance as well as a transconductance reduction were observed, revealing the presence of traps on the gate-drain access region. On the other hand, the assessment of devices with different geometries have demonstrated that the trapping effects are more noticeable in devices with either short gate length or the gate-to-drain distance. This can be attributed to the fact that the length and the trap density of the virtual gate are independent on the device geometry. Finally, it can be deduced that besides the final application requirements, the influence of the device geometry on the performance at high temperature, on the self-heating, as well as on the trapping effects need to be taken into account during the device design stage to achieve the optimal layout.

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III-Nitride materials have recently become a promising candidate for superior applications over the current technologies. However, certain issues such as lack of native substrates, and high defect density have to be overcome for further development of III-Nitride technology. This work presents research on lattice engineering of III-Nitride materials, and the structural, optical, and electrical properties of its alloys, in order to approach the ideal material for various applications. We demonstrated the non-destructive and quantitative characterization of composition modulated nanostructure in InAlN thin films with X-ray diffraction. We found the development of the nanostructure depends on growth temperature, and the composition modulation has impacts on carrier recombination dynamics. We also showed that the controlled relaxation of a very thin AlN buffer (20 ~ 30 nm) or a graded composition InGaN buffer can significantly reduce the defect density of a subsequent epitaxial layer. Finally, we synthesized an InAlGaN thin films and a multi-quantum-well structure. Significant emission enhancement in the UVB range (280 – 320 nm) was observed compared to AlGaN thin films. The nature of the enhancement was investigated experimentally and numerically, suggesting carrier confinement in the In localization centers.