979 resultados para III-V substrate
Resumo:
Atomic layer deposition (ALD) is now used in semiconductor fabrication lines to deposit nanometre-thin oxide films, and has thus enabled the introduction of high-permittivity dielectrics into the CMOS gate stack. With interest increasing in transistors based on high mobility substrates, such as GaAs, we are investigating the surface treatments that may improve the interface characteristics. We focus on incubation periods of ALD processes on III-V substrates. We have applied first principles Density Functional Theory (DFT) to investigate detailed chemistry of these early stages of growth, specifically substrate and ALD precursor interaction. We have modelled the ‘clean-up’ effect by which organometallic precursors: trimethylaluminium (TMA) or hafnium and titanium amides clean arsenic oxides off the GaAs surface before ALD growth of dielectric commences and similar effect on Si3N4 substrate. Our simulations show that ‘clean-up’ of an oxide film strongly depends on precursor ligand, its affinity to the oxide and the redox character of the oxide. The predominant pathway for a metalloid oxide such as arsenic oxide is reduction, producing volatile molecules or gettering oxygen from less reducible oxides. An alternative pathway is non-redox ligand exchange, which allows non-reducible oxides (e.g. SiO2) to be cleaned-up. First principles study shows also that alkylamides are more susceptible to decomposition rather than migration on the oxide surface. This improved understanding of the chemical principles underlying ‘clean-up’ allows us to rationalize and predict which precursors will perform the reaction. The comparison is made between selection of metal chlorides, methyls and alkylamides precursors.
Resumo:
The qualities of GaSb substrates commonly used for the preparation of III-V antimonide epilayers were studied before and after growing GaInAsSb multi-layers by MOCVD using PL, FTIR and DCXD together with the electrical properties and EPD value. The correlation between the substrate qualities and epilayer properties was briefly discussed. The good property epilayers of GaInAsSb and, then, the high preformance of 2.3 um photodetectors were achieved only using the good quality GaSb wafers as the substrates.
Resumo:
The qualities of GaSb substrates commonly used for the preparation of III-V antimonide epilayers were studied before and after growing GaInAsSb multi-layers by MOCVD using PL, FTIR and DCXD together with the electrical properties and EPD value. The correlation between the substrate qualities and epilayer properties was briefly discussed. The good property epilayers of GaInAsSb and, then, the high preformance of 2.3 um photodetectors were achieved only using the good quality GaSb wafers as the substrates.
Resumo:
This contribution aims to illustrate the potential of the X-ray photoelectron spectroscopy (XPS) technique as a tool to analyze different parts of a solar cell (surface state, heterointerfaces, profile composition of ohmic contacts, etc). Here, the analysis is specifically applied to III-V multijunction solar cells used in concentrator systems. The information provided from such XPS analysis has helped to understand the physico-chemical nature of these surfaces and interfaces, and thus has guided the technological process in order to improve the solar cell performance.
Resumo:
Dual-junction solar cells formed by a GaAsP or GaInP top cell and a silicon bottom cell seem to be attractive candidates to materialize the long sought-for integration of III-V materials on silicon for photovoltaic applications. One of the first issues to be considered in the development of this structure will be the strategy to create the silicon emitter of the bottom subcell. In this study, we explore the possibility of forming the silicon emitter by phosphorus diffusion (i.e. exposing the wafer to PH3 in a MOVPE reactor) and still obtain good surface morphologies to achieve a successful III-V heteroepitaxy as occurs in conventional III-V on germanium solar cell technology. Consequently, we explore the parameter space (PH3 partial pressure, time and temperature) that is needed to create optimized emitter designs and assess the impact of such treatments on surface morphology using atomic force microscopy. Although a strong degradation of surface morphology caused by prolonged exposure of silicon to PH3 is corroborated, it is also shown that subsequent anneals under H-2 can recover silicon surface morphology and minimize its RMS roughness and the presence of pits and spikes.
Resumo:
Various techniques on the growth of self-assembled compound semiconductor nano-structures (quantum dots, QDs) have been tried to enhance the controlling on size, density, emitting wavelength, uniformity in size and ordering in location of the QDs. Optimized growth conditions have been used in the application of the QD materials in opto-electronic devices. High-power long-lifetime quantum-dot laser-diodes (QD-LDs) emitting near 1 mu m, QD-LDs emitting in red-light range, 1.3 mu m QD-LDs on GaAs substrate and quantum-dot super-luminescent diodes (QD-SLDs) have successfully been achieved.
Resumo:
A thin-film InGaAs/GaAs edge-emitting single-quantum-well laser has been integrated with a tapered multimode SU-8 waveguide onto an Si substrate. The SU-8 waveguide is passively aligned to the laser using mask-based photolithography, mimicking electrical interconnection in Si complementary metal-oxide semiconductor, and overlaps one facet of the thin-film laser for coupling power from the laser to the waveguide. Injected threshold current densities of 260A/cm(2) are measured with the reduced reflectivity of the embedded laser facet while improving single mode coupling efficiency, which is theoretically simulated to be 77%.
Resumo:
The main focus and concerns of this PhD thesis is the growth of III-V semiconductor nanostructures (Quantum dots (QDs) and quantum dashes) on silicon substrates using molecular beam epitaxy (MBE) technique. The investigation of influence of the major growth parameters on their basic properties (density, geometry, composition, size etc.) and the systematic characterization of their structural and optical properties are the core of the research work. The monolithic integration of III-V optoelectronic devices with silicon electronic circuits could bring enormous prospect for the existing semiconductor technology. Our challenging approach is to combine the superior passive optical properties of silicon with the superior optical emission properties of III-V material by reducing the amount of III-V materials to the very limit of the active region. Different heteroepitaxial integration approaches have been investigated to overcome the materials issues between III-V and Si. However, this include the self-assembled growth of InAs and InGaAs QDs in silicon and GaAx matrices directly on flat silicon substrate, sitecontrolled growth of (GaAs/In0,15Ga0,85As/GaAs) QDs on pre-patterned Si substrate and the direct growth of GaP on Si using migration enhanced epitaxy (MEE) and MBE growth modes. An efficient ex-situ-buffered HF (BHF) and in-situ surface cleaning sequence based on atomic hydrogen (AH) cleaning at 500 °C combined with thermal oxide desorption within a temperature range of 700-900 °C has been established. The removal of oxide desorption was confirmed by semicircular streaky reflection high energy electron diffraction (RHEED) patterns indicating a 2D smooth surface construction prior to the MBE growth. The evolution of size, density and shape of the QDs are ex-situ characterized by atomic-force microscopy (AFM) and transmission electron microscopy (TEM). The InAs QDs density is strongly increased from 108 to 1011 cm-2 at V/III ratios in the range of 15-35 (beam equivalent pressure values). InAs QD formations are not observed at temperatures of 500 °C and above. Growth experiments on (111) substrates show orientation dependent QD formation behaviour. A significant shape and size transition with elongated InAs quantum dots and dashes has been observed on (111) orientation and at higher Indium-growth rate of 0.3 ML/s. The 2D strain mapping derived from high-resolution TEM of InAs QDs embedded in silicon matrix confirmed semi-coherent and fully relaxed QDs embedded in defectfree silicon matrix. The strain relaxation is released by dislocation loops exclusively localized along the InAs/Si interfaces and partial dislocations with stacking faults inside the InAs clusters. The site controlled growth of GaAs/In0,15Ga0,85As/GaAs nanostructures has been demonstrated for the first time with 1 μm spacing and very low nominal deposition thicknesses, directly on pre-patterned Si without the use of SiO2 mask. Thin planar GaP layer was successfully grown through migration enhanced epitaxy (MEE) to initiate a planar GaP wetting layer at the polar/non-polar interface, which work as a virtual GaP substrate, for the GaP-MBE subsequently growth on the GaP-MEE layer with total thickness of 50 nm. The best root mean square (RMS) roughness value was as good as 1.3 nm. However, these results are highly encouraging for the realization of III-V optical devices on silicon for potential applications.
Resumo:
GaN/InGaN nanorods have attracted much scientific interest during the last decade because of their unique optical and electrical properties [1,2]. The high crystal quality and the absence of extended defects make them ideal candidates for the fabrication of high efficiency opto-electronic devices such as nano-photodetectors, light-emitting diodes, and solar cells [1-3]. Nitrides nanorods are commonly grown in the self-assembled mode by plasma-assisted molecular beam epitaxy (MBE) [4]. However, self-assembled nanorods are characterized by inhomogeneous heights and diameters, which render the device processing very difficult and negatively affect the electronic transport properties of the final device. For this reason, the selective area growth (SAG) mode has been proposed, where the nanorods preferentially grow on pre-defined sites on a pre-patterned substrate [5].
Resumo:
In this work we present the results and analysis of a 10 MeV proton irradiation experiment performed on III-V semiconductor materials and solar cells. A set of representative devices including lattice-matched InGaP/GaInAs/Ge triple junction solar cells and single junction GaAs and InGaP component solar cells and a Ge diode were irradiated for different doses. The devices were studied in-situ before and after each exposure at dark and 1 sun AM0 illumination conditions, using a solar simulator connected to the irradiation chamber through a borosilicate glass window. Ex-situ characterization techniques included dark and 1 sun AM0 illumination I-V measurements. Furthermore, numerical simulation of the devices using D-AMPS-1D code together with calculations based on the TRIM software were performed in order to gain physical insight on the experimental results. The experiment also included the proton irradiation of an unprocessed Ge solar cell structure as well as the irradiation of a bare Ge(100) substrate. Ex-situ material characterization, after radioactive deactivation of the samples, includes Raman spectroscopy and spectral reflectivity.
Resumo:
Vicinal Ge(100) is the common substrate for state of the art multi-junction solar cells grown by metal-organic vapor phase epitaxy (MOVPE). While triple junction solar cells based on Ge(100) present efficiencies mayor que 40%, little is known about the microscopic III-V/Ge(100) nucleation and its interface formation. A suitable Ge(100) surface preparation prior to heteroepitaxy is crucial to achieve low defect densities in the III-V epilayers. Formation of single domain surfaces with double layer steps is required to avoid anti-phase domains in the III-V films. The step formation processes in MOVPE environment strongly depends on the major process parameters such as substrate temperature, H2 partial pressure, group V precursors [1], and reactor conditions. Detailed investigation of these processes on the Ge(100) surface by ultrahigh vacuum (UHV) based standard surface science tools are complicated due to the presence of H2 process gas. However, in situ surface characterization by reflection anisotropy spectroscopy (RAS) allowed us to study the MOVPE preparation of Ge(100) surfaces directly in dependence on the relevant process parameters [2, 3, 4]. A contamination free MOVPE to UHV transfer system [5] enabled correlation of the RA spectra to results from UHV-based surface science tools. In this paper, we established the characteristic RA spectra of vicinal Ge(100) surfaces terminated with monohydrides, arsenic and phosphorous. RAS enabled in situ control of oxide removal, H2 interaction and domain formation during MOVPE preparation.
Resumo:
Esta Tesis trata sobre el desarrollo y crecimiento -mediante tecnología MOVPE (del inglés: MetalOrganic Vapor Phase Epitaxy)- de células solares híbridas de semiconductores III-V sobre substratos de silicio. Esta integración pretende ofrecer una alternativa a las células actuales de III-V, que, si bien ostentan el récord de eficiencia en dispositivos fotovoltaicos, su coste es, a día de hoy, demasiado elevado para ser económicamente competitivo frente a las células convencionales de silicio. De este modo, este proyecto trata de conjugar el potencial de alta eficiencia ya demostrado por los semiconductores III-V en arquitecturas de células fotovoltaicas multiunión con el bajo coste, la disponibilidad y la abundancia del silicio. La integración de semiconductores III-V sobre substratos de silicio puede afrontarse a través de diferentes aproximaciones. En esta Tesis se ha optado por el desarrollo de células solares metamórficas de doble unión de GaAsP/Si. Mediante esta técnica, la transición entre los parámetros de red de ambos materiales se consigue por medio de la formación de defectos cristalográficos (mayoritariamente dislocaciones). La idea es confinar estos defectos durante el crecimiento de sucesivas capas graduales en composición para que la superficie final tenga, por un lado, una buena calidad estructural, y por otro, un parámetro de red adecuado. Numerosos grupos de investigación han dirigido sus esfuerzos en los últimos años en desarrollar una estructura similar a la que aquí proponemos. La mayoría de éstos se han centrado en entender los retos asociados al crecimiento de materiales III-V, con el fin de conseguir un material de alta calidad cristalográfica. Sin embargo, prácticamente ninguno de estos grupos ha prestado especial atención al desarrollo y optimización de la célula inferior de silicio, cuyo papel va a ser de gran relevancia en el funcionamiento de la célula completa. De esta forma, y con el fin de completar el trabajo hecho hasta el momento en el desarrollo de células de III-V sobre silicio, la presente Tesis se centra, fundamentalmente, en el diseño y optimización de la célula inferior de silicio, para extraer su máximo potencial. Este trabajo se ha estructurado en seis capítulos, ordenados de acuerdo al desarrollo natural de la célula inferior. Tras un capítulo de introducción al crecimiento de semiconductores III-V sobre Si, en el que se describen las diferentes alternativas para su integración; nos ocupamos de la parte experimental, comenzando con una extensa descripción y caracterización de los substratos de silicio. De este modo, en el Capítulo 2 se analizan con exhaustividad los diferentes tratamientos (tanto químicos como térmicos) que deben seguir éstos para garantizar una superficie óptima sobre la que crecer epitaxialmente el resto de la estructura. Ya centrados en el diseño de la célula inferior, el Capítulo 3 aborda la formación de la unión p-n. En primer lugar se analiza qué configuración de emisor (en términos de dopaje y espesor) es la más adecuada para sacar el máximo rendimiento de la célula inferior. En este primer estudio se compara entre las diferentes alternativas existentes para la creación del emisor, evaluando las ventajas e inconvenientes que cada aproximación ofrece frente al resto. Tras ello, se presenta un modelo teórico capaz de simular el proceso de difusión de fosforo en silicio en un entorno MOVPE por medio del software Silvaco. Mediante este modelo teórico podemos determinar qué condiciones experimentales son necesarias para conseguir un emisor con el diseño seleccionado. Finalmente, estos modelos serán validados y constatados experimentalmente mediante la caracterización por técnicas analíticas (i.e. ECV o SIMS) de uniones p-n con emisores difundidos. Uno de los principales problemas asociados a la formación del emisor por difusión de fósforo, es la degradación superficial del substrato como consecuencia de su exposición a grandes concentraciones de fosfina (fuente de fósforo). En efecto, la rugosidad del silicio debe ser minuciosamente controlada, puesto que éste servirá de base para el posterior crecimiento epitaxial y por tanto debe presentar una superficie prístina para evitar una degradación morfológica y cristalográfica de las capas superiores. En este sentido, el Capítulo 4 incluye un análisis exhaustivo sobre la degradación morfológica de los substratos de silicio durante la formación del emisor. Además, se proponen diferentes alternativas para la recuperación de la superficie con el fin de conseguir rugosidades sub-nanométricas, que no comprometan la calidad del crecimiento epitaxial. Finalmente, a través de desarrollos teóricos, se establecerá una correlación entre la degradación morfológica (observada experimentalmente) con el perfil de difusión del fósforo en el silicio y por tanto, con las características del emisor. Una vez concluida la formación de la unión p-n propiamente dicha, se abordan los problemas relacionados con el crecimiento de la capa de nucleación de GaP. Por un lado, esta capa será la encargada de pasivar la subcélula de silicio, por lo que su crecimiento debe ser regular y homogéneo para que la superficie de silicio quede totalmente pasivada, de tal forma que la velocidad de recombinación superficial en la interfaz GaP/Si sea mínima. Por otro lado, su crecimiento debe ser tal que minimice la aparición de los defectos típicos de una heteroepitaxia de una capa polar sobre un substrato no polar -denominados dominios de antifase-. En el Capítulo 5 se exploran diferentes rutinas de nucleación, dentro del gran abanico de posibilidades existentes, para conseguir una capa de GaP con una buena calidad morfológica y estructural, que será analizada mediante diversas técnicas de caracterización microscópicas. La última parte de esta Tesis está dedicada al estudio de las propiedades fotovoltaicas de la célula inferior. En ella se analiza la evolución de los tiempos de vida de portadores minoritarios de la base durante dos etapas claves en el desarrollo de la estructura Ill-V/Si: la formación de la célula inferior y el crecimiento de las capas III-V. Este estudio se ha llevado a cabo en colaboración con la Universidad de Ohio, que cuentan con una gran experiencia en el crecimiento de materiales III-V sobre silicio. Esta tesis concluye destacando las conclusiones globales del trabajo realizado y proponiendo diversas líneas de trabajo a emprender en el futuro. ABSTRACT This thesis pursues the development and growth of hybrid solar cells -through Metal Organic Vapor Phase Epitaxy (MOVPE)- formed by III-V semiconductors on silicon substrates. This integration aims to provide an alternative to current III-V cells, which, despite hold the efficiency record for photovoltaic devices, their cost is, today, too high to be economically competitive to conventional silicon cells. Accordingly, the target of this project is to link the already demonstrated efficiency potential of III-V semiconductor multijunction solar cell architectures with the low cost and unconstrained availability of silicon substrates. Within the existing alternatives for the integration of III-V semiconductors on silicon substrates, this thesis is based on the metamorphic approach for the development of GaAsP/Si dual-junction solar cells. In this approach, the accommodation of the lattice mismatch is handle through the appearance of crystallographic defects (namely dislocations), which will be confined through the incorporation of a graded buffer layer. The resulting surface will have, on the one hand a good structural quality; and on the other hand the desired lattice parameter. Different research groups have been working in the last years in a structure similar to the one here described, being most of their efforts directed towards the optimization of the heteroepitaxial growth of III-V compounds on Si, with the primary goal of minimizing the appearance of crystal defects. However, none of these groups has paid much attention to the development and optimization of the bottom silicon cell, which, indeed, will play an important role on the overall solar cell performance. In this respect, the idea of this thesis is to complete the work done so far in this field by focusing on the design and optimization of the bottom silicon cell, to harness its efficiency. This work is divided into six chapters, organized according to the natural progress of the bottom cell development. After a brief introduction to the growth of III-V semiconductors on Si substrates, pointing out the different alternatives for their integration; we move to the experimental part, which is initiated by an extensive description and characterization of silicon substrates -the base of the III-V structure-. In this chapter, a comprehensive analysis of the different treatments (chemical and thermal) required for preparing silicon surfaces for subsequent epitaxial growth is presented. Next step on the development of the bottom cell is the formation of the p-n junction itself, which is faced in Chapter 3. Firstly, the optimization of the emitter configuration (in terms of doping and thickness) is handling by analytic models. This study includes a comparison between the different alternatives for the emitter formation, evaluating the advantages and disadvantages of each approach. After the theoretical design of the emitter, it is defined (through the modeling of the P-in-Si diffusion process) a practical parameter space for the experimental implementation of this emitter configuration. The characterization of these emitters through different analytical tools (i.e. ECV or SIMS) will validate and provide experimental support for the theoretical models. A side effect of the formation of the emitter by P diffusion is the roughening of the Si surface. Accordingly, once the p-n junction is formed, it is necessary to ensure that the Si surface is smooth enough and clean for subsequent phases. Indeed, the roughness of the Si must be carefully controlled since it will be the basis for the epitaxial growth. Accordingly, after quantifying (experimentally and by theoretical models) the impact of the phosphorus on the silicon surface morphology, different alternatives for the recovery of the surface are proposed in order to achieve a sub-nanometer roughness which does not endanger the quality of the incoming III-V layers. Moving a step further in the development of the Ill-V/Si structure implies to address the challenges associated to the GaP on Si nucleation. On the one hand, this layer will provide surface passivation to the emitter. In this sense, the growth of the III-V layer must be homogeneous and continuous so the Si emitter gets fully passivated, providing a minimal surface recombination velocity at the interface. On the other hand, the growth should be such that the appearance of typical defects related to the growth of a polar layer on a non-polar substrate is minimized. Chapter 5 includes an exhaustive study of the GaP on Si nucleation process, exploring different nucleation routines for achieving a high morphological and structural quality, which will be characterized by means of different microscopy techniques. Finally, an extensive study of the photovoltaic properties of the bottom cell and its evolution during key phases in the fabrication of a MOCVD-grown III-V-on-Si epitaxial structure (i.e. the formation of the bottom cell; and the growth of III-V layers) will be presented in the last part of this thesis. This study was conducted in collaboration with The Ohio State University, who has extensive experience in the growth of III-V materials on silicon. This thesis concludes by highlighting the overall conclusions of the presented work and proposing different lines of work to be undertaken in the future.
Resumo:
Planar <110> GaAs nanowires and quantum dots grown by atmospheric MOCVD have been introduced to non-standard growth conditions such as incorporating Zn and growing them on free-standing suspended films and on 10° off-cut substrates. Zn doped nanowires exhibited periodic notching along the axis of the wire that is dependent on Zn/Ga gas phase molar ratios. Planar nanowires grown on suspended thin films give insight into the mobility of the seed particle and change in growth direction. Nanowires that were grown on the off-cut sample exhibit anti-parallel growth direction changes. Quantum dots are grown on suspended thin films and show preferential growth at certain temperatures. Envisioned nanowire applications include twin-plane superlattices, axial pn-junctions, nanowire lasers, and the modulation of nanowire growth direction against an impeding barrier and varying substrate conditions.
Resumo:
The semiconductor nanowire has been widely studied over the past decade and identified as a promising nanotechnology building block with application in photonics and electronics. The flexible bottom-up approach to nanowire growth allows for straightforward fabrication of complex 1D nanostructures with interesting optical, electrical, and mechanical properties. III-V nanowires in particular are useful because of their direct bandgap, high carrier mobility, and ability to form heterojunctions and have been used to make devices such as light-emitting diodes, lasers, and field-effect transistors. However, crystal defects are widely reported for III-V nanowires when grown in the common out-of-plane <111>B direction. Furthermore, commercialization of nanowires has been limited by the difficulty of assembling nanowires with predetermined position and alignment on a wafer-scale. In this thesis, planar III-V nanowires are introduced as a low-defect and integratable nanotechnology building block grown with metalorganic chemical vapor deposition. Planar GaAs nanowires grown with gold seed particles self-align along the <110> direction on the (001) GaAs substrate. Transmission electron microscopy reveals that planar GaAs nanowires are nearly free of crystal defects and grow laterally and epitaxially on the substrate surface. The nanowire morphology is shown to be primarily controlled through growth temperature and an ideal growth window of 470 +\- 10 °C is identified for planar GaAs nanowires. Extension of the planar growth mode to other materials is demonstrated through growth of planar InAs nanowires. Using a sacrificial layer, the transfer of planar GaAs nanowires onto silicon substrates with control over the alignment and position is presented. A metal-semiconductor field-effect transistor fabricated with a planar GaAs nanowire shows bulk-like low-field electron transport characteristics with high mobility. The aligned planar geometry and excellent material quality of planar III-V nanowires may lead to highly integrated III-V nanophotonics and nanoelectronics.