A comparative study of erbium oxide and gadolinium oxide high-k dielectric thin films grown by low-pressure metalorganic chemical vapour deposition (MOCVD) using beta-Diketonates as precursors

In this paper, a comparative study of thin films of Er2O3 and Gd2O3 grown on n-type Si(100) by low-pressure metalorganic chemical vapour deposition (MOCVD) under the identical conditions has been presented. beta-Diketonate complex of rate earth metals was used as precursor. Description on the evolution of the morphology, structure, optical, and electrical characteristics of films with respect to growth parameters and post-deposition annealing process has been presented. As-gown Gd2O3 films grow with <111> texture, whereas the texture of Er2O3 films strongly depends on the growth temperature (either <100> or <111>). Compositional analysis reveals that the Gd2O3 films grown at or above 500degreesC are carbon free whereas Er2O3 films at upto 525degreesC show the presence of heteroatoms and Er2O3 films grown above 525degreesC are carbon five. The effective dielectric constant is in the range of 7-24, while the fixed charge density is in the range - 10(11) to 10(10) CM-2 as extracted from the C-V characteristics. DC I-V study was carried out to examine the leakage behaviour of films. It reveals that the as-grown Gd2O3 film was very leakey in nature. Annealing of the films in oxidizing ambient for a period of 20 min results in a drastic improvement in the leakage behaviour. The presence of heteroatoms (such as carbon) and their effect on the properties of films are discussed.

Advantages of top-gate, high-k dielectric carbon nanotube field-effect transistors

The subthreshold slope, transconductance, threshold voltage, and hysteresis of a carbon nanotube field-effect transistor (CNT FET) were examined as its configuration was changed from bottom-gate exposed channel, bottom-gate covered channel to top-gate FET. An individual single wall CNT was grown by chemical vapor deposition and its gate configuration was changed while determining its transistor characteristics to ensure that the measurements were not a function of different chirality or diameter CNTs. The bottom-gate exposed CNT FET utilized 900 nm SiO2 as the gate insulator. This CNT FET was then covered with TiO2 to form the bottom-gate covered channel CNT FET. Finally, the top-gate CNT FET was fabricated and the device utilized TiO 2 (K ∼ 80, equivalent oxide thickness=0.25 nm) as the gate insulator. Of the three configurations investigated, the top-gate device exhibited best subthreshold slope (67-70 mV/dec), highest transconductance (1.3 μS), and negligible hysteresis in terms of threshold voltage shift. © 2006 American Institute of Physics.

Fabrication of high-k dielectric thin films for spintronics

Lo scopo di questa tesi è la fabbricazione di ossidi complessi aventi struttura perovskitica, per mezzo della tecnica Channel Spark Ablation (CSA). Più precisamente sono stati depositati film sottili di manganite (LSMO), SrTiO3 (STO) e NdGaO3 (NGO). Inoltre nel laboratorio ospite è stata effettuata la caratterizzazione elettrica e dielettrica (spettroscopia di impedenza), mentre per l'analisi strutturale e chimica ci si è avvalsi di collaborazioni. Sono stati fabbricati dispositivi LSMO/STO/Co e se ne è studiato il comportamento magnetoresistivo e la bistabilità elettrica a seconda del carattere epitassiale od amorfo dell'STO. I risultati più promettenti sono stati ottenuti con STO amorfo. Sono stati costruiti diversi set di condensatori nella configurazione Metallo/Isolante/Semiconduttore (MIS), con M=Au, I=STO o NGO ed S=Nb:STO, allo scopo di indagare la dipendenza delle proprietà dielettriche ed isolanti dai parametri di crescita. In particolare ci si è concentrati sulla temperatura di deposizione e, nel caso dei film di STO, anche sulla dipendenza della costante dielettrica dallo spessore del film. Come ci si aspettava, la costante dielettrica relativa dei film di STO (65 per un film spesso 40 nm e 175 per uno di 170 nm) si è rivelata maggiore di quella dei film di NGO per i quali abbiamo ottenuto un valore di 20, che coincide con il valore del bulk. Nonostante l'elevata capacità per unità di area ottenibile con l'STO, la costante dielettrica di questo materiale risulta fortemente dipendente dallo spessore del film. Un ulteriore aspetto critico relativo all'STO è dato dal livello di ossidazione del film: le vacanze di ossigeno, infatti, possono ridurre la resistività dell'STO (nominalmente molto elevata), ed aumentarne la corrente di perdita. Al contrario l'NGO è meno sensibile ai processi tecnologici e, allo stesso tempo, ha un valore di costante dielettrica più alto rispetto ad un tipico dielettrico come l'ossido di silicio.

Trapped charge dynamics in a sol-gel based TiO(2) high- k gate dielectric silicon metal-oxide-semiconductor field effect transistor.

We have studied the response of a sol-gel based TiO(2), high k dielectric field effect transistor structure to microwave radiation. Under fixed bias conditions the transistor shows frequency dependent current fluctuations when exposed to continuous wave microwave radiation. Some of these fluctuations take the form of high Q resonances. The time dependent characteristics of these responses were studied by modulating the microwaves with a pulse signal. The measurements show that there is a shift in the centre frequency of these high Q resonances when the pulse time is varied. The measured lifetime of these resonances is high enough to be useful for non-classical information processing.

Role of interface dipole in metal gate/high-k effective work function modulation by aluminum incorporation

The interface dipole and its role in the effective work function (EWF) modulation by Al incorporation are investigated. Our study shows that the interface dipole located at the high-k/SiO2 interface causes an electrostatic potential difference across the metal/high-k interface, which significantly shifts the band alignment between the metal and high-k, consequently modulating the EWF. The electrochemical potential equalization and electrostatic potential methods are used to evaluate the interface dipole and its contribution. The calculated EWF modulation agrees with experimental data and can provide insight to the control of EWF in future pMOS technology.

Optimisation of source/drain extension region profile for suppression of short channel effects in sub-50 nm DG SOI MOSFETs with high- k gate dielectrics

Novel technology dependent scaling parameters i.e. spacer to gradient ratio and effective channel length (Leff) are proposed for source/drain engineered DG MOSFET, and their significance in minimizing short channel effects (SCES) in high-k gate dielectrics is discussed in detail. Results show that a high-k dielectric should be associated with a higher spacer to gradient ratio to minimise SCEs The analytical model agrees with simulated data over the entire range of spacer widths, doping gradients, high-k gate dielectrics and effective channel lengths.

GIDL behavior of p- and n-MuGFET devices with different TiN metal gate thickness and high-k gate dielectrics

This work studies the gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal gate thickness and high-k gate dielectrics. As a result of this analysis, it was observed that a thinner TiN metal gate showed a larger GIDL due to the different gate oxide thickness and a reduced metal gate work function. In addition, replacing SiON by a high-k dielectric (HfSiON) results for nMuGFETs in a decrease of the GIDL On the other hand, the impact of the gate dielectric on the GIDL for p-channel MuGFETs is marginal. The effect of the channel width was also studied, whereby narrow fin devices exhibit a reduced GIDL current in spite of the larger vertical electric field expected for these devices. Finally, comparing the effect of the channel type, an enhanced GIDL current for pMuGFET devices was observed. (C) 2011 Elsevier Ltd. All rights reserved.

Dielectric investigation of high-k yttrium copper titanate thin films

We report on the first dielectric investigation of high-k yttrium copper titanate thin films, which were demonstrated to be very promising for nanoelectronics applications. The dielectric constant of these films is found to vary from 100 down to 24 (at 100 kHz) as a function of deposition conditions, namely oxygen pressure and film thickness. The physical origin of such variation was investigated in the framework of universal dielectric response and Cole-Cole relations and by means of voltage dependence studies of the dielectric constant. Surface-related effects and charge hopping polarization processes, strictly dependent on the film microstructure, are suggested to be mainly responsible for the observed dielectric response. In particular, the bulky behaviour of thick films deposited at lower oxygen pressure evolves towards a more complex and electrically heterogeneous structure when either the thickness decreases down to 50 nm or the films are grown under high oxygen pressure.

Dielectric investigation of high-k yttrium copper titanate thin films

We report on the first dielectric investigation of high-k yttrium copper titanate thin films, which were demonstrated to be very promising for nanoelectronics applications. The dielectric constant of these films is found to vary from 100 down to 24 (at 100 kHz) as a function of deposition conditions, namely oxygen pressure and film thickness. The physical origin of such variation was investigated in the framework of universal dielectric response and Cole-Cole relations and by means of voltage dependence studies of the dielectric constant. Surface-related effects and charge hopping polarization processes, strictly dependent on the film microstructure, are suggested to be mainly responsible for the observed dielectric response. In particular, the bulky behaviour of thick films deposited at lower oxygen pressure evolves towards a more complex and electrically heterogeneous structure when either the thickness decreases down to 50 nm or the films are grown under high oxygen pressure.

Properties of high k gate dielectric gadolinium oxide deposited on Si(100) by dual ion beam deposition (DIBD)

Gadolinium oxide thin films have been prepared on silicon (100) substrates with a low-energy dual ion-beam epitaxial technique. Substrate temperature was an important factor to affect the crystal structures and textures in an ion energy range of 100-500 eV. The films had a monoclinic Gd2O3 structure with preferred orientation ((4) over bar 02) at low substrate temperatures. When the substrate temperature was increased, the orientation turned to (202), and finally, the cubic structure appeared at the substrate temperature of 700 degreesC, which disagreed with the previous report because of the ion energy. The AES studies found that Gadolinium oxide shared Gd2O3 structures, although there were a lot of oxygen deficiencies in the films, and the XPS results confirmed this. AFM was also used to investigate the surface images of the samples. Finally, the electrical properties were presented. (C) 2004 Elsevier B.V. All rights reserved.