Feasibility and electromagnetic compatibility study of the ClearPEM front-end electronics for simultaneous PET-MR imaging

In this work we present a first feasibility study of the ClearPEM technology for simultaneous PET-MR imaging. The mutual electromagnetic interference (EMI) effects between both systems were evaluated on a 7 T magnet by characterizing the response behavior of the ClearPEM detectors and front-end electronics to pulsed RF power and switched magnetic field gradients; and by analyzing the MR system performance degradation from noise pickup into the RF receiver chain, and from magnetic susceptibility artifacts caused by PET front-end materials.

Modeling Front End Electronics for a Gas Electron Multiplier Detector

The Large Hadron Collider (LHC) in The European Organization for Nuclear Research (CERN) will have a Long Shutdown sometime during 2017 or 2018. During this time there will be maintenance and a possibility to install new detectors. After the shutdown the LHC will have a higher luminosity. A promising new type of detector for this high luminosity phase is a Triple-GEM detector. During the shutdown these detectors will be installed at the Compact Muon Solenoid (CMS) experiment. The Triple-GEM detectors are now being developed at CERN and alongside also a readout ASIC chip for the detector. In this thesis a simulation model was developed for the ASICs analog front end. The model will help to carry out more extensive simulations and also simulate the whole chip before the whole design is finished. The proper functioning of the model was tested with simulations, which are also presented in the thesis.

A novel single-phase hpf hybrid rectifier suitable for front-end trolleybus systems

This paper proposal presents the development and the experimental analysis of a new single-phase hybrid rectifier structure with high power factor (PF) and low harmonic distortion of current (THDI), suitable for application in traction systems of electrical vehicles pulled by electrical motors (trolleybus), which are powered by urban distribution network. This front-end rectifier structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The proposed structure is composed by an ordinary single-phase diode rectifier with parallel connection of a switched converter. It is outlined that the switched converter is capable of composing the input line current waveform assuring high power factor (HPF) and low THDI, as well as ordinary front-end converter. However, the power rating of the switched converter is about 34% of the total output power, assuring robustness and reliability. Therefore, the proposed structure was named single-phase HPF hybrid rectifier. A prototype rated at 15kW was developed and analyzed in laboratory. It was found that the input line current harmonic spectrum is in accordance with the harmonic limits imposed by IEC61000-3-4. The principle of operation, the mathematical analysis, the PWM control strategy, and experimental results of a 15kW prototype are also presented in this paper. © 2009 IEEE.

Noise and PSRR improvement technique for TPC readout front-end in CMOS. technology.

ALICE is one of four major experiments of particle accelerator LHC installed in the European laboratory CERN. The management committee of the LHC accelerator has just approved a program update for this experiment. Among the upgrades planned for the coming years of the ALICE experiment is to improve the resolution and tracking efficiency maintaining the excellent particles identification ability, and to increase the read-out event rate to 100 KHz. In order to achieve this, it is necessary to update the Time Projection Chamber detector (TPC) and Muon tracking (MCH) detector modifying the read-out electronics, which is not suitable for this migration. To overcome this limitation the design, fabrication and experimental test of new ASIC named SAMPA has been proposed . This ASIC will support both positive and negative polarities, with 32 channels per chip and continuous data readout with smaller power consumption than the previous versions. This work aims to design, fabrication and experimental test of a readout front-end in 130nm CMOS technology with configurable polarity (positive/negative), peaking time and sensitivity. The new SAMPA ASIC can be used in both chambers (TPC and MCH). The proposed front-end is composed of a Charge Sensitive Amplifier (CSA) and a Semi-Gaussian shaper. In order to obtain an ASIC integrating 32 channels per chip, the design of the proposed front-end requires small area and low power consumption, but at the same time requires low noise. In this sense, a new Noise and PSRR (Power Supply Rejection Ratio) improvement technique for the CSA design without power and area impact is proposed in this work. The analysis and equations of the proposed circuit are presented which were verified by electrical simulations and experimental test of a produced chip with 5 channels of the designed front-end. The measured equivalent noise charge was <550e for 30mV/fC of sensitivity at a input capacitance of 18.5pF. The total core area of the front-end was 2300?m × 150?m, and the measured total power consumption was 9.1mW per channel.

Integrating technology roadmapping and portfolio management at the front-end of new product development

Many authors point out that the front-end of new product development (NPD) is a critical success factor in the NPD process and that numerous companies face difficulties in carrying it out appropriately. Therefore, it is important to develop new theories and proposals that support the effective implementation of this earliest phase of NPD. This paper presents a new method to support the development of front-end activities based on integrating technology roadmapping (TRM) and project portfolio management (PPM). This new method, called the ITP Method, was implemented at a small Brazilian high-tech company in the nanotechnology industry to explore the integration proposal. The case study demonstrated that the ITP Method provides a systematic procedure for the fuzzy front-end and integrates innovation perspectives into a single roadmap, which allows for a better alignment of business efforts and communication of product innovation goals. Furthermore, the results indicated that the method may also improve quality, functional integration and strategy alignment. (C) 2010 Elsevier Inc. All rights reserved.

Making Fedora easier to implement with Fez: A free open source content model and workflow management front-end to Fedora

The University of Queensland, Australia has developed Fez, a world-leading user-interface and management system for Fedora-based institutional repositories, which bridges the gap between a repository and users. Christiaan Kortekaas, Andrew Bennett and Keith Webster will review this open source software that gives institutions the power to create a comprehensive repository solution without the hassle..

RF Receiver Front End for 28.5 GHz Applications on a 70 GHz F-T SiGe BiCMOS Process

This article presents the design and test of a receiver front end aimed at LMDS applications at 28.5 GHz. It presents a system-level design after which the receiver was designed. The receiver comprises an LNA, quadrature mixer and quadrature local oscillator. Experimental results at 24 GHz center frequency show a conversion voltage gain of 15 dB and conversion noise figure of 14 5 dB. The receiver operates from a 2 5 V power supply with a total current consumption of 31 mA.

Homograph ambiguity resolution in front-end design for portuguese TTS systems

In this paper, a module for homograph disambiguation in Portuguese Text-to-Speech (TTS) is proposed. This module works with a part-of-speech (POS) parser, used to disambiguate homographs that belong to different parts-of-speech, and a semantic analyzer, used to disambiguate homographs which belong to the same part-of-speech. The proposed algorithms are meant to solve a significant part of homograph ambiguity in European Portuguese (EP) (106 homograph pairs so far). This system is ready to be integrated in a Letter-to-Sound (LTS) converter. The algorithms were trained and tested with different corpora. The obtained experimental results gave rise to 97.8% of accuracy rate. This methodology is also valid for Brazilian Portuguese (BP), since 95 homographs pairs are exactly the same as in EP. A comparison with a probabilistic approach was also done and results were discussed.

A low-voltage RF-CMOS receiver front-end for a wireless fall detection microsystem

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e de Computadores, pela Universidade Nova de Ciências e Tecnologia

Gated Geiger mode avalanche photodiode pixels with integrated readout electronics for low noise photon detection

Avalanche photodiodes operated in the Geiger mode offer a high intrinsic gain as well as an excellent timing accuracy. These qualities make the sensor specially suitable for those applications where detectors with high sensitivity and low timing uncertainty are required. Moreover, they are compatible with standard CMOS technologies, allowing sensor and front-end electronics integration within the pixel cell. However, the sensor suffers from high levels of intrinsic noise, which may lead to erroneous results and limit the range of detectable signals. They also increase the amount of data that has to be stored. In this work, we present a pixel based on a Geiger-mode avalanche photodiode operated in the gated mode to reduce the probability to detect noise counts interfering with photon arrival events. The readout circuit is based on a two grounds scheme to enable low reverse bias overvoltages and consequently lessen the dark count rate. Experimental characterization of the fabricated pixel with the HV-AMS 0.35µm standard technology is also presented in this article.

A Generic Framework Architecture for Portal Front End

A modem software development requires quick results and excellent quality, which leads to high demand for reusability in design and implementation of software components. The purpose of this thesis was to design and implement a reusable framework for portal front ends, including common portal features, such as authentication and authorization. The aim was also to evaluate frameworks as components of reuse and compare them to other reuse techniques. As the result of this thesis, a goo'd picture of framework's life cycle, problem domain and the actual implementation process of the framework, was obtained. It was also found out that frameworks fit well to solve recurrent and similar problems in a restricted problem domain. The outcome of this thesis was a prototype of a generic framework and an example application built on it. The implemented framework offered an abstract base for the portal front ends, using object-oriented methods and wellknown design patterns. The example application demonstrated the speed and ease of the application development based on the application frameworks.

Applying Active Front End To Multilevel Inverter

The aim of this work was to make an active front end from IGBTs for a multilevel inverter. The work was done for Mosart II, a long term still ongoing Vacon Oyj project. The purpose of the AFE is to balance the DC-voltage and to put the returning power back to the grid instead of the breaking chopper and the capacitor. With a diode rectifier the bridge only allows power to pass in one direction and the switching times are not controllable. That means the rectifier always takes the highest phase and the phases are always conducting the same 120◦. With an AFE it is possible to actively change the rectifiers switching pattern. A diode bridge also generates much greater losses than an IGBT bridge. With these arguments it is rational to start researching the possibility of an AFE in a multilevel inverter.

Managing the Front End of Innovation in a Networked Company Environment - Combining Strategy, Processes and Systems of Innovation

The objective of the thesis is to enhance the understanding about the management of the front end phases of the innovation process in a networked environment. The thesis approaches the front end of innovation from three perspectives, including the strategy, processes and systems of innovation. The purpose of the use of different perspectives in the thesis is that of providing an extensive systemic view of the front end, and uncovering the complex nature of innovation management. The context of the research is the networked operating environment of firms. The unit of analysis is the firm itself or its innovation processes, which means that this research approaches the innovation networks from the point of view of a firm. The strategy perspective of the thesis emphasises the importance of purposeful innovation management, the innovation strategy of firms. The role of innovation processes is critical in carrying out innovation strategies in practice, supporting the development of organizational routines for innovation, and driving the strategic renewal of companies. The primary focus of the thesis from systems perspective is on idea management systems, which are defined as a part of innovation management systems, and defined for this thesis as any working combination of methodology and tools (manual or IT-supported) that enhance the management of innovations within their early phases. The main contribution of the thesis are the managerial frameworks developed for managing the front end of innovation, which purposefully “wire” the front end of innovation into the strategy and business processes of a firm. The thesis contributes to modern innovation management by connecting the internal and external collaboration networks as foundational elements for successful management of the early phases of innovation processes in a dynamic environment. The innovation capability of a firm is largely defined by its ability to rely on and make use of internal and external collaboration already during the front end activities, which by definition include opportunity identification and analysis, idea generation, profileration and selection, and concept definition. More specifically, coordination of the interfaces between these activities, and between the internal and external innovation environments of a firm is emphasised. The role of information systems, in particular idea management systems, is to support and delineate the innovation-oriented behaviour and interaction of individuals and organizations during front end activities. The findings and frameworks developed in the thesis can be used by companies for purposeful promotion of their front end processes. The thesis provides a systemic strategy framework for managing the front end of innovation – not as a separate process, but as an elemental bundle ofactivities that is closely linked to the overall innovation process and strategy of a firm in a distributed environment. The theoretical contribution of the thesis relies on the advancement of the open innovation paradigm in the strategic context of a firm within its internal and external innovation environments. This thesis applies the constructive research approach and case study methodology to provide theoretically significant results, which are also practically beneficial.