Optimization and finite element analysis for reliable electronic packaging

This paper demonstrates a modeling and design approach that couples computational mechanics techniques with numerical optimisation and statistical models for virtual prototyping and testing in different application areas concerning reliability of eletronic packages. The integrated software modules provide a design engineer in the electronic manufacturing sector with fast design and process solutions by optimizing key parameters and taking into account complexity of certain operational conditions. The integrated modeling framework is obtained by coupling the multi-phsyics finite element framework - PHYSICA - with the numerical optimisation tool - VisualDOC into a fully automated design tool for solutions of electronic packaging problems. Response Surface Modeling Methodolgy and Design of Experiments statistical tools plus numerical optimisaiton techniques are demonstrated as a part of the modeling framework. Two different problems are discussed and solved using the integrated numerical FEM-Optimisation tool. First, an example of thermal management of an electronic package on a board is illustrated. Location of the device is optimized to ensure reduced junction temperature and stress in the die subject to certain cooling air profile and other heat dissipating active components. In the second example thermo-mechanical simulations of solder creep deformations are presented to predict flip-chip reliability and subsequently used to optimise the life-time of solder interconnects under thermal cycling.

Collaborating components in mesh-based electronic packaging

From the model geometry creation to the model analysis, the stages in between such as mesh generation are the most manpower intensive phase in a mesh-based computational mechanics simulation process. On the other hand the model analysis is the most computing intensive phase. Advanced computational hardware and software have significantly reduced the computing time - and more importantly the trend is downward. With the kind of models envisaged coming, which are larger, more complex in geometry and modelling, and multiphysics, there is no clear trend that the manpower intensive phase is to decrease significantly in time - in the present way of operation it is more likely to increase with model complexity. In this paper we address this dilemma in collaborating components for models in electronic packaging application.

Electronic packaging and reduction in modelling time using domain decomposition

The domain decomposition method is directed to electronic packaging simulation in this article. The objective is to address the entire simulation process chain, to alleviate user interactions where they are heavy to mechanization by component approach to streamline the model simulation process.

Numerical Modelling for Electronic Packaging - Future Requirements

The fabrication, assembly and testing of electronic packaging can involve complex interactions between physical phenomena such as temperature, fluid flow, electromagnetics, and stress. Numerical modelling and optimisation tools are key computer-aided-engineering technologies that aid design engineers. This paper discusses these technologies and there future developments.

Impact of assembly process technologies on electronic packaging materials

Assembly processes used to bond components to printed circuit boards can have a significant impact on these boards and the final packaged component. Traditional approaches to bonding components to printed circuit boards results in heat being applied across the whole board assembly. This can lead to board warpage and possibly high residual stresses. Another approach discussed in this paper is to use Variable Frequency Microwave (VFM) heating to cure adhesives and underfills and bond components to printed circuit boards. In terms of energy considerations the use of VFM technology is much more cost effective compared to convection/radiation heating. This paper will discuss the impact of traditional reflow based processes on flexible substrates and it will demonstrate the possible advantages of using localised variable frequency microwave heating to cure materials in an electronic package.

Advanced Adhesion Strength Testing Methods of Thin Film Multilayers in Electronic Packaging Systems

With the continued miniaturization and increasing performance of electronic devices, new technical challenges have arisen. One such issue is delamination occurring at critical interfaces inside the device. This major reliability issue can occur during the manufacturing process or during normal use of the device. Proper evaluation of the adhesion strength of critical interfaces early in the product development cycle can help reduce reliability issues and time-to-market of the product. However, conventional adhesion strength testing is inherently limited in the face of package miniaturization, which brings about further technical challenges to quantify design integrity and reliability. Although there are many different interfaces in today's advanced electronic packages, they can be generalized into two main categories: 1) rigid to rigid connections with a thin flexible polymeric layer in between, or 2) a thin film membrane on a rigid structure. Knowing that every technique has its own advantages and disadvantages, multiple testing methods must be enhanced and developed to be able to accommodate all the interfaces encountered for emerging electronic packaging technologies. For evaluating the adhesion strength of high adhesion strength interfaces in thin multilayer structures a novel adhesion test configuration called “single cantilever adhesion test (SCAT)” is proposed and implemented for an epoxy molding compound (EMC) and photo solder resist (PSR) interface. The test method is then shown to be capable of comparing and selecting the stronger of two potential EMC/PSR material sets. Additionally, a theoretical approach for establishing the applicable testing domain for a four-point bending test method was presented. For evaluating polymeric films on rigid substrates, major testing challenges are encountered for reducing testing scatter and for factoring in the potentially degrading effect of environmental conditioning on the material properties of the film. An advanced blister test with predefined area test method was developed that considers an elasto-plastic analytical solution and implemented for a conformal coating used to prevent tin whisker growth. The advanced blister testing with predefined area test method was then extended by employing a numerical method for evaluating the adhesion strength when the polymer’s film properties are unknown.

Electronic Packaging of Paper-Based Anisotropic Magnetoresistive Sensors

This report investigates adaptations of electronic packaging methods used to create stacks of these sensors. Four methods were developed and tested to determine the best option in terms of mechanical stability and electrical conductivity of the system. For the first method, a stack is created by way of through paper vias (TPVs), a hole that is cut in the pads of the sensors and then filled with electrically conductive adhesive through the openings on the two sensors to be joined. The second method is called mechanical caulking and connects sensors through pads which have been lined with copper tape backed with conductive adhesive. The connection is created with a small copper rivet which is flattened in place by compressive force. The third method is the stitching method which is inspired by sewing of fabric. A pattern of thin copper wire is stitched on the pad of a sensor that is lined with copper tape backed with conductive adhesive. The wire is then stitched through a second sensor that is treated similarly with copper tape and the stack receives the same pattern through the two layers as was applied to the first sensor alone. The final method is the collapsed daisy chain which is the linear connection of sensors to their neighboring sensors via copper tape backed with conductive adhesive. The row of sensors is then collapsed in an alternating orientation into a single stack.

Analytical solutions for heat transfer during cyclic melting and freezing of a phase change material used in electronic or electrical packaging

In this paper we develop an analytical heat transfer model, which is capable of analyzing cyclic melting and solidification processes of a phase change material used in the context of electronics cooling systems. The model is essentially based on conduction heat transfer, with treatments for convection and radiation embedded inside. The whole solution domain is first divided into two main sub-domains, namely, the melting sub-domain and the solidification sub-domain. Each sub-domain is then analyzed for a number of temporal regimes. Accordingly, analytical solutions for temperature distribution within each subdomain are formulated either using a semi-infinity consideration, or employing a method of quasi-steady state, depending on the applicability. The solution modules are subsequently united, leading to a closed-form solution for the entire problem. The analytical solutions are then compared with experimental and numerical solutions for a benchmark problem quoted in the literature, and excellent agreements can be observed.

Dielectric Properties of Epoxy-Al2O3 Nanocomposite System for Packaging Applications

In recent times, there has been an ever-growing need for polymer-based multifunctional materials for electronic packaging applications. In this direction, epoxy-Al2O3 nanocomposites at low filler loadings can provide an excellent material option, especially from the point of view of their dielectric properties. This paper reports the dielectric characteristics for such a system, results of which are observed to be interesting, unique, and advantageous as compared to traditionally used microcomposite systems. Nanocomposites are found to display lower values of permittivity/tan delta over a wide frequency range as compared to that of unfilled epoxy. This surprising observation has been attributed to the interaction between the epoxy chains and the nanoparticles, and in this paper this phenomenon is analyzed using a dual layer interface model reported for polymer nanocomposites. As for the other dielectric properties associated with the nanocomposites, the nano-filler loading seems to have a significant effect. The dc resistivity and ac dielectric strength of the nanocomposites were observed to be lower than that of the unfilled epoxy system at the investigated filler loadings, whereas the electrical discharge resistant properties showed a significant enhancement. Further analysis of the results obtained in this paper shows that the morphology of the interface region and its characteristics decide the observed interesting dielectric behaviors.

Response Surface Modeling and Optimisation for Reliable Electronic Products

The aim of integrating computational mechanics (FEA and CFD) and optimization tools is to speed up dramatically the design process in different application areas concerning reliability in electronic packaging. Design engineers in the electronics manufacturing sector may use these tools to predict key design parameters and configurations (i.e. material properties, product dimensions, design at PCB level. etc) that will guarantee the required product performance. In this paper a modeling strategy coupling computational mechanics techniques with numerical optimization is presented and demonstrated with two problems. The integrated modeling framework is obtained by coupling the multi-physics analysis tool PHYSICA - with the numerical optimization package - Visua/DOC into a fuJly automated design tool for applications in electronic packaging. Thermo-mechanical simulations of solder creep deformations are presented to predict flip-chip reliability and life-time under thermal cycling. Also a thermal management design based on multi-physics analysis with coupled thermal-flow-stress modeling is discussed. The Response Surface Modeling Approach in conjunction with Design of Experiments statistical tools is demonstrated and used subsequently by the numerical optimization techniques as a part of this modeling framework. Predictions for reliable electronic assemblies are achieved in an efficient and systematic manner.

Decision support systems for eco-friendly electronic products

This paper discusses an optimisation based decision support system and methodology for electronic packaging and product design and development which is capable of addressing in efficient manner specified environmental, reliability and cost requirements. A study which focuses on the design of a flip-chip package is presented. Different alternatives for the design of the flip-chip package are considered based on existing options for the applied underfill and volume of solder material used to form the interconnects. Variations in these design input parameters have simultaneous effect on package aspects such as cost, environmental impact and reliability. A decision system for the design of the flip-chip that uses numerical optimisation approach is used to identify the package optimal specification which satisfies the imposed requirements. The reliability aspect of interest is the fatigue of solder joints under thermal cycling. Transient nonlinear finite element analysis (FEA) is used to simulate the thermal fatigue damage in solder joints subject to thermal cycling. Simulation results are manipulated within design of experiments and response surface modelling framework to provide numerical model for reliability which can be used to quantify the package reliability. Assessment of the environmental impact of the package materials is performed by using so called Toxic Index (TI). In this paper we demonstrate the evaluation of the environmental impact only for underfill and lead-free solder materials. This evaluation is based on the amount of material per flip-chip package. Cost is the dominant factor in contemporary flip-chip packaging industry. In the optimisation based decision support system for the design of the flip-chip package, cost of materials which varies as a result of variations in the design parameters is considered.

High current density induced damage mechanisms in electronic solder joints: a state-of-the-art review

High current density induced damages such as electromigration in the on-chip interconnection /metallization of Al or Cu has been the subject of intense study over the last 40 years. Recently, because of the increasing trend of miniaturization of the electronic packaging that encloses the chip, electromigration as well as other high current density induced damages are becoming a growing concern for off-chip interconnection where low melting point solder joints are commonly used. Before long, a huge number of publications have been explored on the electromigration issue of solder joints. However, a wide spectrum of findings might confuse electronic companies/designers. Thus, a review of the high current induced damages in solder joints is timely right this moment. We have selected 6 major phenomena to review in this paper. They are (i) electromigration (mass transfer due electron bombardment), (ii) thermomigration (mass transfer due to thermal gradient), (iii) enhanced intermetallic compound growth, (iv) enhanced current crowding, (v) enhanced under bump metallisation dissolution and (vi) high Joule heating and (vii) solder melting. the damage mechanisms under high current stressing in the tiny solder joint, mentioned in the review article, are significant roadblocks to further miniaturization of electronics. Without through understanding of these failure mechanisms by experiments coupled with mathematical modeling work, further miniaturization in electronics will be jeopardized

Characterization of Non-linear Polymer Properties to Predict Process Induced Warpage and Residual Stress of Electronic Packages

Nonlinear thermo-mechanical properties of advanced polymers are crucial to accurate prediction of the process induced warpage and residual stress of electronics packages. The Fiber Bragg grating (FBG) sensor based method is advanced and implemented to determine temperature and time dependent nonlinear properties. The FBG sensor is embedded in the center of the cylindrical specimen, which deforms together with the specimen. The strains of the specimen at different loading conditions are monitored by the FBG sensor. Two main sources of the warpage are considered: curing induced warpage and coefficient of thermal expansion (CTE) mismatch induced warpage. The effective chemical shrinkage and the equilibrium modulus are needed for the curing induced warpage prediction. Considering various polymeric materials used in microelectronic packages, unique curing setups and procedures are developed for elastomers (extremely low modulus, medium viscosity, room temperature curing), underfill materials (medium modulus, low viscosity, high temperature curing), and epoxy molding compound (EMC: high modulus, high viscosity, high temperature pressure curing), most notably, (1) zero-constraint mold for elastomers; (2) a two-stage curing procedure for underfill materials and (3) an air-cylinder based novel setup for EMC. For the CTE mismatch induced warpage, the temperature dependent CTE and the comprehensive viscoelastic properties are measured. The cured cylindrical specimen with a FBG sensor embedded in the center is further used for viscoelastic property measurements. A uni-axial compressive loading is applied to the specimen to measure the time dependent Young’s modulus. The test is repeated from room temperature to the reflow temperature to capture the time-temperature dependent Young’s modulus. A separate high pressure system is developed for the bulk modulus measurement. The time temperature dependent bulk modulus is measured at the same temperatures as the Young’s modulus. The master curve of the Young’s modulus and bulk modulus of the EMC is created and a single set of the shift factors is determined from the time temperature superposition. The supplementary experiments are conducted to verify the validity of the assumptions associated with the linear viscoelasticity. The measured time-temperature dependent properties are further verified by a shadow moiré and Twyman/Green test.

Photonic packaging: transforming silicon photonic integrated circuits into photonic devices

Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.

Nonlinear analysis of plastic ball grid array solder joints

A nonlinear finite element analysis was carried out to investigate the viscoplastic deformation of solder joints in a ball grid array (BGA) package under temperature cycle. The effects of constraint on print circuit board (PCB) and stiffness of substrate on the deformation behaviour of the solder joints were also studied. A relative damage stress was adopted to analyze the potential failure sites in the solder joints. The results indicated that high inelastic strain and strain energy density were developed in the joints close to the package center. On the other hand, high constraint and high relative damage stress were associated with the joint closest to the edge of the silicon chip. The joint closest to the edge of the silicon chip was regarded as the most susceptible failure site if cavitation instability is the dominant failure mechanism. Increase the external constraint on the print circuit board (PCB) causes a slight increase in stress triaxiality (m/eq) and relative damage stress in the joint closest to the edge of silicon die. The relative damage stress is not sensitive to the Young’s modulus of the substrate.