Redesigning the design process through interactive simulation: A case study of life-cycle engineering in jet engine conceptual design

Many aerospace companies are currently making the transition to providing fully-integrated product-service offerings in which their products are designed from the outset with life-cycle considerations in mind. Based on a case study at Rolls-Royce, Civil Aerospace, this paper demonstrates how an interactive approach to process simulation can be used to support the redesign of existing design processes in order to incorporate life-cycle engineering (LCE) considerations. The case study provides insights into the problems of redesigning the conceptual stages of a complex, concurrent engineering design process and the practical value of process simulation as a tool to support the specification of process changes in the context of engineering design. The paper also illustrates how development of a simulation model can provide significant benefit to companies through the understanding of process behaviour that is gained through validating the behaviour of the model using different design and iteration scenarios. Keywords: jet engine design; life-cycle engineering; LCE; process change; design process simulation; applied signposting model; ASM. Copyright © 2011 Inderscience Enterprises Ltd.

Modeling resource management in the building design process by information constraint Petri nets

The effect of resource management on the building design process directly influences the development cycle time and success of construction projects. This paper presents the information constraint net (ICN) to represent the complex information constraint relations among design activities involved in the building design process. An algorithm is developed to transform the information constraints throughout the ICN into a Petri net model. A resource management model is developed using the ICN to simulate and optimize resource allocation in the design process. An example is provided to justify the proposed model through a simulation analysis of the CPN Tools platform in the detailed structural design. The result demonstrates that the proposed approach can obtain the resource management and optimization needed for shortening the development cycle and optimal allocation of resources.

Daylighting design and simulation : ease of use analysis of digital tools for architects

Good daylighting design in buildings not only provides a comfortable luminous environment, but also delivers energy savings and comfortable and healthy environments for building occupants. Yet, there is still no consensus on how to assess what constitutes good daylighting design. Currently amongst building performance guidelines, Daylighting factors (DF) or minimum illuminance values are the standard; however, previous research has shown the shortcomings of these metrics. New computer software for daylighting analysis contains new more advanced metrics for daylighting (Climate Base Daylight Metrics-CBDM). Yet, these tools (new metrics or simulation tools) are not currently understood by architects and are not used within architectural firms in Australia. A survey of architectural firms in Brisbane showed the most relevant tools used by industry. The purpose of this paper is to assess and compare these computer simulation tools and new tools available architects and designers for daylighting. The tools are assessed in terms of their ease of use (e.g. previous knowledge required, complexity of geometry input, etc.), efficiency (e.g. speed, render capabilities, etc.) and outcomes (e.g. presentation of results, etc. The study shows tools that are most accessible for architects, are those that import a wide variety of files, or can be integrated into the current 3d modelling software or package. These software’s need to be able to calculate for point in times simulations, and annual analysis. There is a current need in these software solutions for an open source program able to read raw data (in the form of spreadsheets) and show that graphically within a 3D medium. Currently, development into plug-in based software’s are trying to solve this need through third party analysis, however some of these packages are heavily reliant and their host program. These programs however which allow dynamic daylighting simulation, which will make it easier to calculate accurate daylighting no matter which modelling platform the designer uses, while producing more tangible analysis today, without the need to process raw data.

Circuit design and simulation of a CMOS-based preamplifier for brain neural signals

A novel CMOS-based preamplifier for amplifying brain neural signal obtained by scalp electrodes in brain-computer interface (BCI) is presented in this paper. By means of constructing effective equivalent input circuit structure of the preamplifier, two capacitors of 5 pF are included to realize the DC suppression compared to conventional preamplifiers. Then this preamplifier is designed and simulated using the standard 0.6 mu m MOS process technology model parameters with a supply voltage of 5 volts. With differential input structures adopted, simulation results of the preamplifier show that the input impedance amounts to more than 2 Gohm with brain neural signal frequency of 0.5 Hz-100 Hz. The equivalent input noise voltage is 18 nV/Hz(1/2). The common mode rejection ratio (CMRR) of 112 dB and the open-loop differential gain of 90 dB are achieved.

Quench Protection Design and Simulation of a 7 Tesla Superconducting Magnet

A 7 Tesla superconducting magnet with a clear warm bore of 156 mm in diameter has been developed for Lanzhou Penning Trap at the Institute of Modern Physics for high precision mass measurement. The magnet is comprised of 9 solenoid coils and operates in persistent mode with a total energy of 2.3 MJ. Due to the considerable amount of energy stored during persistent mode operation, the quench protection system is very important when designing and operating the magnet. A passive protection system based on a subdivided scheme is adopted to protect the superconducting magnet from damage caused by quenching. Cold diodes and resistors are put across the subdivision to reduce both the voltage and temperature hot spots. Computational simulations have been carried in Opera-quench. The designed quench protection circuit and the finite element method model for quench simulations are described; the time changing of temperature, voltage and current decay during the quench process is also analysed.

Risk mitigation framework for a robust design process

The increasing complexity of new manufacturing processes and the continuously growing range of fabrication options mean that critical decisions about the insertion of new technologies must be made as early as possible in the design process. Mitigating the technology risks under limited knowledge is a key factor and major requirement to secure a successful development of the new technologies. In order to address this challenge, a risk mitigation methodology that incorporates both qualitative and quantitative analysis is required. This paper outlines the methodology being developed under a major UK grand challenge project - 3D-Mintegration. The main focus is on identifying the risks through identification of the product key characteristics using a product breakdown approach. The assessment of the identified risks uses quantification and prioritisation techniques to evaluate and rank the risks. Traditional statistical process control based on process capability and six sigma concepts are applied to measure the process capability as a result of the risks that have been identified. This paper also details a numerical approach that can be used to undertake risk analysis. This methodology is based on computational framework where modelling and statistical techniques are integrated. Also, an example of modeling and simulation technique is given using focused ion beam which is among the investigated in the project manufacturing processes.

The use of process simulation methods in support of organisational learning in availability contracting

Traditional business models in the aerospace industry are based on a conventional supplier to customer relationship based on the design, manufacture and subsequent delivery of the physical product. Service provision, from the manufacturer's perspective, is typically limited to the supply of procedural documentation and the provision of spare parts to the end user as the product passes through the latter stages of its intended lifecycle. Challenging economic and political conditions have resulted in end users re-structuring their core business activities, particularly in the defence sector. This has resulted in the need for original equipment manufacturers (OEMs) to integrate and manage support service activities in partnership with the customer to deliver platform availability. This improves the probability of commercial sustainability for the OEM through shared operational risks while reducing the cost of platform ownership for the customer. The need for OEMs to evolve their design, manufacture and supply strategies by focusing on customer requirements has revealed a need for reconstruction of traditional internal behaviours and design methodologies. Application of organisational learning is now a well recognised principle for innovative companies to achieve long term growth and sustained technical development, and hence, greater market command. It focuses on the process by which the organisation's knowledge and value base changes, leading to improved problem solving ability and capacity for action. From the perspective of availability contracting, knowledge and the processes by which it is generated, used and retained, become primary assets within the learning organisation. This paper will introduce the application of digital methods to asset management by demonstrating how the process of learning can benefit from a digital approach, how product and process design can be integrated within a virtual framework and finally how the approach can be applied in a service context.

Design and simulation of a low voltage wide band RF MEMS switch

This paper presents design of an electrostatic wide band shunt capacitive coupling RF MEMS switch with low actuation voltage. The key factors of the RF MEMS switch design are the proper scattering parameters, low actuation voltage, and the cost of the fabrication process. An overview of the recent low actuation voltage RFMEMS switches has been presented. These designs still suffer from the complexity of process, lack of reliability, limitation of frequency band, and process cost. RF characteristics of a shunt RF MEMS switches are specified mostly by coupling capacitor in upstate position of the membrane Cu. This capacitor is in trade-off with actuation voltage. In this work, the capacitor is eliminated by using two short high impedance transmission lines, at the input and output of the switch. The simulation results demonstrate an improvement in the RF characteristic of the switch.

Continuous pasteurization of egg yolk: Thermophysical properties and process simulation

This article presents empirical correlations to predict the density, specific heat, thermal conductivity and rheological power-law parameters of liquid egg yolk over a temperature range compatible with its industrial thermal processing (0-61 C). Moreover, a mathematical model for a pasteurizer that takes into account the spatial variation of the overall heat transfer coefficient throughout the plate heat exchanger is presented, as are two of its simplified forms. The obtained correlations of thermophysical properties are applied for the simulation of the egg yolk pasteurization, and the obtained temperature profiles are used for evaluating the extent of thermal inactivation. A detailed simulation example shows that there is a considerable deviation between the designed level of heat treatment and that this is predicted through process simulation. It is shown that a reliable mathematical model, combined with specialized thermophysical property correlations, provide a more accurate design of the pasteurization equipment that ensures effective inactivation, while preserving nutritional and sensorial characteristics.

Design and Simulation of Deep Nanometer SRAM Cells under Energy, Mismatch, and Radiation Constraints

La fiabilidad está pasando a ser el principal problema de los circuitos integrados según la tecnología desciende por debajo de los 22nm. Pequeñas imperfecciones en la fabricación de los dispositivos dan lugar ahora a importantes diferencias aleatorias en sus características eléctricas, que han de ser tenidas en cuenta durante la fase de diseño. Los nuevos procesos y materiales requeridos para la fabricación de dispositivos de dimensiones tan reducidas están dando lugar a diferentes efectos que resultan finalmente en un incremento del consumo estático, o una mayor vulnerabilidad frente a radiación. Las memorias SRAM son ya la parte más vulnerable de un sistema electrónico, no solo por representar más de la mitad del área de los SoCs y microprocesadores actuales, sino también porque las variaciones de proceso les afectan de forma crítica, donde el fallo de una única célula afecta a la memoria entera. Esta tesis aborda los diferentes retos que presenta el diseño de memorias SRAM en las tecnologías más pequeñas. En un escenario de aumento de la variabilidad, se consideran problemas como el consumo de energía, el diseño teniendo en cuenta efectos de la tecnología a bajo nivel o el endurecimiento frente a radiación. En primer lugar, dado el aumento de la variabilidad de los dispositivos pertenecientes a los nodos tecnológicos más pequeños, así como a la aparición de nuevas fuentes de variabilidad por la inclusión de nuevos dispositivos y la reducción de sus dimensiones, la precisión del modelado de dicha variabilidad es crucial. Se propone en la tesis extender el método de inyectores, que modela la variabilidad a nivel de circuito, abstrayendo sus causas físicas, añadiendo dos nuevas fuentes para modelar la pendiente sub-umbral y el DIBL, de creciente importancia en la tecnología FinFET. Los dos nuevos inyectores propuestos incrementan la exactitud de figuras de mérito a diferentes niveles de abstracción del diseño electrónico: a nivel de transistor, de puerta y de circuito. El error cuadrático medio al simular métricas de estabilidad y prestaciones de células SRAM se reduce un mínimo de 1,5 veces y hasta un máximo de 7,5 a la vez que la estimación de la probabilidad de fallo se mejora en varios ordenes de magnitud. El diseño para bajo consumo es una de las principales aplicaciones actuales dada la creciente importancia de los dispositivos móviles dependientes de baterías. Es igualmente necesario debido a las importantes densidades de potencia en los sistemas actuales, con el fin de reducir su disipación térmica y sus consecuencias en cuanto al envejecimiento. El método tradicional de reducir la tensión de alimentación para reducir el consumo es problemático en el caso de las memorias SRAM dado el creciente impacto de la variabilidad a bajas tensiones. Se propone el diseño de una célula que usa valores negativos en la bit-line para reducir los fallos de escritura según se reduce la tensión de alimentación principal. A pesar de usar una segunda fuente de alimentación para la tensión negativa en la bit-line, el diseño propuesto consigue reducir el consumo hasta en un 20 % comparado con una célula convencional. Una nueva métrica, el hold trip point se ha propuesto para prevenir nuevos tipos de fallo debidos al uso de tensiones negativas, así como un método alternativo para estimar la velocidad de lectura, reduciendo el número de simulaciones necesarias. Según continúa la reducción del tamaño de los dispositivos electrónicos, se incluyen nuevos mecanismos que permiten facilitar el proceso de fabricación, o alcanzar las prestaciones requeridas para cada nueva generación tecnológica. Se puede citar como ejemplo el estrés compresivo o extensivo aplicado a los fins en tecnologías FinFET, que altera la movilidad de los transistores fabricados a partir de dichos fins. Los efectos de estos mecanismos dependen mucho del layout, la posición de unos transistores afecta a los transistores colindantes y pudiendo ser el efecto diferente en diferentes tipos de transistores. Se propone el uso de una célula SRAM complementaria que utiliza dispositivos pMOS en los transistores de paso, así reduciendo la longitud de los fins de los transistores nMOS y alargando los de los pMOS, extendiéndolos a las células vecinas y hasta los límites de la matriz de células. Considerando los efectos del STI y estresores de SiGe, el diseño propuesto mejora los dos tipos de transistores, mejorando las prestaciones de la célula SRAM complementaria en más de un 10% para una misma probabilidad de fallo y un mismo consumo estático, sin que se requiera aumentar el área. Finalmente, la radiación ha sido un problema recurrente en la electrónica para aplicaciones espaciales, pero la reducción de las corrientes y tensiones de los dispositivos actuales los está volviendo vulnerables al ruido generado por radiación, incluso a nivel de suelo. Pese a que tecnologías como SOI o FinFET reducen la cantidad de energía colectada por el circuito durante el impacto de una partícula, las importantes variaciones de proceso en los nodos más pequeños va a afectar su inmunidad frente a la radiación. Se demuestra que los errores inducidos por radiación pueden aumentar hasta en un 40 % en el nodo de 7nm cuando se consideran las variaciones de proceso, comparado con el caso nominal. Este incremento es de una magnitud mayor que la mejora obtenida mediante el diseño de células de memoria específicamente endurecidas frente a radiación, sugiriendo que la reducción de la variabilidad representaría una mayor mejora. ABSTRACT Reliability is becoming the main concern on integrated circuit as the technology goes beyond 22nm. Small imperfections in the device manufacturing result now in important random differences of the devices at electrical level which must be dealt with during the design. New processes and materials, required to allow the fabrication of the extremely short devices, are making new effects appear resulting ultimately on increased static power consumption, or higher vulnerability to radiation SRAMs have become the most vulnerable part of electronic systems, not only they account for more than half of the chip area of nowadays SoCs and microprocessors, but they are critical as soon as different variation sources are regarded, with failures in a single cell making the whole memory fail. This thesis addresses the different challenges that SRAM design has in the smallest technologies. In a common scenario of increasing variability, issues like energy consumption, design aware of the technology and radiation hardening are considered. First, given the increasing magnitude of device variability in the smallest nodes, as well as new sources of variability appearing as a consequence of new devices and shortened lengths, an accurate modeling of the variability is crucial. We propose to extend the injectors method that models variability at circuit level, abstracting its physical sources, to better model sub-threshold slope and drain induced barrier lowering that are gaining importance in FinFET technology. The two new proposed injectors bring an increased accuracy of figures of merit at different abstraction levels of electronic design, at transistor, gate and circuit levels. The mean square error estimating performance and stability metrics of SRAM cells is reduced by at least 1.5 and up to 7.5 while the yield estimation is improved by orders of magnitude. Low power design is a major constraint given the high-growing market of mobile devices that run on battery. It is also relevant because of the increased power densities of nowadays systems, in order to reduce the thermal dissipation and its impact on aging. The traditional approach of reducing the voltage to lower the energy consumption if challenging in the case of SRAMs given the increased impact of process variations at low voltage supplies. We propose a cell design that makes use of negative bit-line write-assist to overcome write failures as the main supply voltage is lowered. Despite using a second power source for the negative bit-line, the design achieves an energy reduction up to 20% compared to a conventional cell. A new metric, the hold trip point has been introduced to deal with new sources of failures to cells using a negative bit-line voltage, as well as an alternative method to estimate cell speed, requiring less simulations. With the continuous reduction of device sizes, new mechanisms need to be included to ease the fabrication process and to meet the performance targets of the successive nodes. As example we can consider the compressive or tensile strains included in FinFET technology, that alter the mobility of the transistors made out of the concerned fins. The effects of these mechanisms are very dependent on the layout, with transistor being affected by their neighbors, and different types of transistors being affected in a different way. We propose to use complementary SRAM cells with pMOS pass-gates in order to reduce the fin length of nMOS devices and achieve long uncut fins for the pMOS devices when the cell is included in its corresponding array. Once Shallow Trench isolation and SiGe stressors are considered the proposed design improves both kinds of transistor, boosting the performance of complementary SRAM cells by more than 10% for a same failure probability and static power consumption, with no area overhead. While radiation has been a traditional concern in space electronics, the small currents and voltages used in the latest nodes are making them more vulnerable to radiation-induced transient noise, even at ground level. Even if SOI or FinFET technologies reduce the amount of energy transferred from the striking particle to the circuit, the important process variation that the smallest nodes will present will affect their radiation hardening capabilities. We demonstrate that process variations can increase the radiation-induced error rate by up to 40% in the 7nm node compared to the nominal case. This increase is higher than the improvement achieved by radiation-hardened cells suggesting that the reduction of process variations would bring a higher improvement.