A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

Projeto e implementação de um pré-regulador de fator de potência com controlo digital

Hoje em dia as fontes de alimentação possuem correção do fator de potência, devido às diversas normas regulamentares existentes, que introduziram grandes restrições no que respeita à distorção harmónica (THD) e fator de potência (FP). Este trabalho trata da análise, desenvolvimento e implementação de um Pré-Regulador de fator de potência com controlo digital. O controlo digital de conversores com recurso a processamento digital de sinal tem vindo a ser ao longo dos últimos anos, objeto de investigação e desenvolvimento, estando constantemente a surgirem modificações nas topologias existentes. Esta dissertação tem como objetivo estudar e implementar um Pré-Regulador Retificador Boost e o respetivo controlo digital. O controlo do conversor é feito através da técnica dos valores médios instantâneos da corrente de entrada, desenvolvido através da linguagem de descrição de hardware VHDL (VHSIC HDL – Very High Speed Integrated Circuit Hardware Description Language) e implementado num dispositivo FPGA (Field Programmable Gate Array) Spartan-3E. Neste trabalho são apresentadas análises matemáticas, para a obtenção das funções de transferência pertinentes ao projeto dos controladores. Para efetuar este controlo é necessário adquirir os sinais da corrente de entrada, tensão de entrada e tensão de saída. O sinal resultante do módulo de controlo é um sinal de PWM com valor de fator de ciclo variável ao longo do tempo. O projeto é simulado e validado através da plataforma MatLab/Simulink e PSIM, onde são apresentados resultados para o regime permanente e para transitórios da carga e da tensão de alimentação. Finalmente, o Pré-Regulador Retificador Boost controlado de forma digital é implementado em laboratório. Os resultados experimentais são apresentados para validar a metodologia e o projeto desenvolvidos.

Oscillations, phase-of-firing coding, and spike timing-dependent plasticity: an efficient learning scheme

Recent experiments have established that information can be encoded in the spike times of neurons relative to the phase of a background oscillation in the local field potential—a phenomenon referred to as “phase-of-firing coding” (PoFC). These firing phase preferences could result from combining an oscillation in the input current with a stimulus-dependent static component that would produce the variations in preferred phase, but it remains unclear whether these phases are an epiphenomenon or really affect neuronal interactions—only then could they have a functional role. Here we show that PoFC has a major impact on downstream learning and decoding with the now well established spike timing-dependent plasticity (STDP). To be precise, we demonstrate with simulations how a single neuron equipped with STDP robustly detects a pattern of input currents automatically encoded in the phases of a subset of its afferents, and repeating at random intervals. Remarkably, learning is possible even when only a small fraction of the afferents (~10%) exhibits PoFC. The ability of STDP to detect repeating patterns had been noted before in continuous activity, but it turns out that oscillations greatly facilitate learning. A benchmark with more conventional rate-based codes demonstrates the superiority of oscillations and PoFC for both STDP-based learning and the speed of decoding: the oscillation partially formats the input spike times, so that they mainly depend on the current input currents, and can be efficiently learned by STDP and then recognized in just one oscillation cycle. This suggests a major functional role for oscillatory brain activity that has been widely reported experimentally.

An Alternative Approach To Computer System Security Monitoring And Enhancement Through System Call Sequence Analysis

Modern computer systems are plagued with stability and security problems: applications lose data, web servers are hacked, and systems crash under heavy load. Many of these problems or anomalies arise from rare program behavior caused by attacks or errors. A substantial percentage of the web-based attacks are due to buffer overflows. Many methods have been devised to detect and prevent anomalous situations that arise from buffer overflows. The current state-of-art of anomaly detection systems is relatively primitive and mainly depend on static code checking to take care of buffer overflow attacks. For protection, Stack Guards and I-leap Guards are also used in wide varieties.This dissertation proposes an anomaly detection system, based on frequencies of system calls in the system call trace. System call traces represented as frequency sequences are profiled using sequence sets. A sequence set is identified by the starting sequence and frequencies of specific system calls. The deviations of the current input sequence from the corresponding normal profile in the frequency pattern of system calls is computed and expressed as an anomaly score. A simple Bayesian model is used for an accurate detection.Experimental results are reported which show that frequency of system calls represented using sequence sets, captures the normal behavior of programs under normal conditions of usage. This captured behavior allows the system to detect anomalies with a low rate of false positives. Data are presented which show that Bayesian Network on frequency variations responds effectively to induced buffer overflows. It can also help administrators to detect deviations in program flow introduced due to errors.

Trolleybus power system for operation with AC or DC distribution networks

This paper presents the development and experimental analysis of a special input stage converter for a Trolleybus type vehicle allowing its operation in AC (two wires, single-phase) or DC distribution networks. The architecture of proposed input stage converter is composed by five interleaved boost rectifiers operating in discontinuous conduction mode. Furthermore, due to the power lines characteristics, the proposed input power structure can act as AC to DC or as DC to DC converter providing a proper DC output voltage range required to the DC bus. When operation is AC to DC, the converter is capable to provide high power factor with reduced harmonic distortion for the input current, complying with the restrictions imposed by IEC 61000-3-4 standard. Finally, the main experimental results are presented in order to verify the feasibility of the proposed converter, demonstrating the benefits and the possibility for AC feeding system for trolleybus type vehicle. © 2010 IEEE.

Conversor CA-CA de elevado fator de potência para aplicações com geradores de Ímã permanente

This paper proposes and describes a high power factor AC-AC converter for naval applications using Permanent Magnet Generator (PMG). The three-phase output voltages of the PMG vary from 260 Vrms (220 Hz) to 380 Vrms (360 Hz), depending on load conditions. The proposed converter consists of a Y-/ΔY power transformer, which provides electrical isolation between the PMG and remaining stages, and a twelve-pulse uncontrolled rectifier stage directly connected to a single-phase inverter stage, without the use of an intermediary DC-DC topology. This proposal results in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and low total harmonic distortion for the input currents of the converter. The single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120 Vrms, 60 Hz output. The control philosophy, implemented in a digital signal processor (DSP) which also contains protection routines, alows series connections between two identical converters, achieving 240 Vrms, 60 Hz total output voltage. Measured total harmonic distortion for the AC output voltage is lower than 2% and the input power factor is 0.93 at 3.6kW nominal load. © 2010 IEEE.

Resonant (P+RES) controller applied to voltage source inverter with minimum DC link capacitor

Voltage source inverters use large electrolytic capacitors in order to decouple the energy between the utility and the load, keeping the DC link voltage constant. Decreasing the capacitance reduces the distortion in the inverter input current but this also affects the load with low-order harmonics and generate disturbances at the input voltage. This paper applies the P+RES controller to solve the challenge of regulating the output current by means of controlling the magnitude of the current space vector, keeping it constant thus rejecting harmonic disturbances that would otherwise propagate to the load. This work presents a discussion of the switching and control strategy. © 2011 IEEE.

Gesture-based teleoperation using a holonomic robot

This work presents the development and integration of an user interface (UI) framework based on various current input devices that take advantage of our ergonomics. The purpose is to teleoperate a holonomic robot using upper member gestures and postures for studying the suitable of such interfaces when programming and interacting with a mobile robot. As performance vary from UI to UI the framework is focused to be used as a complementary industrial or didactic tool thus, changing how inexperience users tackle their first impressions when working with mobile robots while performing simple gesture-based teleoperation tasks. © 2012 ICROS.

Compatison of S-SI, A-SI and CDTE technologies wording at the same conditions, after the first year of electricity production

Grid connected solar plants are a good opportunity for their use for research as a secondary objective. In countries were feed-in tariffs are still active, it is possible to include in the design of the solar plant elements for its use for research. In the case of the solar plant presented here both objectives are covered. The solar plant of this work is formed by PV modules of three different technologies: Multicrystalline, amorphous and CdTe. In one part of the solar plant, the three technologies are working at the same conditions, not only ambient conditions but also similar voltage and current input to the inverters. Both the commercial and the experimental parts of the solar plant have their own independent inverters with their meters but are finally connected to the same meter to inject. In this work we analyse the results for the first year of operation of the experimental solar plant. Productions of three different technologies in exactly the same conditions are compared and presented. According to the results, all the three technologies have conversion efficiencies dropping when the temperature increases. Amorphous module experiences the lesser reduction, whereas the multicrystalline module suffers the most.

Adaptive Pointing Theory (APT) Artificial Neural Network

The choice value and the testing process against the vigilance parameter, characteristic of ART Neural Network, are merged. Only, a single unique test is required to determine if a committed category node can represent the current input or not. Advantages of APT over ART are: 1-Avoid testing every committed category node before deciding to train a committed category node or a new node must be committed, 2-The vigilance parameter is fixed during training, and 3-The choice value parameter is eliminated.

Modeling back propagating action potential in weakly excitable dendrites of neocortical pyramidal cells.

Simultaneous recordings from the soma and apical dendrite of layer V neocortical pyramidal cells of young rats show that, for any location of current input, an evoked action potential (AP) always starts at the axon and then propagates actively, but decrementally, backward into the dendrites. This back-propagating AP is supported by a low density (-gNa = approximately 4 mS/cm2) of rapidly inactivating voltage-dependent Na+ channels in the soma and the apical dendrite. Investigation of detailed, biophysically constrained, models of reconstructed pyramidal cells shows the following. (i) The initiation of the AP first in the axon cannot be explained solely by morphological considerations; the axon must be more excitable than the soma and dendrites. (ii) The minimal Na+ channel density in the axon that fully accounts for the experimental results is about 20-times that of the soma. If -gNa in the axon hillock and initial segment is the same as in the soma [as recently suggested by Colbert and Johnston [Colbert, C. M. & Johnston, D. (1995) Soc. Neurosci. Abstr. 21, 684.2]], then -gNa in the more distal axonal regions is required to be about 40-times that of the soma. (iii) A backward propagating AP in weakly excitable dendrites can be modulated in a graded manner by background synaptic activity. The functional role of weakly excitable dendrites and a more excitable axon for forward synaptic integration and for backward, global, communication between the axon and the dendrites is discussed.

Brain emotional learning based control of a SDOF structural system with a MR damper

This paper describes the application of a Brain Emotional Learning (BEL) controller to improve the response of a SDOF structural system under an earthquake excitation using a magnetorheological (MR) damper. The main goal is to study the performance of a BEL based semi-active control system to generate the control signal for a MR damper. The proposed approach consists of a two controllers: a primary controller based on a BEL algorithm that determines the desired damping force from the system response and a secondary controller that modifies the input current to the MR damper to generate a reference damping force. A parametric model of the damper is used to predict the damping force based on the piston motion and also the current input. A Simulink model of the structural system is developed to analyze the effectiveness of the semi-active controller. Finally, the numerical results are presented and discussed.

Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.

The impact of input fluctuations on the frequency-current relationships of layer 5 pyramidal neurons in the rat medial prefrontal cortex

The role of irregular cortical firing in neuronal computation is still debated, and it is unclear how signals carried by fluctuating synaptic potentials are decoded by downstream neurons. We examined in vitro frequency versus current (f-I) relationships of layer 5 (L5) pyramidal cells of the rat medial prefrontal cortex (mPFC) using fluctuating stimuli. Studies in the somatosensory cortex show that L5 neurons become insensitive to input fluctuations as input mean increases and that their f-I response becomes linear. In contrast, our results show that mPFC L5 pyramidal neurons retain an increased sensitivity to input fluctuations, whereas their sensitivity to the input mean diminishes to near zero. This implies that the discharge properties of L5 mPFC neurons are well suited to encode input fluctuations rather than input mean in their firing rates, with important consequences for information processing and stability of persistent activity at the network level.