888 resultados para Core utilization


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This work proposes a new three-phase multipulse rectifier based on the delta autotransformer connection with DC-DC Boost stages and constant hysteresis control which has the objective of providing a reliable DC bus for on-board applications, electric motor drives and similars, always considering power quality issues. Thus, the proposal presents 0.99 power factor, 6% harmonic distortions in the currents from the mains and enhanced magnetic core utilization, which results in low weight and volume for the overall converter. The proposed control technique uses the simple constant hysteresis concept, thus leading to a low-cost but effective and reliable strategy. © 2011 IEEE.

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Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.

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Los procesadores multi-core y el multi-threading por hardware permiten aumentar el rendimiento de las aplicaciones. Por un lado, los procesadores multi-core combinan 2 o más procesadores en un mismo chip. Por otro lado, el multi-threading por hardware es una técnica que incrementa la utilización de los recursos del procesador. Este trabajo presenta un análisis de rendimiento de los resultados obtenidos en dos aplicaciones, multiplicación de matrices densas y transformada rápida de Fourier. Ambas aplicaciones se han ejecutado en arquitecturas multi-core que explotan el paralelismo a nivel de thread pero con un modelo de multi-threading diferente. Los resultados obtenidos muestran la importancia de entender y saber analizar el efecto del multi-core y multi-threading en el rendimiento.

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The aim of this paper is to measure the returns to human capital. We use a unique data set consisting of matched employer-employee information. Data on individuals' human capital include a set of 26 competences that capture the utilization of workers' skills in a very detailed way. Thus, we can expand the concept of human capital and discuss the type of skills that are more productive in the workplace and, hence, generate a higher payoff for the workers. The rich information on firm's and workplace characteristics allows us to introduce a broad range of controls and to improve previous research in this field. This paper gives evidence that the returns to generic competences differ depending on the position of the worker in the firm. Only numeracy skills are reward independent of the occupational status of the worker. The level of technology used by the firm in the production process does not directly increase workers’ pay, but it influences the pay-off to some of the competences. JEL Classification: J24, J31

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The thesis presents an overview of third generation of IP telephony. The architecture of 3G IP Telephony and its components are described. The main goal of the thesis is to investigate the interface between the Call Processing Server and Multimedia IP Networks. The interface functionality, proposed protocol stack and a general description are presented in the thesis. To provide useful services, 3G IP Telephony requires a set of control protocols for connection establishment, capabilities exchange and conference control. The Session Initiation Protocol (SIP) and the H.323 are two protocols that meet these needs. In the thesis these two protocols are investigated and compared in terms of Complexity, Extensibility, Scalability, Services, Resource Utilization and Management.

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A district heating system comprises production facilities, a distribution network, and heat consumers. The utilization of new energy metering and reading system (AMR) is increasing constantly in district heating systems. This heuristic study shows how the AMR system can be exploited in finding optimization opportunities in district heating system. In this study, the district heating system is mainly considered from the viewpoint of operational optimization. The focus is on the core processes, heat production and distribution. Three objectives were set to this study. The first one was to examine general optimization opportunities in district heating systems. Second, to figure out the benefits of AMR for general optimization opportunities. Finally, to define a methodology for process improvement endeavors. This study shows, through a case study, the usefulness of AMR in specifying current deficiencies in a district heating system. Based on a literature review, the methodology for the improvement of business processes is presented. Additionally, some issues related to future competitiveness of district heating are concerned. As a conclusion, some optimization objectives are considered more desirable than others. Study shows that AMR is useful in the specification of optimization targets in the district heating system. Further steps in optimization process were not examined in detail. That would seem to be interesting topic for further studies.