930 resultados para Cell design


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The implementation of semiconductor circuits and systems in nano-technology makes it possible to achieve high speed, lower voltage level and smaller area. The unintended and undesirable result of this scaling is that it makes integrated circuits susceptible to soft errors normally caused by alpha particle or neutron hits. These events of radiation strike resulting into bit upsets referred to as single event upsets(SEU), become increasingly of concern for the reliable circuit operation in the field. Storage elements are worst hit by this phenomenon. As we further scale down, there is greater interest in reliability of the circuits and systems, apart from the performance, power and area aspects. In this paper we propose an improved 12T SEU tolerant SRAM cell design. The proposed SRAM cell is economical in terms of area overhead. It is easy to fabricate as compared to earlier designs. Simulation results show that the proposed cell is highly robust, as it does not flip even for a transient pulse with 62 times the Q(crit) of a standard 6T SRAM cell.

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The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

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This paper presents a theoretical analysis of a density measurement cell using an unidimensional model composed by acoustic and electroacoustic transmission lines in order to simulate non-ideal effects. The model is implemented using matrix operations, and is used to design the cell considering its geometry, materials used in sensor assembly, range of liquid sample properties and signal analysis techniques. The sensor performance in non-ideal conditions is studied, considering the thicknesses of adhesive and metallization layers, and the effect of residue of liquid sample which can impregnate on the sample chamber surfaces. These layers are taken into account in the model, and their effects are compensated to reduce the error on density measurement. The results show the contribution of residue layer thickness to density error and its behavior when two signal analysis methods are used. (c) 2006 Elsevier B.V. All rights reserved.

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Phase relations in the system Ca-Pb-O at 1100 K have been determined by equilibrating 18 compositions in the ternary and identifying the phases present in quenched samples by X-ray diffraction and energy dispersive X-ray analysis (EDX). Only one ternary compound Ca2PbO4 was found to be present. The compound coexists with CaO and PbO. The intermetallic compounds Ca2Pb, Ca5Pb3 and CaPb and liquid alloys are in equilibrium with CaO. The standard Gibbs energies of formation of Ca2PbO4 (880 - 1100 K) and Pb3O4 (770 - 910 K) were determined using solid-state cells based on yttria-stabilized zirconia as the solid electrolyte. Pure oxygen gas at 0.1 MPa was used as the reference electrode. For measurements on Ca2PbO4, a novel cell design with three electrodes in series, separated by solid electrolyte membranes, was used to avoid polarization of the electrode containing three solid phases. Two three-phase electrodes were used. The first absorbs the electrochemical flux of oxygen from the reference electrode to the measuring electrode. The other three-phase electrode, which is unaffected by the oxygen flux through the solid electrolyte, is used for electromotive force (EMF) measurement. The results from EMF studies were cross-checked using thermogravimetry (TG) under controlled oxygen partial pressures. The stability of Pb3O4 was investigated using a conventional solid-state cell with RuO2 electrodes. The results can be summarized by the following equations: 2CaO + PbO +1/2O(2) --> Ca2PbO4 Delta(r)G degrees/J mol(-1) = (- 128340 + 93.21 T/K) +/- 200 3PbO + 1/2O(2) --> Pb3O4 Delta(r)G degrees/J mol(-1) = (- 70060 + 77.5 T/K) +/- 150

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The concept of a biofuel cell takes inspiration from the natural capability of biological systems to catalyse the conversion of organic matter with a subsequent release of electrical energy. Enzymatic biofuel cells are intended to mimic the processes occurring in nature in a more controlled and efficient manner. Traditional fuel cells rely on the use of toxic catalysts and are often not easily miniaturizable making them unsuitable as implantable power sources. Biofuel cells however use highly selective protein catalysts and renewable fuels. As energy consumption becomes a global issue, they emerge as important tools for energy generation. The microfluidic platforms developed are intended to maximize the amount of electrical energy extracted from renewable fuels which are naturally abundant in the environment and in biological fluids. Combining microfabrication processes, chemical modification and biological surface patterning these devices are promising candidates for micro-power sources for future life science and electronic applications. This thesis considered four main aspects of a biofuel cell research. Firstly, concept of a miniature compartmentalized enzymatic biofuel cell utilizing simple fuels and operating in static conditions is verified and proves the feasibility of enzyme catalysis in energy conversion processes. Secondly, electrode and microfluidic channel study was performed through theoretical investigations of the flow and catalytic reactions which also improved understanding of the enzyme kinetics in the cell. Next, microfluidic devices were fabricated from cost-effective and disposable polymer materials, using the state-of-the-art micro-processing technologies. Integration of the individual components is difficult and multiple techniques to overcome these problems have been investigated. Electrochemical characterization of gold electrodes modified with Nanoporous Gold Structures is also performed. Finally, two strategies for enzyme patterning and encapsulation are discussed. Several protein catalysts have been effectively immobilized on the surface of commercial and microfabricated electrodes by electrochemically assisted deposition in sol-gel and poly-(o-phenylenediamine) polymer matrices and characterised with confirmed catalytic activity.

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The demand for novel renewable energy sources, together with the new findings on bacterial electron transport mechanisms and the progress in microbial fuel cell design, have raised a noticeable interest in microbial power generation. Microbial fuel cell (MFC) is an electrochemical device that converts organic substrates into electricity via catalytic conversion by microorganism. It has represented a continuously growing research field during the past few years. The great advantage of this device is the direct conversion of the substrate into electricity and in the future, MFC may be linked to municipal waste streams or sources of agricultural and animal waste, providing a sustainable system for waste treatment and energy production. However, these novel green technologies have not yet been used for practical applications due to their low power outputs and challenges associated with scale-up, so in-depth studies are highly necessary to significantly improve and optimize the device working conditions. For the time being, the micro-scale MFCs show great potential in the rapid screening of electrochemically active microbes. This thesis presents how it will be possible to optimize the properties and design of the micro-size microbial fuel cell for maximum efficiency by understanding the MFC system. So it will involve designing, building and testing a miniature microbial fuel cell using a new species of microorganisms that promises high efficiency and long lifetime. The new device offer unique advantages of fast start-up, high sensitivity and superior microfluidic control over the measured microenvironment, which makes them good candidates for rapid screening of electrode materials, bacterial strains and growth media. It will be made in the Centre of Hybrid Biodevices (Faculty of Physical Sciences and Engineering, University of Southampton) from polymer materials like PDMS. The eventual aim is to develop a system with the optimum combination of microorganism, ion exchange membrane and growth medium. After fabricating the cell, different bacteria and plankton species will be grown in the device and the microbial fuel cell characterized for open circuit voltage and power. It will also use photo-sensitive organisms and characterize the power produced by the device in response to optical illumination.

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With energy demands and costs growing every day, the need for improving energy efficiency in electrical devices has become very important. Research into various methods of improving efficiency for all electrical components will be a key to meet future energy needs. This report documents the design, construction, and testing of a research quality electric machine dynamometer and test bed. This test cell system can be used for research in several areas including: electric drives systems, electric vehicle propulsion systems, power electronic converters, load/source element in an AC Microgrid, as well as many others. The test cell design criteria, and decisions, will be discussed in reference to user functionality and flexibility. The individual power components will be discussed in detail to how they relate to the project, highlighting any feature used in operation of the test cell. A project timeline will be discussed, clearly stating the work done by the different individuals involved in the project. In addition, the system will be parameterized and benchmark data will be used to provide the functional operation of the system. With energy demands and costs growing every day, the need for improving energy efficiency in electrical devices has become very important. Research into various methods of improving efficiency for all electrical components will be a key to meet future energy needs. This report documents the design, construction, and testing of a research quality electric machine dynamometer and test bed. This test cell system can be used for research in several areas including: electric drives systems, electric vehicle propulsion systems, power electronic converters, load/source element in an AC Microgrid, as well as many others. The test cell design criteria, and decisions, will be discussed in reference to user functionality and flexibility. The individual power components will be discussed in detail to how they relate to the project, highlighting any feature used in operation of the test cell. A project timeline will be discussed, clearly stating the work done by the different individuals involved in the project. In addition, the system will be parameterized and benchmark data will be used to provide the functional operation of the system.

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La fiabilidad está pasando a ser el principal problema de los circuitos integrados según la tecnología desciende por debajo de los 22nm. Pequeñas imperfecciones en la fabricación de los dispositivos dan lugar ahora a importantes diferencias aleatorias en sus características eléctricas, que han de ser tenidas en cuenta durante la fase de diseño. Los nuevos procesos y materiales requeridos para la fabricación de dispositivos de dimensiones tan reducidas están dando lugar a diferentes efectos que resultan finalmente en un incremento del consumo estático, o una mayor vulnerabilidad frente a radiación. Las memorias SRAM son ya la parte más vulnerable de un sistema electrónico, no solo por representar más de la mitad del área de los SoCs y microprocesadores actuales, sino también porque las variaciones de proceso les afectan de forma crítica, donde el fallo de una única célula afecta a la memoria entera. Esta tesis aborda los diferentes retos que presenta el diseño de memorias SRAM en las tecnologías más pequeñas. En un escenario de aumento de la variabilidad, se consideran problemas como el consumo de energía, el diseño teniendo en cuenta efectos de la tecnología a bajo nivel o el endurecimiento frente a radiación. En primer lugar, dado el aumento de la variabilidad de los dispositivos pertenecientes a los nodos tecnológicos más pequeños, así como a la aparición de nuevas fuentes de variabilidad por la inclusión de nuevos dispositivos y la reducción de sus dimensiones, la precisión del modelado de dicha variabilidad es crucial. Se propone en la tesis extender el método de inyectores, que modela la variabilidad a nivel de circuito, abstrayendo sus causas físicas, añadiendo dos nuevas fuentes para modelar la pendiente sub-umbral y el DIBL, de creciente importancia en la tecnología FinFET. Los dos nuevos inyectores propuestos incrementan la exactitud de figuras de mérito a diferentes niveles de abstracción del diseño electrónico: a nivel de transistor, de puerta y de circuito. El error cuadrático medio al simular métricas de estabilidad y prestaciones de células SRAM se reduce un mínimo de 1,5 veces y hasta un máximo de 7,5 a la vez que la estimación de la probabilidad de fallo se mejora en varios ordenes de magnitud. El diseño para bajo consumo es una de las principales aplicaciones actuales dada la creciente importancia de los dispositivos móviles dependientes de baterías. Es igualmente necesario debido a las importantes densidades de potencia en los sistemas actuales, con el fin de reducir su disipación térmica y sus consecuencias en cuanto al envejecimiento. El método tradicional de reducir la tensión de alimentación para reducir el consumo es problemático en el caso de las memorias SRAM dado el creciente impacto de la variabilidad a bajas tensiones. Se propone el diseño de una célula que usa valores negativos en la bit-line para reducir los fallos de escritura según se reduce la tensión de alimentación principal. A pesar de usar una segunda fuente de alimentación para la tensión negativa en la bit-line, el diseño propuesto consigue reducir el consumo hasta en un 20 % comparado con una célula convencional. Una nueva métrica, el hold trip point se ha propuesto para prevenir nuevos tipos de fallo debidos al uso de tensiones negativas, así como un método alternativo para estimar la velocidad de lectura, reduciendo el número de simulaciones necesarias. Según continúa la reducción del tamaño de los dispositivos electrónicos, se incluyen nuevos mecanismos que permiten facilitar el proceso de fabricación, o alcanzar las prestaciones requeridas para cada nueva generación tecnológica. Se puede citar como ejemplo el estrés compresivo o extensivo aplicado a los fins en tecnologías FinFET, que altera la movilidad de los transistores fabricados a partir de dichos fins. Los efectos de estos mecanismos dependen mucho del layout, la posición de unos transistores afecta a los transistores colindantes y pudiendo ser el efecto diferente en diferentes tipos de transistores. Se propone el uso de una célula SRAM complementaria que utiliza dispositivos pMOS en los transistores de paso, así reduciendo la longitud de los fins de los transistores nMOS y alargando los de los pMOS, extendiéndolos a las células vecinas y hasta los límites de la matriz de células. Considerando los efectos del STI y estresores de SiGe, el diseño propuesto mejora los dos tipos de transistores, mejorando las prestaciones de la célula SRAM complementaria en más de un 10% para una misma probabilidad de fallo y un mismo consumo estático, sin que se requiera aumentar el área. Finalmente, la radiación ha sido un problema recurrente en la electrónica para aplicaciones espaciales, pero la reducción de las corrientes y tensiones de los dispositivos actuales los está volviendo vulnerables al ruido generado por radiación, incluso a nivel de suelo. Pese a que tecnologías como SOI o FinFET reducen la cantidad de energía colectada por el circuito durante el impacto de una partícula, las importantes variaciones de proceso en los nodos más pequeños va a afectar su inmunidad frente a la radiación. Se demuestra que los errores inducidos por radiación pueden aumentar hasta en un 40 % en el nodo de 7nm cuando se consideran las variaciones de proceso, comparado con el caso nominal. Este incremento es de una magnitud mayor que la mejora obtenida mediante el diseño de células de memoria específicamente endurecidas frente a radiación, sugiriendo que la reducción de la variabilidad representaría una mayor mejora. ABSTRACT Reliability is becoming the main concern on integrated circuit as the technology goes beyond 22nm. Small imperfections in the device manufacturing result now in important random differences of the devices at electrical level which must be dealt with during the design. New processes and materials, required to allow the fabrication of the extremely short devices, are making new effects appear resulting ultimately on increased static power consumption, or higher vulnerability to radiation SRAMs have become the most vulnerable part of electronic systems, not only they account for more than half of the chip area of nowadays SoCs and microprocessors, but they are critical as soon as different variation sources are regarded, with failures in a single cell making the whole memory fail. This thesis addresses the different challenges that SRAM design has in the smallest technologies. In a common scenario of increasing variability, issues like energy consumption, design aware of the technology and radiation hardening are considered. First, given the increasing magnitude of device variability in the smallest nodes, as well as new sources of variability appearing as a consequence of new devices and shortened lengths, an accurate modeling of the variability is crucial. We propose to extend the injectors method that models variability at circuit level, abstracting its physical sources, to better model sub-threshold slope and drain induced barrier lowering that are gaining importance in FinFET technology. The two new proposed injectors bring an increased accuracy of figures of merit at different abstraction levels of electronic design, at transistor, gate and circuit levels. The mean square error estimating performance and stability metrics of SRAM cells is reduced by at least 1.5 and up to 7.5 while the yield estimation is improved by orders of magnitude. Low power design is a major constraint given the high-growing market of mobile devices that run on battery. It is also relevant because of the increased power densities of nowadays systems, in order to reduce the thermal dissipation and its impact on aging. The traditional approach of reducing the voltage to lower the energy consumption if challenging in the case of SRAMs given the increased impact of process variations at low voltage supplies. We propose a cell design that makes use of negative bit-line write-assist to overcome write failures as the main supply voltage is lowered. Despite using a second power source for the negative bit-line, the design achieves an energy reduction up to 20% compared to a conventional cell. A new metric, the hold trip point has been introduced to deal with new sources of failures to cells using a negative bit-line voltage, as well as an alternative method to estimate cell speed, requiring less simulations. With the continuous reduction of device sizes, new mechanisms need to be included to ease the fabrication process and to meet the performance targets of the successive nodes. As example we can consider the compressive or tensile strains included in FinFET technology, that alter the mobility of the transistors made out of the concerned fins. The effects of these mechanisms are very dependent on the layout, with transistor being affected by their neighbors, and different types of transistors being affected in a different way. We propose to use complementary SRAM cells with pMOS pass-gates in order to reduce the fin length of nMOS devices and achieve long uncut fins for the pMOS devices when the cell is included in its corresponding array. Once Shallow Trench isolation and SiGe stressors are considered the proposed design improves both kinds of transistor, boosting the performance of complementary SRAM cells by more than 10% for a same failure probability and static power consumption, with no area overhead. While radiation has been a traditional concern in space electronics, the small currents and voltages used in the latest nodes are making them more vulnerable to radiation-induced transient noise, even at ground level. Even if SOI or FinFET technologies reduce the amount of energy transferred from the striking particle to the circuit, the important process variation that the smallest nodes will present will affect their radiation hardening capabilities. We demonstrate that process variations can increase the radiation-induced error rate by up to 40% in the 7nm node compared to the nominal case. This increase is higher than the improvement achieved by radiation-hardened cells suggesting that the reduction of process variations would bring a higher improvement.

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Organic solar cells show great promise as an economically and environmentally friendly technology to utilize solar energy because of their simple fabrication processes and minimal material usage. However, new innovations and breakthroughs are needed for organic solar cell technology to become competitive in the future. This article reviews research efforts and accomplishments focusing on three issues: power conversion efficiency, device stability and processability for mass production, followed by an outlook for optimizing OSC performance through device engineering and new architecture designs to realize next generation organic solar cells.

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Standard-cell design methodology is an important technique in semicustom-VLSI design. It lends itself to the easy automation of the crucial layout part, and many algorithms have been proposed in recent literature for the efficient placement of standard cells. While many studies have identified the Kerninghan-Lin bipartitioning method as being superior to most others, it must be admitted that the behaviour of the method is erratic, and that it is strongly dependent on the initial partition. This paper proposes a novel algorithm for overcoming some of the deficiencies of the Kernighan-Lin method. The approach is based on an analogy of the placement problem with neural networks, and, by the use of some of the organizing principles of these nets, an attempt is made to improve the behavior of the bipartitioning scheme. The results have been encouraging, and the approach seems to be promising for other NP-complete problems in circuit layout.

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Using a solid-state electrochemical technique, thermodynamic properties of three sulfide phases (RhS0.882, Rh3S4, Rh2S3) in the binary system (Rh + S) are measured as a function of temperature over the range from (925 to 1275) K. Single crystal CaF2 is used as the electrolyte. The auxiliary electrode consisting of (CaS + CaF2) is designed in such a way that the sulfur chemical potential converts into an equivalent fluorine potential at each electrode. The sulfur potentials at the measuring electrodes are established by the mixtures of (Rh + RhS0.882), (RhS0.882 + Rh3S4) and (Rh3S4 + Rh2S3) respectively. A gas mixture (H-2 + H2S + Ar) of known composition fixes the sulfur potential at the reference electrode. A novel cell design with physical separation of rhodium sulfides in the measuring electrode from CaS in the auxiliary electrode is used to prevent interaction between the two sulfide phases. They equilibrate only via the gas phase in a hermetically sealed reference enclosure. Standard Gibbs energy changes for the following reactions are calculated from the electromotive force of three cells: 2.2667Rh (s) + S-2 (g) -> 2.2667RhS(0.882) (s), Delta(r)G degrees +/- 2330/(J . mol(-1)) = -288690 + 146.18 (T/K), 4.44RhS(0.882) (s) + S-2 (g) -> 1.48Rh(3)S(4) (s), Delta(r)G degrees +/- 2245/(J . mol(-1)) = -245596 + 164.31 (T/K), 4Rh(3)S(4) (s) + S-2 (g) -> 6Rh(2)S(3) (s), Delta(r)G degrees +/- 2490/(J . mol(-1)) = -230957 + 160: 03 (T/K). Standard entropy and enthalpy of formation of rhodium sulfides from elements in their normal standard states at T = 298.15 K are evaluated. (C) 2013 Elsevier Ltd. All rights reserved.

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DRAM technology faces density and power challenges to increase capacity because of limitations of physical cell design. To overcome these limitations, system designers are exploring alternative solutions that combine DRAM and emerging NVRAM technologies. Previous work on heterogeneous memories focuses, mainly, on two system designs: PCache, a hierarchical, inclusive memory system, and HRank, a flat, non-inclusive memory system. We demonstrate that neither of these designs can universally achieve high performance and energy efficiency across a suite of HPC workloads. In this work, we investigate the impact of a number of multilevel memory designs on the performance, power, and energy consumption of applications. To achieve this goal and overcome the limited number of available tools to study heterogeneous memories, we created HMsim, an infrastructure that enables n-level, heterogeneous memory studies by leveraging existing memory simulators. We, then, propose HpMC, a new memory controller design that combines the best aspects of existing management policies to improve performance and energy. Our energy-aware memory management system dynamically switches between PCache and HRank based on the temporal locality of applications. Our results show that HpMC reduces energy consumption from 13% to 45% compared to PCache and HRank, while providing the same bandwidth and higher capacity than a conventional DRAM system.

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There is a need to develop viable techniques for removal and recovery organic and inorganic compounds from environmental matrices, due to their ecotoxicity, regulatory obligations or potential supplies as secondary materials. In this dissertation, electro –removal and –recovery techniques were applied to five different contaminated environmental matrices aiming phosphorus (P) recovery and/or contaminants removal. In a first phase, the electrokinetic process (EK) was carried out in soils for (i) metalloids and (ii) organic contaminants (OCs) removal. In the case of As and Sb mine contaminated soil, the EK process was additionally coupled with phytotechnologies. In a second phase, the electrodialytic process (ED) was applied to wastes aiming P recovery and simultaneous removal of (iii) toxins from membrane concentrate, (iv) heavy metals from sewage sludge ash (SSA), and (v) OCs from sewage sludge (SS). EK enhanced phytoremediation showed to be viable for the remediation of soils contaminated with metalloids, as although remediation was low, it combines advantages of both technologies while allowing site management. EK also proved to be an effective remediation technology for the removal and degradation of emerging OCs from two types of soil. Aiming P recovery and contaminants removal, different ED cell set-ups were tested. For the membrane concentrates, the best P recovery was achieved in a three compartment (3c) cell, but the highest toxin removal was obtained in a two compartment (2c) cell, placing the matrix in the cathode end. In the case of SSA the best approach for simultaneous P recovery and heavy metals removal was to use a 2c-cell placing the matrix in the anode end. However, for simultaneous P recovery and OCs removal, SS should be placed in the cathode end, in a 2c-cell. Overall, the data support that the selection of the cell design should be done case-by-case.