TECHNIQUES FOR PRODUCING DEFECT-FREE SOI BY DUAL ELECTRON BEAM HEATING OF DEPOSITED POLYSILICON.

Advances in the dual electron-beam recrystallization technique arising from the fast scanning of a line beam parallel to the edges of narrow seeding windows are described. The resultant recrystallized layers are essentially defect-free, have good surface flatness, and cover large areas.

Performance of CMOS Devices in Silicon-on-Sapphire Films After Solid-Phase Epitaxial Growth With Rapid Electron-Beam Heating

The crystal quality of 0.3-μm-thick as-grown epitaxial silicon-on-sapphire (SOS) was improved using solid-phase epitaxy (SPE) by implantation with silicon to 1015 ions/cm2 at 175 keV and rapid annealing using electron-beam heating, n-channel and p-channel transistormobilities increased by 31 and 19 percent, respectively, and a reduction in ring-oscillator stage delay confirmed that crystal defects near the upper silicon surface had been removed. Leakage in n-channel transistors was not significantly affected by the regrowth process but for p-channel transistors back-channel leakage was considerably greater than for the control devices. This is attributed to aluminum released by damage to the sapphire during silicon implantation. © 1985 IEEE

Formation of silicon-on-insulator layers by electron beam recrystallization

This paper outlines the development of the electron beam recrystallization approach to the formation of silicon-on-insulator layers. The technique of recrystallizing seeded layers by a line electron beam has been widely adopted. Present practice in electron beam recrystallization is reviewed, both from materials and process points of view. Applications of silicon-on-insulator substrates formed in this way are described, particularly in three-dimensional integration. © 1988.

TRANSIENT SCANNING ELECTRON BEAM ANNEALING METHODS USED TO STUDY DIFFUSION AND DEFECTS IN IMPLANTED SILICON.

Rapid thermal annealing of arsenic and boron difluoride implants, such as those used for source/drain regions in CMOS, has been carried out using a scanning electron beam annealer, as part of a study of transient diffusion effects. Three types of e-beam anneal have been performed, with peak temperatures in the range 900 -1200 degree C; the normal isothermal e-beam anneals, together with sub-second fast anneals and 'dual-pulse' anneals, in which the sample undergoes an isothermal pre-anneal followed by rapid heating to the required anneal temperature is less than 0. 5s. The diffusion occuring during these anneal cycles has been modelled using SPS-1D, an implant and diffusion modelling program developed by one of the authors. This has been modified to incorporate simulated temperature vs. time cycles for the anneals. Results are presented applying the usual equilibrium clustering model, a transient point-defect enhancement to the diffusivity proposed recently by Fair and a new dynamic clustering model for arsenic. Good agreement with SIMS measurements is obtained using the dynamic clustering model, without recourse to a transient defect model.

Rapid Electron Beam Reacted Tantalum/Titanium Bilayers on Silicon : Semiconductors and Semiconductor Devices

The electrical and structural characteristics of tantalum-titanium bilayers on silicon reacted by electron beam heating have been investigated over a wide range of temperature and time conditions. The reacted layers exhibit low sheet resistance and stable electrical characteristics up to at least 1100℃. Titanium starts reacting from 750℃ onwards for 100 milliseconds reaction times whereas tantalum starts reacting only above 900℃ for such short reaction times. RBS results confirm that silicon is the major diffusing species and there is no evidence for the formation of ternary silicides. Reactions have also been explored on millisecond time scales by non-isothermal heating.

Electron-beam-induced direct etching of graphene

We present electron-beam-induced oxidation of single- and bilayer graphene devices in a low-voltage scanning electron microscope. We show that the injection of oxygen leads to targeted etching at the focal point, enabling us to pattern graphene with a resolution of better than 20 nm. Voltage-contrast imaging, in conjunction with finite-element simulations, explain the secondary-electron intensities and correlate them to the etch profile. © 2013 Elsevier Ltd. All rights reserved.

Electron-beam patterning of polymer electrolyte films to make multiple nanoscale gates for nanowire transistors

We report an electron-beam based method for the nanoscale patterning of the poly(ethylene oxide)/LiClO4 polymer electrolyte. We use the patterned polymer electrolyte as a high capacitance gate dielectric in single nanowire transistors and obtain subthreshold swings comparable to conventional metal/oxide wrap-gated nanowire transistors. Patterning eliminates gate/contact overlap, which reduces parasitic effects and enables multiple, independently controllable gates. The method's simplicity broadens the scope for using polymer electrolyte gating in studies of nanowires and other nanoscale devices. © 2013 American Chemical Society.

Fabrication of a Low-Loss SSC Using High-Dose Electron Beam Lithography Exposure With Negative PMMA Resist

A silicon-on-insulator optical fiber-to-waveguide spot-size converter (SSC) using Poly-MethylMethAcrylate (PMMA) is presented for integrated optical circuits. Unlike the conventional use of PMMA as a positive resist, it has been successfully used as a negative resist with high-dose electron exposure for the fabrication of ultrafine silicon wire waveguides. Additionally, this process is able to reduce the side-wall roughness, and substantially depresses the unwanted propagation loss. Exploiting this technology, the authors demonstrated that the SSC can improve coupling efficiency by as much as over 2.5 dB per coupling facet, compared with that of SSC fabricated with PMMA as a positive resist with the same dimension.