A novel single-phase ZCS-PWM high-power-factor boost rectifier

This paper presents a novel single-phase high-power-factor (HPF) pulsewidth-modulated (PWM) boost rectifier featuring soft commutation of the active switches at zero current (ZC), It incorporates the most desirable properties of conventional PWM and soft-switching resonant techniques.The input current shaping is achieved with average current mode control and continuous inductor current mode.This new PWM converter provides ZC turn on and turn off of the active switches, and it is suitable for high-power applications employing insulated gate bipolar transistors (IGBT's),The principle of operation, the theoretical analysis, a design example, and experimental results from a laboratory prototype rated at 1600 W with 400-Vdc output voltage are presented. The measured efficiency and the power factor were 96.2% and 0.99%, respectively, with an input current total harmonic distortion (THD) equal to 3.94%, for an input voltage with THD equal to 3.8%, at rated load.

Automatic dimming multi-lamp fluorescent management system with active input power factor corrector stage

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Programmable PFC based hybrid multipulse power rectifier for ultra clean power application

A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.

Technology assessment for power quality mitigation devices - Micro-DVR case study

This work presents a case study on technology assessment for power quality improvement devices. A system compatibility test protocol for power quality mitigation devices was developed in order to evaluate the functionality of three-phase voltage restoration devices. In order to validate this test protocol, the micro-DVR, a reduced power development platform for DVR (dynamic voltage restorer) devices, was tested and the results are discussed based on voltage disturbances standards. (C) 2011 Elsevier B.V. All rights reserved.

Single-phase high power factor hybrid rectifier suitable for high-power applications

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A unity power factor multiple isolated outputs switching mode power supply using a single switch

The authors present an offline switching power supply with multiple isolated outputs and unity power factor with the use of only one power processing stage, based on the DC-DC SEPIC (single ended primary inductance converter) modulated by variable hysteresis current control. The principle of operation, the theoretical analysis, the design procedure, an example, and simulation results are presented. A laboratory prototype, rated at 160 W, operating at a maximum switching frequency of 100 kHz, with isolated outputs rated at +5 V/15 A -5 V/1 A, +12 V/6 A and -12 V/1 A, has been built given an input power factor near unity.

Analysis and design of constant-frequency peak-current-controlled high-power-factor boost rectifier with slope compensation

This paper presents the analysis and the design of a peak-current-controlled high-power-factor boost rectifier, with slope compensation, operating at constant frequency. The input current shaping is achieved, with continuous inductor current mode, with no multiplier to generate a current reference. The resulting overall circuitry is very simple, in comparison with the average-current-controlled boost rectifier. Experimental results are presented, taken from a laboratory prototype rated at 370 W and operating at 67 kHz. The measured power factor was 0.99, with a input current THD equal to 5.6%, for an input voltage THD equal to 2.26%.

A new three-phase low THD power supply with high-frequency isolation and 60V/200A regulated DC output

This work proposes a new isolated high power factor 12kW power supply based on an 18-pulse transformer arrangement. Three full-bridge converters are used for isolation and to balance the DC-link currents, without current sensing or a current controller. The topology provides a regulated DC output with a very simple control strategy. Simulation and experimental results are presented in this paper.

A Gm-C bump equalizer for low-voltage low-power applications

A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

Dimmable electronic ballast with high power-factor SEPIC preregulator, for multiple tubular fluorescent lamps

An electronic ballast for multiple tubular fluorescent lamps is presented in this paper. The proposed structure features high power-factor, dimming capability, and soft-switching to the semiconductor devices operated in high frequencies. A Zero-Current-Switching - Pulse-Width-Modulated (ZCS-PWM) SEPIC converter composes the rectifying stage, controlled by the instantaneous average input current technique, performing soft-commutations and high input power factor. Regarding the inverting stage, it is composed by a classical resonant Half-Bridge converter, associated to Series Parallel-Loaded Resonant (SPLR) filters. The dimming control technique employed in this Half-Bridge inverter is based on the phase-shift in the current processed through the sets of filter + lamp. In addition, experimental results are shown in order to validate the developed analysis.

A novel programmable PFC based hybrid rectifier for ultra clean power application

A novel hybrid high power rectifier capable to achieve unity power factor is proposed in this paper. Single-phase SEPIC rectifiers are associated in parallel with each leg of three-phase 6-pulse diode rectifier resulting in a programmable input current waveform structure. In this paper it is described the principles of operation of the proposed converter with detailed simulation and experimental results. For a total harmonic distortion of the input line current (THDI) less than 2% the rated power of the SEPIC rectifiers is 33%. Therefore, power rating of the SEPIC parallel converters is a fraction of the output power, on the range of 20% to 33% of the nominal output power, making the proposed solution economically viable for high power installations, with fast pay back of the investment. Moreover, retrofits to existing installations are also possible with this proposed topology, since the parallel path can be easily controlled by integration with the already existing de-link. Experimental results are presented for a 3 kW implemented prototype, in order to verify the developed analysis.

Virtual instrumentation applied to the implementation of IEEE STD 1459-2000 power definitions

This paper discusses the utilization of Virtual Instrumentation to the implementation and evaluation of different power definitions, so that classical formulations and new definitions can be compared without the necessity of acquiring different power meters or analyzers. Accordingly, the definitions of IEEE Standard 1459-2000 for the measurement of power quantities under distorted and unbalanced situations, have been digitally implemented. Thus, several power and power factor components related to the decomposition of the measured voltage and current signals have been obtained. The proposed PC-based Virtual Instrument uses a high performance acquisition board and isolated sensors and transducers. All digital algorithms and routines have been implemented by means of a graphical development system. Regarding to the implementation of STD 1459, this paper also proposes several different algorithms to the required decompositions of voltage, current and power components. © 2005 IEEE.

Frequency-adjustable positive sequence detector for power conditioning applications

This paper proposes a novel and simple positive sequence detector (PSD), which is inherently self-adjustable to fundamental frequency deviations by means of a software-based PLL (Phase Locked Loop). Since the proposed positive sequence detector is not based on Fortescue's classical decomposition and no special input filtering is needed, its dynamic response may be as fast as one fundamental cycle. The digital PLL ensures that the positive sequence components can be calculated even under distorted waveform conditions and fundamental frequency deviations. For the purpose of validating the proposed models, the positive sequence detector has been implemented in a PC-based Power Quality Monitor and experimental results illustrate its good performance. The PSD algorithm has also been evaluated in the control loop of a Series Active Filter and simulation results demonstrate its effectiveness in a closed-loop system. Moreover, considering single-phase applications, this paper also proposes a general single-phase PLL and a Fundamental Wave Detector (FWD) immune to frequency variations and waveform distortions. © 2005 IEEE.

Programmable PFC based hybrid multipulse power rectifier for utility interface of power electronic converters

In this paper it is proposed a novel hybrid three-phase rectifier capable to achieve high input power factor (PF), and low total harmonic distortion in the input currents (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase 6-pulses diode rectifier (Graetz bridge) with a parallel connection of single-phase Boost rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this paper describes its principles of operation, with detailed experimental results and discussions on power rating of the required Boost converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Boost converters, making the proposed solution economically viable for very high power installations, with fast pay back of the investment. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing de-link. A prototype rated at 6 kW has been implemented in laboratory and fully demonstrated its operation, performance and feasibility to high power applications. © 2005 IEEE.

Power losses analysis and cooling system design of three topologies of multilevel inverters

This paper presents the comparison of three topologies of multilevel inverters applied to drive an induction motor of 500 kVA/4.16 kV. The multilevel inverters analyzed are: a neutral point clamped inverter, a symmetrical cascaded multilevel inverter and a hybrid asymmetrical cascaded multilevel inverter. The performance indexes used in the comparison are total harmonic distortion, first order distortion factor, semiconductors power losses distribution and heat-sink volume. The comparison is developed with the purpose of finding the efficiency and the heat-sink volume where the three systems present the same output filter. ©2008 IEEE.