992 resultados para Bias voltage
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The work presented in this thesis examines the properties of BPEs of various configurations and under different operating conditions in a large planar LEC system. Detailed analysis of time-lapsed fluorescence images allows us to calculate the doping propagation speed from the BPEs. By introducing a linear array of BPEs or dispersed ITO particles, multiple light-emitting junctions or a bulk homojunction have been demonstrated. In conclusion, it has been observed that both applied bias voltages and sizes of BPEs affected the electrochemical doping from the BPE. If the applied bias voltage was initially not sufficiently high enough, a delay in appearance of doping from the BPE would take place. Experiments of parallel BPEs with different sizes (large, medium, small) demonstrate that the potential difference across the BPEs has played a vital role in doping initiation. Also, the p-doping propagation distance from medium-sized BPE has displayed an exponential growth over the time-span of 70 seconds. Experiments with a linear array of BPEs with the same size demonstrate that the doping propagation speed of each floating BPE was the same regardless of its position between the driving electrodes. Probing experiments under high driving voltages further demonstrated the potential of having a much more efficient light emission from an LEC with multiple BPEs.
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Récemment, beaucoup d’efforts ont été investis afin de développer des modulateurs sur silicium pour les télécommunications optiques et leurs domaines d’applications. Ces modulateurs sont utiles pour les centres de données à courte portée et à haut débit. Ainsi, ce travail porte sur la caractérisation de deux types de modulateurs à réseau de Bragg intégré sur silicium comportant une jonction PN entrelacée dont le but est de réaliser une modulation de la longueur d’onde de Bragg par le biais de l’application d’un tension de polarisation inverse réalisant une déplétion des porteurs au sein du guide d’onde. Pour le premier modulateur à réseau de Bragg, la période de la jonction PN est différente de celle du réseau de Bragg tandis que le deuxième modulateur à réseau de Bragg a la période de sa jonction PN en accord avec celle du réseau de Bragg. Ces différences apporteront un comportement différent du modulateur impliquant donc une transmission de données de qualité différente et c’est ce que nous cherchons à caractériser. L’avantage de ce modulateur à réseau de Bragg est qu’il est relativement simple à designer et possède un réseau de Bragg uniforme dont on connaît déjà très bien les caractéristiques. La première étape dans la caractérisation de ces modulateurs fut de réaliser des mesures optiques, uniquement, afin de constater la réponse spectrale en réflexion et en transmission. Par la suite, nous sommes passé par l’approche usuelle, c’est à dire en réalisant des mesures DC sur les modulateurs. Ce mémoire montre également les résultats pratiques sur le comportement des électrodes et de la jonction PN. Mais il rend compte également des résultats de la transmission de données de ces modulateurs par l’utilisation d’une modulation OOK et PAM-4 et permet de mettre en évidence les différences en terme d’efficacité de modulation de ces deux modulateurs. Nous discutons alors de la pertinence de ce choix de design par rapport à ce que l’on peut trouver actuellement dans la littérature.
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Dissertação mest. em Imagiologia Médica, Faculdade de Ciências e Tecnologia da Univ. do Algarve, 2006
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Electrical bias and light stressing followed by natural recovery of amorphous hafnium-indium-zinc-oxide (HIZO) thin film transistors with a silicon oxide/nitride dielectric stack reveals defect density changes, charge trapping and persistent photoconductivity (PPC). In the absence of light, the polarity of bias stress controls the magnitude and direction of the threshold voltage shift (Δ VT), while under light stress, VT consistently shifts negatively. In all cases, there was no significant change in field-effect mobility. Light stress gives rise to a PPC with wavelength-dependent recovery on time scale of days. We observe that the PPC becomes more pronounced at shorter wavelengths. © 2010 American Institute of Physics.
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It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65-0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10 6-107 s-1, which suggests a weak localization of carriers in band tail states over a 20-40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage shift, but only under conditions of simultaneous negative gate bias and illumination, as observed experimentally as the NBIS effect. © 2014 AIP Publishing LLC.
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Includes bibliographical references (p. 61).
Reversed bias Pt/nanostructured ZnO Schottky diode with enhanced electric field for hydrogen sensing
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In this paper, the effect of electric field enhancement on Pt/nanostructured ZnO Schottky diode based hydrogen sensors under reverse bias condition has been investigated. Current-voltage characteristics of these diodes have been studied at temperatures from 25 to 620 °C and their free carrier density concentration was estimated by exposing the sensors to hydrogen gas. The experimental results show a significantly lower breakdown voltage in reversed bias current-voltage characteristics than the conventional Schottky diodes and also greater lateral voltage shift in reverse bias operation than the forward bias. This can be ascribed to the increased localized electric fields emanating from the sharp edges and corners of the nanostructured morphologies. At 620 °C, voltage shifts of 114 and 325 mV for 0.06% and 1% hydrogen have been recorded from dynamic response under the reverse bias condition. © 2010 Elsevier B.V. All rights reserved.
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Two different morphologies of nanotextured molybdenum oxide were deposited by thermal evaporation. By measuring their field emission (FE) properties, an enhancement factor was extracted. Subsequently, these films were coated with a thin layer of Pt to form Schottky contacts. The current-voltage (I-V) characteristics showed low magnitude reverse breakdown voltages, which we attributed to the localized electric field enhancement. An enhancement factor was obtained from the I-V curves. We will show that the enhancement factor extracted from the I-V curves is in good agreement with the enhancement factor extracted from the FE measurements.
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A hydrogen gas sensor based on Pt/nanostructured ZnO Schottky diode has been developed. Our proposed theoretical model allows for the explanation of superior dynamic performance of the reverse biased diode when compared to the forward bias operation. The sensor was evaluated with low concentration H2 gas exposures over a temperature range of 280°C to 430°C. Upon exposure to H2 gas, the effective change in free carrier concentration at the Pt/structured ZnO interface is amplified by an enhancement factor, effectively lowering the reverse barrier, producing a large voltage shift. The lowering of the reverse barrier permits a faster response in reverse bias operation, than in forward bias operation.
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A unique bias-dependent phenomenon in CH3NH3PbI3−xClx based planar perovskite solar cells has been demonstrated, in which the photovoltaic parameters derived from the current–voltage (I–V) curves are highly dependent on the initial positive bias of the I–V measurement. In FTO/CH3NH3PbI3−xClx/Au devices, the open-circuit voltage and short-circuit current increased by ca. 337.5% and 281.9% respectively, by simply increasing the initial bias from 0.5 V to 2.5 V.
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A numerical procedure is presented for calculating high-frequency capacitance variation with bias in amorphous (undoped)/crystalline silicon heterojunction. The results of the model calculations using this procedure have been reported, for different p silicon substrates. These have been compared with the corresponding capacitance variations in the other limiting case, in which the heterostructure acts like an MIS structure. The effect of interface states on the capacitance characteristics has also been studied. In the second part, we report the results of 1 MHz capacitance measurements on various amorphous (undoped)/crystalline silicon heterostructures.
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This paper describes a dynamic voltage frequency control scheme for a 256 X 64 SRAM block for reducing the energy in active mode and stand-by mode. The DVFM control system monitors the external clock and changes the supply voltage and the body bias so as to achieve a significant reduction in energy. The behavioral model of the proposed DVFM control system algorithm is described and simulated in HDL using delay and energy parameters obtained through SPICE simulation. The frequency range dictated by an external controller is 100 MHz to I GHz. The supply voltage of the complete memory system is varied in steps of 50 mV over the range of 500 mV to IV. The threshold voltage range of operation is plusmn100 mV around the nominal value, achieving 83.4% energy reduction in the active mode and 86.7% in the stand-by mode. This paper also proposes a energy replica that is used in the energy monitor subsystem of the DVFM system.