Implementação da técnica de software pipelining na rede em chip IPNoSyS

Alongside the advances of technologies, embedded systems are increasingly present in our everyday. Due to increasing demand for functionalities, many tasks are split among processors, requiring more efficient communication architectures, such as networks on chip (NoC). The NoCs are structures that have routers with channel point-to-point interconnect the cores of system on chip (SoC), providing communication. There are several networks on chip in the literature, each with its specific characteristics. Among these, for this work was chosen the Integrated Processing System NoC (IPNoSyS) as a network on chip with different characteristics compared to general NoCs, because their routing components also accumulate processing function, ie, units have functional able to execute instructions. With this new model, packets are processed and routed by the router architecture. This work aims at improving the performance of applications that have repetition, since these applications spend more time in their execution, which occurs through repeated execution of his instructions. Thus, this work proposes to optimize the runtime of these structures by employing a technique of instruction-level parallelism, in order to optimize the resources offered by the architecture. The applications are tested on a dedicated simulator and the results compared with the original version of the architecture, which in turn, implements only packet level parallelism

Biocompatibility of a chlorhexidine local delivery system in a subcutaneous mouse model

Objective: This study aimed evaluating histologically and histomorphometrically the response of the conjunctive tissue face to the implant of chlorhexidine chips in the subcutaneous tissues of rats. Study Design: In this research 35 male rats Wistar were used to analyze the biocompatibility and the degradation process of chlorhexidine chip. In each animal, it was made 2 incisions for subcutaneous implantation of chlorhexidine chip (test group) and a polytetrafluorethylene membrane (control group). The morphological changes in subcutaneous implantations were assessed after 1, 3, 5, 7, 10, 14, 21 days. The data were submitted to Friedman nonparametric test to analyze the comparisons among observation periods and to allow the comparison among groups. Results: Differences were found in the analysis of the inflammatory response when comparing the tested materials (p values <= 0.05). In test group was observed hemorrhage, edema and intense inflammatory infiltrate predominantly neutrophilic around material. From 3-day and subsequent periods was verified granulation tissue externally at this infiltrate. From 10-day on was observed crescent area of degradation of chlorhexidine chip, associated with neutrophilic and macrophagic infiltrate, that maintained until 21-day. In the control group, moderate inflammatory infiltrate was observed initially, predominantly polymorphonuclear, edema and granulation tissue 3-day period. The inflammatory infiltrate was gradually replaced for granulation tissue, culminating in a fibrous capsule. Giant multinucleate cells situated at contact interface with the coating was examined since 3-day and persisted until 21-day. Conclusion: The chlorhexidine chip induces an intense acute inflammatory response at subcutaneous tissue of rats. Therefore, at conditions of this study was not biocompatible.

Fabricação de microcanais para integração de uma língua eletrônica em um sistema lab-on-a-chip

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Fabricação de dispositivos para aplicação de conceitos de microfluídica a uma Língua eletrônica

Pós-graduação em Ciência e Tecnologia de Materiais - FC

Natural-rubber-based flexible microfluidic device

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

ChIP-seq reveals a role for CrzA in the Aspergillus fumigatus high-osmolarity glycerol response (HOG) signalling pathway

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Dispositivo microfluídico de borracha natural (LAB-ON-A-CHIP)

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Microfluidic electronic tongue

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Unmanned platform for long-range remote analysis of volatile compounds in air samples

This paper describes a long-range remotely controlled CE system built on an all-terrain vehicle. A four-stroke engine and a set of 12-V batteries were used to provide power to a series of subsystems that include drivers, communication, computers, and a capillary electrophoresis module. This dedicated instrument allows air sampling using a polypropylene porous tube, coupled to a flow system that transports the sample to the inlet of a fused-silica capillary. A hybrid approach was used for the construction of the analytical subsystem combining a conventional fused-silica capillary (used for separation) and a laser machined microfluidic block, made of PMMA. A solid-state cooling approach was also integrated in the CE module to enable controlling the temperature and therefore increasing the useful range of the robot. Although ultimately intended for detection of chemical warfare agents, the proposed system was used to analyze a series of volatile organic acids. As such, the system allowed the separation and detection of formic, acetic, and propionic acids with signal-to-noise ratios of 414, 150, and 115, respectively, after sampling by only 30 s and performing an electrokinetic injection during 2.0 s at 1.0 kV.

Compact and autonomous multiwavelength microanalyzer for in-line and in situ colorimetric determinations

Nowadays, the attainment of microsystems that integrate most of the stages involved in an analytical process has raised an enormous interest in several research fields. This approach provides experimental set-ups of increased robustness and reliability, which simplify their application to in-line and continuous biomedical and environmental monitoring. In this work, a novel, compact and autonomous microanalyzer aimed at multiwavelength colorimetric determinations is presented. It integrates the microfluidics (a three-dimensional mixer and a 25 mm length "Z-shape" optical flow-cell), a highly versatile multiwavelength optical detection system and the associated electronics for signal processing and drive, all in the same device. The flexibility provided by its design allows the microanalyzer to be operated either in single fixed mode to provide a dedicated photometer or in multiple wavelength mode to obtain discrete pseudospectra. To increase its reliability, automate its operation and allow it to work under unattended conditions, a multicommutation sub-system was developed and integrated with the experimental set-up. The device was initially evaluated in the absence of chemical reactions using four acidochromic dyes and later applied to determine some key environmental parameters such as phenol index, chromium(VI) and nitrite ions. Results were comparable with those obtained with commercial instrumentation and allowed to demonstrate the versatility of the proposed microanalyzer as an autonomous and portable device able to be applied to other analytical methodologies based on colorimetric determinations.

System level design space exploration for MPSoC : methods, algorithms and new infrastructure

Eliminadas las páginas en blanco

Lab-on-a-chip: the future in water quality detection

Interpretación realizada por las alumnas en prácticas de la Facultad de Traducción e Interpretación, Estíbaliz López-Leiton Trujillo, Danaide Rodríguez Hernández, Esther Ramírez Millares.

Design and Performance Evaluation of Network-on-Chip Communication Protocols and Architectures

The scale down of transistor technology allows microelectronics manufacturers such as Intel and IBM to build always more sophisticated systems on a single microchip. The classical interconnection solutions based on shared buses or direct connections between the modules of the chip are becoming obsolete as they struggle to sustain the increasing tight bandwidth and latency constraints that these systems demand. The most promising solution for the future chip interconnects are the Networks on Chip (NoC). NoCs are network composed by routers and channels used to inter- connect the different components installed on the single microchip. Examples of advanced processors based on NoC interconnects are the IBM Cell processor, composed by eight CPUs that is installed on the Sony Playstation III and the Intel Teraflops pro ject composed by 80 independent (simple) microprocessors. On chip integration is becoming popular not only in the Chip Multi Processor (CMP) research area but also in the wider and more heterogeneous world of Systems on Chip (SoC). SoC comprehend all the electronic devices that surround us such as cell-phones, smart-phones, house embedded systems, automotive systems, set-top boxes etc... SoC manufacturers such as ST Microelectronics , Samsung, Philips and also Universities such as Bologna University, M.I.T., Berkeley and more are all proposing proprietary frameworks based on NoC interconnects. These frameworks help engineers in the switch of design methodology and speed up the development of new NoC-based systems on chip. In this Thesis we propose an introduction of CMP and SoC interconnection networks. Then focusing on SoC systems we propose: • a detailed analysis based on simulation of the Spidergon NoC, a ST Microelectronics solution for SoC interconnects. The Spidergon NoC differs from many classical solutions inherited from the parallel computing world. Here we propose a detailed analysis of this NoC topology and routing algorithms. Furthermore we propose aEqualized a new routing algorithm designed to optimize the use of the resources of the network while also increasing its performance; • a methodology flow based on modified publicly available tools that combined can be used to design, model and analyze any kind of System on Chip; • a detailed analysis of a ST Microelectronics-proprietary transport-level protocol that the author of this Thesis helped developing; • a simulation-based comprehensive comparison of different network interface designs proposed by the author and the researchers at AST lab, in order to integrate shared-memory and message-passing based components on a single System on Chip; • a powerful and flexible solution to address the time closure exception issue in the design of synchronous Networks on Chip. Our solution is based on relay stations repeaters and allows to reduce the power and area demands of NoC interconnects while also reducing its buffer needs; • a solution to simplify the design of the NoC by also increasing their performance and reducing their power and area consumption. We propose to replace complex and slow virtual channel-based routers with multiple and flexible small Multi Plane ones. This solution allows us to reduce the area and power dissipation of any NoC while also increasing its performance especially when the resources are reduced. This Thesis has been written in collaboration with the Advanced System Technology laboratory in Grenoble France, and the Computer Science Department at Columbia University in the city of New York.

Multi Processor Systems On Chip with Configurable Hardware Acceleration

The evolution of the electronics embedded applications forces electronics systems designers to match their ever increasing requirements. This evolution pushes the computational power of digital signal processing systems, as well as the energy required to accomplish the computations, due to the increasing mobility of such applications. Current approaches used to match these requirements relies on the adoption of application specific signal processors. Such kind of devices exploits powerful accelerators, which are able to match both performance and energy requirements. On the other hand, the too high specificity of such accelerators often results in a lack of flexibility which affects non-recurrent engineering costs, time to market, and market volumes too. The state of the art mainly proposes two solutions to overcome these issues with the ambition of delivering reasonable performance and energy efficiency: reconfigurable computing and multi-processors computing. All of these solutions benefits from the post-fabrication programmability, that definitively results in an increased flexibility. Nevertheless, the gap between these approaches and dedicated hardware is still too high for many application domains, especially when targeting the mobile world. In this scenario, flexible and energy efficient acceleration can be achieved by merging these two computational paradigms, in order to address all the above introduced constraints. This thesis focuses on the exploration of the design and application spectrum of reconfigurable computing, exploited as application specific accelerators for multi-processors systems on chip. More specifically, it introduces a reconfigurable digital signal processor featuring a heterogeneous set of reconfigurable engines, and a homogeneous multi-core system, exploiting three different flavours of reconfigurable and mask-programmable technologies as implementation platform for applications specific accelerators. In this work, the various trade-offs concerning the utilization multi-core platforms and the different configuration technologies are explored, characterizing the design space of the proposed approach in terms of programmability, performance, energy efficiency and manufacturing costs.

Thermal fluctuations and boundary conditions in the lattice Boltzmann method

The lattice Boltzmann method is a popular approach for simulating hydrodynamic interactions in soft matter and complex fluids. The solvent is represented on a discrete lattice whose nodes are populated by particle distributions that propagate on the discrete links between the nodes and undergo local collisions. On large length and time scales, the microdynamics leads to a hydrodynamic flow field that satisfies the Navier-Stokes equation. In this thesis, several extensions to the lattice Boltzmann method are developed. In complex fluids, for example suspensions, Brownian motion of the solutes is of paramount importance. However, it can not be simulated with the original lattice Boltzmann method because the dynamics is completely deterministic. It is possible, though, to introduce thermal fluctuations in order to reproduce the equations of fluctuating hydrodynamics. In this work, a generalized lattice gas model is used to systematically derive the fluctuating lattice Boltzmann equation from statistical mechanics principles. The stochastic part of the dynamics is interpreted as a Monte Carlo process, which is then required to satisfy the condition of detailed balance. This leads to an expression for the thermal fluctuations which implies that it is essential to thermalize all degrees of freedom of the system, including the kinetic modes. The new formalism guarantees that the fluctuating lattice Boltzmann equation is simultaneously consistent with both fluctuating hydrodynamics and statistical mechanics. This establishes a foundation for future extensions, such as the treatment of multi-phase and thermal flows. An important range of applications for the lattice Boltzmann method is formed by microfluidics. Fostered by the "lab-on-a-chip" paradigm, there is an increasing need for computer simulations which are able to complement the achievements of theory and experiment. Microfluidic systems are characterized by a large surface-to-volume ratio and, therefore, boundary conditions are of special relevance. On the microscale, the standard no-slip boundary condition used in hydrodynamics has to be replaced by a slip boundary condition. In this work, a boundary condition for lattice Boltzmann is constructed that allows the slip length to be tuned by a single model parameter. Furthermore, a conceptually new approach for constructing boundary conditions is explored, where the reduced symmetry at the boundary is explicitly incorporated into the lattice model. The lattice Boltzmann method is systematically extended to the reduced symmetry model. In the case of a Poiseuille flow in a plane channel, it is shown that a special choice of the collision operator is required to reproduce the correct flow profile. This systematic approach sheds light on the consequences of the reduced symmetry at the boundary and leads to a deeper understanding of boundary conditions in the lattice Boltzmann method. This can help to develop improved boundary conditions that lead to more accurate simulation results.